1 /* 2 * linux/arch/arm/mach-sa1100/generic.c 3 * 4 * Author: Nicolas Pitre 5 * 6 * Code common to all SA11x0 machines. 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12 #include <linux/module.h> 13 #include <linux/kernel.h> 14 #include <linux/init.h> 15 #include <linux/delay.h> 16 #include <linux/pm.h> 17 #include <linux/cpufreq.h> 18 #include <linux/ioport.h> 19 #include <linux/sched.h> /* just for sched_clock() - funny that */ 20 #include <linux/platform_device.h> 21 #include <linux/cnt32_to_63.h> 22 23 #include <asm/div64.h> 24 #include <mach/hardware.h> 25 #include <asm/system.h> 26 #include <asm/pgtable.h> 27 #include <asm/mach/map.h> 28 #include <asm/mach/flash.h> 29 #include <asm/irq.h> 30 #include <asm/gpio.h> 31 32 #include "generic.h" 33 34 unsigned int reset_status; 35 EXPORT_SYMBOL(reset_status); 36 37 #define NR_FREQS 16 38 39 /* 40 * This table is setup for a 3.6864MHz Crystal. 41 */ 42 static const unsigned short cclk_frequency_100khz[NR_FREQS] = { 43 590, /* 59.0 MHz */ 44 737, /* 73.7 MHz */ 45 885, /* 88.5 MHz */ 46 1032, /* 103.2 MHz */ 47 1180, /* 118.0 MHz */ 48 1327, /* 132.7 MHz */ 49 1475, /* 147.5 MHz */ 50 1622, /* 162.2 MHz */ 51 1769, /* 176.9 MHz */ 52 1917, /* 191.7 MHz */ 53 2064, /* 206.4 MHz */ 54 2212, /* 221.2 MHz */ 55 2359, /* 235.9 MHz */ 56 2507, /* 250.7 MHz */ 57 2654, /* 265.4 MHz */ 58 2802 /* 280.2 MHz */ 59 }; 60 61 /* rounds up(!) */ 62 unsigned int sa11x0_freq_to_ppcr(unsigned int khz) 63 { 64 int i; 65 66 khz /= 100; 67 68 for (i = 0; i < NR_FREQS; i++) 69 if (cclk_frequency_100khz[i] >= khz) 70 break; 71 72 return i; 73 } 74 75 unsigned int sa11x0_ppcr_to_freq(unsigned int idx) 76 { 77 unsigned int freq = 0; 78 if (idx < NR_FREQS) 79 freq = cclk_frequency_100khz[idx] * 100; 80 return freq; 81 } 82 83 84 /* make sure that only the "userspace" governor is run -- anything else wouldn't make sense on 85 * this platform, anyway. 86 */ 87 int sa11x0_verify_speed(struct cpufreq_policy *policy) 88 { 89 unsigned int tmp; 90 if (policy->cpu) 91 return -EINVAL; 92 93 cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq); 94 95 /* make sure that at least one frequency is within the policy */ 96 tmp = cclk_frequency_100khz[sa11x0_freq_to_ppcr(policy->min)] * 100; 97 if (tmp > policy->max) 98 policy->max = tmp; 99 100 cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, policy->cpuinfo.max_freq); 101 102 return 0; 103 } 104 105 unsigned int sa11x0_getspeed(unsigned int cpu) 106 { 107 if (cpu) 108 return 0; 109 return cclk_frequency_100khz[PPCR & 0xf] * 100; 110 } 111 112 /* 113 * This is the SA11x0 sched_clock implementation. This has 114 * a resolution of 271ns, and a maximum value of 32025597s (370 days). 115 * 116 * The return value is guaranteed to be monotonic in that range as 117 * long as there is always less than 582 seconds between successive 118 * calls to this function. 119 * 120 * ( * 1E9 / 3686400 => * 78125 / 288) 121 */ 122 unsigned long long sched_clock(void) 123 { 124 unsigned long long v = cnt32_to_63(OSCR); 125 126 /* the <<1 gets rid of the cnt_32_to_63 top bit saving on a bic insn */ 127 v *= 78125<<1; 128 do_div(v, 288<<1); 129 130 return v; 131 } 132 133 /* 134 * Default power-off for SA1100 135 */ 136 static void sa1100_power_off(void) 137 { 138 mdelay(100); 139 local_irq_disable(); 140 /* disable internal oscillator, float CS lines */ 141 PCFR = (PCFR_OPDE | PCFR_FP | PCFR_FS); 142 /* enable wake-up on GPIO0 (Assabet...) */ 143 PWER = GFER = GRER = 1; 144 /* 145 * set scratchpad to zero, just in case it is used as a 146 * restart address by the bootloader. 147 */ 148 PSPR = 0; 149 /* enter sleep mode */ 150 PMCR = PMCR_SF; 151 } 152 153 static void sa11x0_register_device(struct platform_device *dev, void *data) 154 { 155 int err; 156 dev->dev.platform_data = data; 157 err = platform_device_register(dev); 158 if (err) 159 printk(KERN_ERR "Unable to register device %s: %d\n", 160 dev->name, err); 161 } 162 163 164 static struct resource sa11x0udc_resources[] = { 165 [0] = { 166 .start = 0x80000000, 167 .end = 0x8000ffff, 168 .flags = IORESOURCE_MEM, 169 }, 170 }; 171 172 static u64 sa11x0udc_dma_mask = 0xffffffffUL; 173 174 static struct platform_device sa11x0udc_device = { 175 .name = "sa11x0-udc", 176 .id = -1, 177 .dev = { 178 .dma_mask = &sa11x0udc_dma_mask, 179 .coherent_dma_mask = 0xffffffff, 180 }, 181 .num_resources = ARRAY_SIZE(sa11x0udc_resources), 182 .resource = sa11x0udc_resources, 183 }; 184 185 static struct resource sa11x0uart1_resources[] = { 186 [0] = { 187 .start = 0x80010000, 188 .end = 0x8001ffff, 189 .flags = IORESOURCE_MEM, 190 }, 191 }; 192 193 static struct platform_device sa11x0uart1_device = { 194 .name = "sa11x0-uart", 195 .id = 1, 196 .num_resources = ARRAY_SIZE(sa11x0uart1_resources), 197 .resource = sa11x0uart1_resources, 198 }; 199 200 static struct resource sa11x0uart3_resources[] = { 201 [0] = { 202 .start = 0x80050000, 203 .end = 0x8005ffff, 204 .flags = IORESOURCE_MEM, 205 }, 206 }; 207 208 static struct platform_device sa11x0uart3_device = { 209 .name = "sa11x0-uart", 210 .id = 3, 211 .num_resources = ARRAY_SIZE(sa11x0uart3_resources), 212 .resource = sa11x0uart3_resources, 213 }; 214 215 static struct resource sa11x0mcp_resources[] = { 216 [0] = { 217 .start = 0x80060000, 218 .end = 0x8006ffff, 219 .flags = IORESOURCE_MEM, 220 }, 221 }; 222 223 static u64 sa11x0mcp_dma_mask = 0xffffffffUL; 224 225 static struct platform_device sa11x0mcp_device = { 226 .name = "sa11x0-mcp", 227 .id = -1, 228 .dev = { 229 .dma_mask = &sa11x0mcp_dma_mask, 230 .coherent_dma_mask = 0xffffffff, 231 }, 232 .num_resources = ARRAY_SIZE(sa11x0mcp_resources), 233 .resource = sa11x0mcp_resources, 234 }; 235 236 void sa11x0_register_mcp(struct mcp_plat_data *data) 237 { 238 sa11x0_register_device(&sa11x0mcp_device, data); 239 } 240 241 static struct resource sa11x0ssp_resources[] = { 242 [0] = { 243 .start = 0x80070000, 244 .end = 0x8007ffff, 245 .flags = IORESOURCE_MEM, 246 }, 247 }; 248 249 static u64 sa11x0ssp_dma_mask = 0xffffffffUL; 250 251 static struct platform_device sa11x0ssp_device = { 252 .name = "sa11x0-ssp", 253 .id = -1, 254 .dev = { 255 .dma_mask = &sa11x0ssp_dma_mask, 256 .coherent_dma_mask = 0xffffffff, 257 }, 258 .num_resources = ARRAY_SIZE(sa11x0ssp_resources), 259 .resource = sa11x0ssp_resources, 260 }; 261 262 static struct resource sa11x0fb_resources[] = { 263 [0] = { 264 .start = 0xb0100000, 265 .end = 0xb010ffff, 266 .flags = IORESOURCE_MEM, 267 }, 268 [1] = { 269 .start = IRQ_LCD, 270 .end = IRQ_LCD, 271 .flags = IORESOURCE_IRQ, 272 }, 273 }; 274 275 static struct platform_device sa11x0fb_device = { 276 .name = "sa11x0-fb", 277 .id = -1, 278 .dev = { 279 .coherent_dma_mask = 0xffffffff, 280 }, 281 .num_resources = ARRAY_SIZE(sa11x0fb_resources), 282 .resource = sa11x0fb_resources, 283 }; 284 285 static struct platform_device sa11x0pcmcia_device = { 286 .name = "sa11x0-pcmcia", 287 .id = -1, 288 }; 289 290 static struct platform_device sa11x0mtd_device = { 291 .name = "sa1100-mtd", 292 .id = -1, 293 }; 294 295 void sa11x0_register_mtd(struct flash_platform_data *flash, 296 struct resource *res, int nr) 297 { 298 flash->name = "sa1100"; 299 sa11x0mtd_device.resource = res; 300 sa11x0mtd_device.num_resources = nr; 301 sa11x0_register_device(&sa11x0mtd_device, flash); 302 } 303 304 static struct resource sa11x0ir_resources[] = { 305 { 306 .start = __PREG(Ser2UTCR0), 307 .end = __PREG(Ser2UTCR0) + 0x24 - 1, 308 .flags = IORESOURCE_MEM, 309 }, { 310 .start = __PREG(Ser2HSCR0), 311 .end = __PREG(Ser2HSCR0) + 0x1c - 1, 312 .flags = IORESOURCE_MEM, 313 }, { 314 .start = __PREG(Ser2HSCR2), 315 .end = __PREG(Ser2HSCR2) + 0x04 - 1, 316 .flags = IORESOURCE_MEM, 317 }, { 318 .start = IRQ_Ser2ICP, 319 .end = IRQ_Ser2ICP, 320 .flags = IORESOURCE_IRQ, 321 } 322 }; 323 324 static struct platform_device sa11x0ir_device = { 325 .name = "sa11x0-ir", 326 .id = -1, 327 .num_resources = ARRAY_SIZE(sa11x0ir_resources), 328 .resource = sa11x0ir_resources, 329 }; 330 331 void sa11x0_register_irda(struct irda_platform_data *irda) 332 { 333 sa11x0_register_device(&sa11x0ir_device, irda); 334 } 335 336 static struct platform_device sa11x0rtc_device = { 337 .name = "sa1100-rtc", 338 .id = -1, 339 }; 340 341 static struct platform_device *sa11x0_devices[] __initdata = { 342 &sa11x0udc_device, 343 &sa11x0uart1_device, 344 &sa11x0uart3_device, 345 &sa11x0ssp_device, 346 &sa11x0pcmcia_device, 347 &sa11x0fb_device, 348 &sa11x0rtc_device, 349 }; 350 351 static int __init sa1100_init(void) 352 { 353 pm_power_off = sa1100_power_off; 354 return platform_add_devices(sa11x0_devices, ARRAY_SIZE(sa11x0_devices)); 355 } 356 357 arch_initcall(sa1100_init); 358 359 void (*sa1100fb_backlight_power)(int on); 360 void (*sa1100fb_lcd_power)(int on); 361 362 EXPORT_SYMBOL(sa1100fb_backlight_power); 363 EXPORT_SYMBOL(sa1100fb_lcd_power); 364 365 366 /* 367 * Common I/O mapping: 368 * 369 * Typically, static virtual address mappings are as follow: 370 * 371 * 0xf0000000-0xf3ffffff: miscellaneous stuff (CPLDs, etc.) 372 * 0xf4000000-0xf4ffffff: SA-1111 373 * 0xf5000000-0xf5ffffff: reserved (used by cache flushing area) 374 * 0xf6000000-0xfffeffff: reserved (internal SA1100 IO defined above) 375 * 0xffff0000-0xffff0fff: SA1100 exception vectors 376 * 0xffff2000-0xffff2fff: Minicache copy_user_page area 377 * 378 * Below 0xe8000000 is reserved for vm allocation. 379 * 380 * The machine specific code must provide the extra mapping beside the 381 * default mapping provided here. 382 */ 383 384 static struct map_desc standard_io_desc[] __initdata = { 385 { /* PCM */ 386 .virtual = 0xf8000000, 387 .pfn = __phys_to_pfn(0x80000000), 388 .length = 0x00100000, 389 .type = MT_DEVICE 390 }, { /* SCM */ 391 .virtual = 0xfa000000, 392 .pfn = __phys_to_pfn(0x90000000), 393 .length = 0x00100000, 394 .type = MT_DEVICE 395 }, { /* MER */ 396 .virtual = 0xfc000000, 397 .pfn = __phys_to_pfn(0xa0000000), 398 .length = 0x00100000, 399 .type = MT_DEVICE 400 }, { /* LCD + DMA */ 401 .virtual = 0xfe000000, 402 .pfn = __phys_to_pfn(0xb0000000), 403 .length = 0x00200000, 404 .type = MT_DEVICE 405 }, 406 }; 407 408 void __init sa1100_map_io(void) 409 { 410 iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc)); 411 } 412 413 /* 414 * Disable the memory bus request/grant signals on the SA1110 to 415 * ensure that we don't receive spurious memory requests. We set 416 * the MBGNT signal false to ensure the SA1111 doesn't own the 417 * SDRAM bus. 418 */ 419 void __init sa1110_mb_disable(void) 420 { 421 unsigned long flags; 422 423 local_irq_save(flags); 424 425 PGSR &= ~GPIO_MBGNT; 426 GPCR = GPIO_MBGNT; 427 GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT; 428 429 GAFR &= ~(GPIO_MBGNT | GPIO_MBREQ); 430 431 local_irq_restore(flags); 432 } 433 434 /* 435 * If the system is going to use the SA-1111 DMA engines, set up 436 * the memory bus request/grant pins. 437 */ 438 void __devinit sa1110_mb_enable(void) 439 { 440 unsigned long flags; 441 442 local_irq_save(flags); 443 444 PGSR &= ~GPIO_MBGNT; 445 GPCR = GPIO_MBGNT; 446 GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT; 447 448 GAFR |= (GPIO_MBGNT | GPIO_MBREQ); 449 TUCR |= TUCR_MR; 450 451 local_irq_restore(flags); 452 } 453 454