xref: /openbmc/linux/arch/arm/mach-sa1100/clock.c (revision afc98d90)
1 /*
2  *  linux/arch/arm/mach-sa1100/clock.c
3  */
4 #include <linux/module.h>
5 #include <linux/kernel.h>
6 #include <linux/device.h>
7 #include <linux/list.h>
8 #include <linux/errno.h>
9 #include <linux/err.h>
10 #include <linux/string.h>
11 #include <linux/clk.h>
12 #include <linux/spinlock.h>
13 #include <linux/mutex.h>
14 #include <linux/io.h>
15 #include <linux/clkdev.h>
16 
17 #include <mach/hardware.h>
18 
19 struct clkops {
20 	void			(*enable)(struct clk *);
21 	void			(*disable)(struct clk *);
22 };
23 
24 struct clk {
25 	const struct clkops	*ops;
26 	unsigned int		enabled;
27 };
28 
29 #define DEFINE_CLK(_name, _ops)				\
30 struct clk clk_##_name = {				\
31 		.ops	= _ops,				\
32 	}
33 
34 static DEFINE_SPINLOCK(clocks_lock);
35 
36 /* Dummy clk routine to build generic kernel parts that may be using them */
37 unsigned long clk_get_rate(struct clk *clk)
38 {
39 	return 0;
40 }
41 EXPORT_SYMBOL(clk_get_rate);
42 
43 static void clk_gpio27_enable(struct clk *clk)
44 {
45 	/*
46 	 * First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111:
47 	 * (SA-1110 Developer's Manual, section 9.1.2.1)
48 	 */
49 	GAFR |= GPIO_32_768kHz;
50 	GPDR |= GPIO_32_768kHz;
51 	TUCR = TUCR_3_6864MHz;
52 }
53 
54 static void clk_gpio27_disable(struct clk *clk)
55 {
56 	TUCR = 0;
57 	GPDR &= ~GPIO_32_768kHz;
58 	GAFR &= ~GPIO_32_768kHz;
59 }
60 
61 int clk_enable(struct clk *clk)
62 {
63 	unsigned long flags;
64 
65 	if (clk) {
66 		spin_lock_irqsave(&clocks_lock, flags);
67 		if (clk->enabled++ == 0)
68 			clk->ops->enable(clk);
69 		spin_unlock_irqrestore(&clocks_lock, flags);
70 	}
71 
72 	return 0;
73 }
74 EXPORT_SYMBOL(clk_enable);
75 
76 void clk_disable(struct clk *clk)
77 {
78 	unsigned long flags;
79 
80 	if (clk) {
81 		WARN_ON(clk->enabled == 0);
82 		spin_lock_irqsave(&clocks_lock, flags);
83 		if (--clk->enabled == 0)
84 			clk->ops->disable(clk);
85 		spin_unlock_irqrestore(&clocks_lock, flags);
86 	}
87 }
88 EXPORT_SYMBOL(clk_disable);
89 
90 const struct clkops clk_gpio27_ops = {
91 	.enable		= clk_gpio27_enable,
92 	.disable	= clk_gpio27_disable,
93 };
94 
95 static DEFINE_CLK(gpio27, &clk_gpio27_ops);
96 
97 static struct clk_lookup sa11xx_clkregs[] = {
98 	CLKDEV_INIT("sa1111.0", NULL, &clk_gpio27),
99 	CLKDEV_INIT("sa1100-rtc", NULL, NULL),
100 };
101 
102 static int __init sa11xx_clk_init(void)
103 {
104 	clkdev_add_table(sa11xx_clkregs, ARRAY_SIZE(sa11xx_clkregs));
105 	return 0;
106 }
107 core_initcall(sa11xx_clk_init);
108