1 /* 2 * linux/arch/arm/mach-sa1100/assabet.c 3 * 4 * Author: Nicolas Pitre 5 * 6 * This file contains all Assabet-specific tweaks. 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12 #include <linux/init.h> 13 #include <linux/kernel.h> 14 #include <linux/module.h> 15 #include <linux/errno.h> 16 #include <linux/gpio/gpio-reg.h> 17 #include <linux/gpio/machine.h> 18 #include <linux/gpio_keys.h> 19 #include <linux/ioport.h> 20 #include <linux/platform_data/sa11x0-serial.h> 21 #include <linux/regulator/fixed.h> 22 #include <linux/regulator/machine.h> 23 #include <linux/serial_core.h> 24 #include <linux/platform_device.h> 25 #include <linux/mfd/ucb1x00.h> 26 #include <linux/mtd/mtd.h> 27 #include <linux/mtd/partitions.h> 28 #include <linux/delay.h> 29 #include <linux/mm.h> 30 #include <linux/leds.h> 31 #include <linux/slab.h> 32 33 #include <video/sa1100fb.h> 34 35 #include <mach/hardware.h> 36 #include <asm/mach-types.h> 37 #include <asm/setup.h> 38 #include <asm/page.h> 39 #include <asm/pgtable-hwdef.h> 40 #include <asm/pgtable.h> 41 #include <asm/tlbflush.h> 42 43 #include <asm/mach/arch.h> 44 #include <asm/mach/flash.h> 45 #include <linux/platform_data/irda-sa11x0.h> 46 #include <asm/mach/map.h> 47 #include <mach/assabet.h> 48 #include <linux/platform_data/mfd-mcp-sa11x0.h> 49 #include <mach/irqs.h> 50 51 #include "generic.h" 52 53 #define ASSABET_BCR_DB1110 \ 54 (ASSABET_BCR_SPK_OFF | \ 55 ASSABET_BCR_LED_GREEN | ASSABET_BCR_LED_RED | \ 56 ASSABET_BCR_RS232EN | ASSABET_BCR_LCD_12RGB | \ 57 ASSABET_BCR_IRDA_MD0) 58 59 #define ASSABET_BCR_DB1111 \ 60 (ASSABET_BCR_SPK_OFF | \ 61 ASSABET_BCR_LED_GREEN | ASSABET_BCR_LED_RED | \ 62 ASSABET_BCR_RS232EN | ASSABET_BCR_LCD_12RGB | \ 63 ASSABET_BCR_CF_BUS_OFF | ASSABET_BCR_STEREO_LB | \ 64 ASSABET_BCR_IRDA_MD0 | ASSABET_BCR_CF_RST) 65 66 unsigned long SCR_value = ASSABET_SCR_INIT; 67 EXPORT_SYMBOL(SCR_value); 68 69 static struct gpio_chip *assabet_bcr_gc; 70 71 static const char *assabet_names[] = { 72 "cf_pwr", "cf_gfx_reset", "nsoft_reset", "irda_fsel", 73 "irda_md0", "irda_md1", "stereo_loopback", "ncf_bus_on", 74 "audio_pwr_on", "light_pwr_on", "lcd16data", "lcd_pwr_on", 75 "rs232_on", "nred_led", "ngreen_led", "vib_on", 76 "com_dtr", "com_rts", "radio_wake_mod", "i2c_enab", 77 "tvir_enab", "qmute", "radio_pwr_on", "spkr_off", 78 "rs232_valid", "com_dcd", "com_cts", "com_dsr", 79 "radio_cts", "radio_dsr", "radio_dcd", "radio_ri", 80 }; 81 82 /* The old deprecated interface */ 83 void ASSABET_BCR_frob(unsigned int mask, unsigned int val) 84 { 85 unsigned long m = mask, v = val; 86 87 assabet_bcr_gc->set_multiple(assabet_bcr_gc, &m, &v); 88 } 89 EXPORT_SYMBOL(ASSABET_BCR_frob); 90 91 static int __init assabet_init_gpio(void __iomem *reg, u32 def_val) 92 { 93 struct gpio_chip *gc; 94 95 writel_relaxed(def_val, reg); 96 97 gc = gpio_reg_init(NULL, reg, -1, 32, "assabet", 0xff000000, def_val, 98 assabet_names, NULL, NULL); 99 100 if (IS_ERR(gc)) 101 return PTR_ERR(gc); 102 103 assabet_bcr_gc = gc; 104 105 return gc->base; 106 } 107 108 /* 109 * The codec reset goes to three devices, so we need to release 110 * the rest when any one of these requests it. However, that 111 * causes the ADV7171 to consume around 100mA - more than half 112 * the LCD-blanked power. 113 * 114 * With the ADV7171, LCD and backlight enabled, we go over 115 * budget on the MAX846 Li-Ion charger, and if no Li-Ion battery 116 * is connected, the Assabet crashes. 117 */ 118 #define RST_UCB1X00 (1 << 0) 119 #define RST_UDA1341 (1 << 1) 120 #define RST_ADV7171 (1 << 2) 121 122 #define SDA GPIO_GPIO(15) 123 #define SCK GPIO_GPIO(18) 124 #define MOD GPIO_GPIO(17) 125 126 static void adv7171_start(void) 127 { 128 GPSR = SCK; 129 udelay(1); 130 GPSR = SDA; 131 udelay(2); 132 GPCR = SDA; 133 } 134 135 static void adv7171_stop(void) 136 { 137 GPSR = SCK; 138 udelay(2); 139 GPSR = SDA; 140 udelay(1); 141 } 142 143 static void adv7171_send(unsigned byte) 144 { 145 unsigned i; 146 147 for (i = 0; i < 8; i++, byte <<= 1) { 148 GPCR = SCK; 149 udelay(1); 150 if (byte & 0x80) 151 GPSR = SDA; 152 else 153 GPCR = SDA; 154 udelay(1); 155 GPSR = SCK; 156 udelay(1); 157 } 158 GPCR = SCK; 159 udelay(1); 160 GPSR = SDA; 161 udelay(1); 162 GPDR &= ~SDA; 163 GPSR = SCK; 164 udelay(1); 165 if (GPLR & SDA) 166 printk(KERN_WARNING "No ACK from ADV7171\n"); 167 udelay(1); 168 GPCR = SCK | SDA; 169 udelay(1); 170 GPDR |= SDA; 171 udelay(1); 172 } 173 174 static void adv7171_write(unsigned reg, unsigned val) 175 { 176 unsigned gpdr = GPDR; 177 unsigned gplr = GPLR; 178 179 ASSABET_BCR_frob(ASSABET_BCR_AUDIO_ON, ASSABET_BCR_AUDIO_ON); 180 udelay(100); 181 182 GPCR = SDA | SCK | MOD; /* clear L3 mode to ensure UDA1341 doesn't respond */ 183 GPDR = (GPDR | SCK | MOD) & ~SDA; 184 udelay(10); 185 if (!(GPLR & SDA)) 186 printk(KERN_WARNING "Something dragging SDA down?\n"); 187 GPDR |= SDA; 188 189 adv7171_start(); 190 adv7171_send(0x54); 191 adv7171_send(reg); 192 adv7171_send(val); 193 adv7171_stop(); 194 195 /* Restore GPIO state for L3 bus */ 196 GPSR = gplr & (SDA | SCK | MOD); 197 GPCR = (~gplr) & (SDA | SCK | MOD); 198 GPDR = gpdr; 199 } 200 201 static void adv7171_sleep(void) 202 { 203 /* Put the ADV7171 into sleep mode */ 204 adv7171_write(0x04, 0x40); 205 } 206 207 static unsigned codec_nreset; 208 209 static void assabet_codec_reset(unsigned mask, int set) 210 { 211 unsigned long flags; 212 bool old; 213 214 local_irq_save(flags); 215 old = !codec_nreset; 216 if (set) 217 codec_nreset &= ~mask; 218 else 219 codec_nreset |= mask; 220 221 if (old != !codec_nreset) { 222 if (codec_nreset) { 223 ASSABET_BCR_set(ASSABET_BCR_NCODEC_RST); 224 adv7171_sleep(); 225 } else { 226 ASSABET_BCR_clear(ASSABET_BCR_NCODEC_RST); 227 } 228 } 229 local_irq_restore(flags); 230 } 231 232 static void assabet_ucb1x00_reset(enum ucb1x00_reset state) 233 { 234 int set = state == UCB_RST_REMOVE || state == UCB_RST_SUSPEND || 235 state == UCB_RST_PROBE_FAIL; 236 assabet_codec_reset(RST_UCB1X00, set); 237 } 238 239 void assabet_uda1341_reset(int set) 240 { 241 assabet_codec_reset(RST_UDA1341, set); 242 } 243 EXPORT_SYMBOL(assabet_uda1341_reset); 244 245 246 /* 247 * Assabet flash support code. 248 */ 249 250 #ifdef ASSABET_REV_4 251 /* 252 * Phase 4 Assabet has two 28F160B3 flash parts in bank 0: 253 */ 254 static struct mtd_partition assabet_partitions[] = { 255 { 256 .name = "bootloader", 257 .size = 0x00020000, 258 .offset = 0, 259 .mask_flags = MTD_WRITEABLE, 260 }, { 261 .name = "bootloader params", 262 .size = 0x00020000, 263 .offset = MTDPART_OFS_APPEND, 264 .mask_flags = MTD_WRITEABLE, 265 }, { 266 .name = "jffs", 267 .size = MTDPART_SIZ_FULL, 268 .offset = MTDPART_OFS_APPEND, 269 } 270 }; 271 #else 272 /* 273 * Phase 5 Assabet has two 28F128J3A flash parts in bank 0: 274 */ 275 static struct mtd_partition assabet_partitions[] = { 276 { 277 .name = "bootloader", 278 .size = 0x00040000, 279 .offset = 0, 280 .mask_flags = MTD_WRITEABLE, 281 }, { 282 .name = "bootloader params", 283 .size = 0x00040000, 284 .offset = MTDPART_OFS_APPEND, 285 .mask_flags = MTD_WRITEABLE, 286 }, { 287 .name = "jffs", 288 .size = MTDPART_SIZ_FULL, 289 .offset = MTDPART_OFS_APPEND, 290 } 291 }; 292 #endif 293 294 static struct flash_platform_data assabet_flash_data = { 295 .map_name = "cfi_probe", 296 .parts = assabet_partitions, 297 .nr_parts = ARRAY_SIZE(assabet_partitions), 298 }; 299 300 static struct resource assabet_flash_resources[] = { 301 DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M), 302 DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_32M), 303 }; 304 305 306 /* 307 * Assabet IrDA support code. 308 */ 309 310 static int assabet_irda_set_power(struct device *dev, unsigned int state) 311 { 312 static unsigned int bcr_state[4] = { 313 ASSABET_BCR_IRDA_MD0, 314 ASSABET_BCR_IRDA_MD1|ASSABET_BCR_IRDA_MD0, 315 ASSABET_BCR_IRDA_MD1, 316 0 317 }; 318 319 if (state < 4) 320 ASSABET_BCR_frob(ASSABET_BCR_IRDA_MD1 | ASSABET_BCR_IRDA_MD0, 321 bcr_state[state]); 322 return 0; 323 } 324 325 static void assabet_irda_set_speed(struct device *dev, unsigned int speed) 326 { 327 if (speed < 4000000) 328 ASSABET_BCR_clear(ASSABET_BCR_IRDA_FSEL); 329 else 330 ASSABET_BCR_set(ASSABET_BCR_IRDA_FSEL); 331 } 332 333 static struct irda_platform_data assabet_irda_data = { 334 .set_power = assabet_irda_set_power, 335 .set_speed = assabet_irda_set_speed, 336 }; 337 338 static struct ucb1x00_plat_data assabet_ucb1x00_data = { 339 .reset = assabet_ucb1x00_reset, 340 .gpio_base = -1, 341 .can_wakeup = 1, 342 }; 343 344 static struct mcp_plat_data assabet_mcp_data = { 345 .mccr0 = MCCR0_ADM, 346 .sclk_rate = 11981000, 347 .codec_pdata = &assabet_ucb1x00_data, 348 }; 349 350 static void assabet_lcd_set_visual(u32 visual) 351 { 352 u_int is_true_color = visual == FB_VISUAL_TRUECOLOR; 353 354 if (machine_is_assabet()) { 355 #if 1 // phase 4 or newer Assabet's 356 if (is_true_color) 357 ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB); 358 else 359 ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB); 360 #else 361 // older Assabet's 362 if (is_true_color) 363 ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB); 364 else 365 ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB); 366 #endif 367 } 368 } 369 370 #ifndef ASSABET_PAL_VIDEO 371 static void assabet_lcd_backlight_power(int on) 372 { 373 if (on) 374 ASSABET_BCR_set(ASSABET_BCR_LIGHT_ON); 375 else 376 ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON); 377 } 378 379 /* 380 * Turn on/off the backlight. When turning the backlight on, we wait 381 * 500us after turning it on so we don't cause the supplies to droop 382 * when we enable the LCD controller (and cause a hard reset.) 383 */ 384 static void assabet_lcd_power(int on) 385 { 386 if (on) { 387 ASSABET_BCR_set(ASSABET_BCR_LCD_ON); 388 udelay(500); 389 } else 390 ASSABET_BCR_clear(ASSABET_BCR_LCD_ON); 391 } 392 393 /* 394 * The assabet uses a sharp LQ039Q2DS54 LCD module. It is actually 395 * takes an RGB666 signal, but we provide it with an RGB565 signal 396 * instead (def_rgb_16). 397 */ 398 static struct sa1100fb_mach_info lq039q2ds54_info = { 399 .pixclock = 171521, .bpp = 16, 400 .xres = 320, .yres = 240, 401 402 .hsync_len = 5, .vsync_len = 1, 403 .left_margin = 61, .upper_margin = 3, 404 .right_margin = 9, .lower_margin = 0, 405 406 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, 407 408 .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act, 409 .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2), 410 411 .backlight_power = assabet_lcd_backlight_power, 412 .lcd_power = assabet_lcd_power, 413 .set_visual = assabet_lcd_set_visual, 414 }; 415 #else 416 static void assabet_pal_backlight_power(int on) 417 { 418 ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON); 419 } 420 421 static void assabet_pal_power(int on) 422 { 423 ASSABET_BCR_clear(ASSABET_BCR_LCD_ON); 424 } 425 426 static struct sa1100fb_mach_info pal_info = { 427 .pixclock = 67797, .bpp = 16, 428 .xres = 640, .yres = 512, 429 430 .hsync_len = 64, .vsync_len = 6, 431 .left_margin = 125, .upper_margin = 70, 432 .right_margin = 115, .lower_margin = 36, 433 434 .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act, 435 .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(512), 436 437 .backlight_power = assabet_pal_backlight_power, 438 .lcd_power = assabet_pal_power, 439 .set_visual = assabet_lcd_set_visual, 440 }; 441 #endif 442 443 #ifdef CONFIG_ASSABET_NEPONSET 444 static struct resource neponset_resources[] = { 445 DEFINE_RES_MEM(0x10000000, 0x08000000), 446 DEFINE_RES_MEM(0x18000000, 0x04000000), 447 DEFINE_RES_MEM(0x40000000, SZ_8K), 448 DEFINE_RES_IRQ(IRQ_GPIO25), 449 }; 450 #endif 451 452 static struct gpiod_lookup_table assabet_cf_gpio_table = { 453 .dev_id = "sa11x0-pcmcia.1", 454 .table = { 455 GPIO_LOOKUP("gpio", 21, "ready", GPIO_ACTIVE_HIGH), 456 GPIO_LOOKUP("gpio", 22, "detect", GPIO_ACTIVE_LOW), 457 GPIO_LOOKUP("gpio", 24, "bvd2", GPIO_ACTIVE_HIGH), 458 GPIO_LOOKUP("gpio", 25, "bvd1", GPIO_ACTIVE_HIGH), 459 GPIO_LOOKUP("assabet", 1, "reset", GPIO_ACTIVE_HIGH), 460 GPIO_LOOKUP("assabet", 7, "bus-enable", GPIO_ACTIVE_LOW), 461 { }, 462 }, 463 }; 464 465 static struct regulator_consumer_supply assabet_cf_vcc_consumers[] = { 466 REGULATOR_SUPPLY("vcc", "sa11x0-pcmcia.1"), 467 }; 468 469 static struct fixed_voltage_config assabet_cf_vcc_pdata __initdata = { 470 .supply_name = "cf-power", 471 .microvolts = 3300000, 472 }; 473 474 static struct gpiod_lookup_table assabet_cf_vcc_gpio_table = { 475 .dev_id = "reg-fixed-voltage.0", 476 .table = { 477 GPIO_LOOKUP("assabet", 0, NULL, GPIO_ACTIVE_HIGH), 478 { }, 479 }, 480 }; 481 482 static struct gpio_led assabet_leds[] __initdata = { 483 { 484 .name = "assabet:red", 485 .default_trigger = "cpu0", 486 .active_low = 1, 487 .default_state = LEDS_GPIO_DEFSTATE_KEEP, 488 }, { 489 .name = "assabet:green", 490 .default_trigger = "heartbeat", 491 .active_low = 1, 492 .default_state = LEDS_GPIO_DEFSTATE_KEEP, 493 }, 494 }; 495 496 static const struct gpio_led_platform_data assabet_leds_pdata __initconst = { 497 .num_leds = ARRAY_SIZE(assabet_leds), 498 .leds = assabet_leds, 499 }; 500 501 static struct gpio_keys_button assabet_keys_buttons[] = { 502 { 503 .gpio = 0, 504 .irq = IRQ_GPIO0, 505 .desc = "gpio0", 506 .wakeup = 1, 507 .can_disable = 1, 508 .debounce_interval = 5, 509 }, { 510 .gpio = 1, 511 .irq = IRQ_GPIO1, 512 .desc = "gpio1", 513 .wakeup = 1, 514 .can_disable = 1, 515 .debounce_interval = 5, 516 }, 517 }; 518 519 static const struct gpio_keys_platform_data assabet_keys_pdata = { 520 .buttons = assabet_keys_buttons, 521 .nbuttons = ARRAY_SIZE(assabet_keys_buttons), 522 .rep = 0, 523 }; 524 525 static void __init assabet_init(void) 526 { 527 /* 528 * Ensure that the power supply is in "high power" mode. 529 */ 530 GPSR = GPIO_GPIO16; 531 GPDR |= GPIO_GPIO16; 532 533 /* 534 * Ensure that these pins are set as outputs and are driving 535 * logic 0. This ensures that we won't inadvertently toggle 536 * the WS latch in the CPLD, and we don't float causing 537 * excessive power drain. --rmk 538 */ 539 GPCR = GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM; 540 GPDR |= GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM; 541 542 /* 543 * Also set GPIO27 as an output; this is used to clock UART3 544 * via the FPGA and as otherwise has no pullups or pulldowns, 545 * so stop it floating. 546 */ 547 GPCR = GPIO_GPIO27; 548 GPDR |= GPIO_GPIO27; 549 550 /* 551 * Set up registers for sleep mode. 552 */ 553 PWER = PWER_GPIO0; 554 PGSR = 0; 555 PCFR = 0; 556 PSDR = 0; 557 PPDR |= PPC_TXD3 | PPC_TXD1; 558 PPSR |= PPC_TXD3 | PPC_TXD1; 559 560 sa11x0_ppc_configure_mcp(); 561 562 if (machine_has_neponset()) { 563 #ifndef CONFIG_ASSABET_NEPONSET 564 printk( "Warning: Neponset detected but full support " 565 "hasn't been configured in the kernel\n" ); 566 #else 567 platform_device_register_simple("neponset", 0, 568 neponset_resources, ARRAY_SIZE(neponset_resources)); 569 #endif 570 } else { 571 gpiod_add_lookup_table(&assabet_cf_vcc_gpio_table); 572 sa11x0_register_fixed_regulator(0, &assabet_cf_vcc_pdata, 573 assabet_cf_vcc_consumers, 574 ARRAY_SIZE(assabet_cf_vcc_consumers), 575 true); 576 577 } 578 579 platform_device_register_resndata(NULL, "gpio-keys", 0, 580 NULL, 0, 581 &assabet_keys_pdata, 582 sizeof(assabet_keys_pdata)); 583 584 gpio_led_register_device(-1, &assabet_leds_pdata); 585 586 #ifndef ASSABET_PAL_VIDEO 587 sa11x0_register_lcd(&lq039q2ds54_info); 588 #else 589 sa11x0_register_lcd(&pal_video); 590 #endif 591 sa11x0_register_mtd(&assabet_flash_data, assabet_flash_resources, 592 ARRAY_SIZE(assabet_flash_resources)); 593 sa11x0_register_irda(&assabet_irda_data); 594 sa11x0_register_mcp(&assabet_mcp_data); 595 596 if (!machine_has_neponset()) 597 sa11x0_register_pcmcia(1, &assabet_cf_gpio_table); 598 } 599 600 /* 601 * On Assabet, we must probe for the Neponset board _before_ 602 * paging_init() has occurred to actually determine the amount 603 * of RAM available. To do so, we map the appropriate IO section 604 * in the page table here in order to access GPIO registers. 605 */ 606 static void __init map_sa1100_gpio_regs( void ) 607 { 608 unsigned long phys = __PREG(GPLR) & PMD_MASK; 609 unsigned long virt = (unsigned long)io_p2v(phys); 610 int prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_DOMAIN(DOMAIN_IO); 611 pmd_t *pmd; 612 613 pmd = pmd_offset(pud_offset(pgd_offset_k(virt), virt), virt); 614 *pmd = __pmd(phys | prot); 615 flush_pmd_entry(pmd); 616 } 617 618 /* 619 * Read System Configuration "Register" 620 * (taken from "Intel StrongARM SA-1110 Microprocessor Development Board 621 * User's Guide", section 4.4.1) 622 * 623 * This same scan is performed in arch/arm/boot/compressed/head-sa1100.S 624 * to set up the serial port for decompression status messages. We 625 * repeat it here because the kernel may not be loaded as a zImage, and 626 * also because it's a hassle to communicate the SCR value to the kernel 627 * from the decompressor. 628 * 629 * Note that IRQs are guaranteed to be disabled. 630 */ 631 static void __init get_assabet_scr(void) 632 { 633 unsigned long uninitialized_var(scr), i; 634 635 GPDR |= 0x3fc; /* Configure GPIO 9:2 as outputs */ 636 GPSR = 0x3fc; /* Write 0xFF to GPIO 9:2 */ 637 GPDR &= ~(0x3fc); /* Configure GPIO 9:2 as inputs */ 638 for(i = 100; i--; ) /* Read GPIO 9:2 */ 639 scr = GPLR; 640 GPDR |= 0x3fc; /* restore correct pin direction */ 641 scr &= 0x3fc; /* save as system configuration byte. */ 642 SCR_value = scr; 643 } 644 645 static void __init 646 fixup_assabet(struct tag *tags, char **cmdline) 647 { 648 /* This must be done before any call to machine_has_neponset() */ 649 map_sa1100_gpio_regs(); 650 get_assabet_scr(); 651 652 if (machine_has_neponset()) 653 printk("Neponset expansion board detected\n"); 654 } 655 656 657 static void assabet_uart_pm(struct uart_port *port, u_int state, u_int oldstate) 658 { 659 if (port->mapbase == _Ser1UTCR0) { 660 if (state) 661 ASSABET_BCR_clear(ASSABET_BCR_RS232EN | 662 ASSABET_BCR_COM_RTS | 663 ASSABET_BCR_COM_DTR); 664 else 665 ASSABET_BCR_set(ASSABET_BCR_RS232EN | 666 ASSABET_BCR_COM_RTS | 667 ASSABET_BCR_COM_DTR); 668 } 669 } 670 671 /* 672 * Assabet uses COM_RTS and COM_DTR for both UART1 (com port) 673 * and UART3 (radio module). We only handle them for UART1 here. 674 */ 675 static void assabet_set_mctrl(struct uart_port *port, u_int mctrl) 676 { 677 if (port->mapbase == _Ser1UTCR0) { 678 u_int set = 0, clear = 0; 679 680 if (mctrl & TIOCM_RTS) 681 clear |= ASSABET_BCR_COM_RTS; 682 else 683 set |= ASSABET_BCR_COM_RTS; 684 685 if (mctrl & TIOCM_DTR) 686 clear |= ASSABET_BCR_COM_DTR; 687 else 688 set |= ASSABET_BCR_COM_DTR; 689 690 ASSABET_BCR_clear(clear); 691 ASSABET_BCR_set(set); 692 } 693 } 694 695 static u_int assabet_get_mctrl(struct uart_port *port) 696 { 697 u_int ret = 0; 698 u_int bsr = ASSABET_BSR; 699 700 /* need 2 reads to read current value */ 701 bsr = ASSABET_BSR; 702 703 if (port->mapbase == _Ser1UTCR0) { 704 if (bsr & ASSABET_BSR_COM_DCD) 705 ret |= TIOCM_CD; 706 if (bsr & ASSABET_BSR_COM_CTS) 707 ret |= TIOCM_CTS; 708 if (bsr & ASSABET_BSR_COM_DSR) 709 ret |= TIOCM_DSR; 710 } else if (port->mapbase == _Ser3UTCR0) { 711 if (bsr & ASSABET_BSR_RAD_DCD) 712 ret |= TIOCM_CD; 713 if (bsr & ASSABET_BSR_RAD_CTS) 714 ret |= TIOCM_CTS; 715 if (bsr & ASSABET_BSR_RAD_DSR) 716 ret |= TIOCM_DSR; 717 if (bsr & ASSABET_BSR_RAD_RI) 718 ret |= TIOCM_RI; 719 } else { 720 ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR; 721 } 722 723 return ret; 724 } 725 726 static struct sa1100_port_fns assabet_port_fns __initdata = { 727 .set_mctrl = assabet_set_mctrl, 728 .get_mctrl = assabet_get_mctrl, 729 .pm = assabet_uart_pm, 730 }; 731 732 static struct map_desc assabet_io_desc[] __initdata = { 733 { /* Board Control Register */ 734 .virtual = 0xf1000000, 735 .pfn = __phys_to_pfn(0x12000000), 736 .length = 0x00100000, 737 .type = MT_DEVICE 738 }, { /* MQ200 */ 739 .virtual = 0xf2800000, 740 .pfn = __phys_to_pfn(0x4b800000), 741 .length = 0x00800000, 742 .type = MT_DEVICE 743 } 744 }; 745 746 static void __init assabet_map_io(void) 747 { 748 sa1100_map_io(); 749 iotable_init(assabet_io_desc, ARRAY_SIZE(assabet_io_desc)); 750 751 /* 752 * Set SUS bit in SDCR0 so serial port 1 functions. 753 * Its called GPCLKR0 in my SA1110 manual. 754 */ 755 Ser1SDCR0 |= SDCR0_SUS; 756 MSC1 = (MSC1 & ~0xffff) | 757 MSC_NonBrst | MSC_32BitStMem | 758 MSC_RdAcc(2) | MSC_WrAcc(2) | MSC_Rec(0); 759 760 if (!machine_has_neponset()) 761 sa1100_register_uart_fns(&assabet_port_fns); 762 763 /* 764 * When Neponset is attached, the first UART should be 765 * UART3. That's what Angel is doing and many documents 766 * are stating this. 767 * 768 * We do the Neponset mapping even if Neponset support 769 * isn't compiled in so the user will still get something on 770 * the expected physical serial port. 771 * 772 * We no longer do this; not all boot loaders support it, 773 * and UART3 appears to be somewhat unreliable with blob. 774 */ 775 sa1100_register_uart(0, 1); 776 sa1100_register_uart(2, 3); 777 } 778 779 void __init assabet_init_irq(void) 780 { 781 unsigned int assabet_gpio_base; 782 u32 def_val; 783 784 sa1100_init_irq(); 785 786 if (machine_has_neponset()) 787 def_val = ASSABET_BCR_DB1111; 788 else 789 def_val = ASSABET_BCR_DB1110; 790 791 /* 792 * Angel sets this, but other bootloaders may not. 793 * 794 * This must precede any driver calls to BCR_set() or BCR_clear(). 795 */ 796 assabet_gpio_base = assabet_init_gpio((void *)&ASSABET_BCR, def_val); 797 798 assabet_leds[0].gpio = assabet_gpio_base + 13; 799 assabet_leds[1].gpio = assabet_gpio_base + 14; 800 } 801 802 MACHINE_START(ASSABET, "Intel-Assabet") 803 .atag_offset = 0x100, 804 .fixup = fixup_assabet, 805 .map_io = assabet_map_io, 806 .nr_irqs = SA1100_NR_IRQS, 807 .init_irq = assabet_init_irq, 808 .init_time = sa1100_timer_init, 809 .init_machine = assabet_init, 810 .init_late = sa11x0_init_late, 811 #ifdef CONFIG_SA1111 812 .dma_zone_size = SZ_1M, 813 #endif 814 .restart = sa11x0_restart, 815 MACHINE_END 816