xref: /openbmc/linux/arch/arm/mach-sa1100/assabet.c (revision 84e6ffb2)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * linux/arch/arm/mach-sa1100/assabet.c
4  *
5  * Author: Nicolas Pitre
6  *
7  * This file contains all Assabet-specific tweaks.
8  */
9 #include <linux/init.h>
10 #include <linux/kernel.h>
11 #include <linux/module.h>
12 #include <linux/errno.h>
13 #include <linux/gpio/gpio-reg.h>
14 #include <linux/gpio/machine.h>
15 #include <linux/gpio_keys.h>
16 #include <linux/ioport.h>
17 #include <linux/platform_data/sa11x0-serial.h>
18 #include <linux/regulator/fixed.h>
19 #include <linux/regulator/machine.h>
20 #include <linux/serial_core.h>
21 #include <linux/platform_device.h>
22 #include <linux/mfd/ucb1x00.h>
23 #include <linux/mtd/mtd.h>
24 #include <linux/mtd/partitions.h>
25 #include <linux/delay.h>
26 #include <linux/mm.h>
27 #include <linux/leds.h>
28 #include <linux/slab.h>
29 
30 #include <video/sa1100fb.h>
31 
32 #include <mach/hardware.h>
33 #include <asm/mach-types.h>
34 #include <asm/setup.h>
35 #include <asm/page.h>
36 #include <asm/pgtable-hwdef.h>
37 #include <asm/pgtable.h>
38 #include <asm/tlbflush.h>
39 
40 #include <asm/mach/arch.h>
41 #include <asm/mach/flash.h>
42 #include <linux/platform_data/irda-sa11x0.h>
43 #include <asm/mach/map.h>
44 #include <mach/assabet.h>
45 #include <linux/platform_data/mfd-mcp-sa11x0.h>
46 #include <mach/irqs.h>
47 
48 #include "generic.h"
49 
50 #define ASSABET_BCR_DB1110 \
51 	(ASSABET_BCR_SPK_OFF    | \
52 	 ASSABET_BCR_LED_GREEN  | ASSABET_BCR_LED_RED   | \
53 	 ASSABET_BCR_RS232EN    | ASSABET_BCR_LCD_12RGB | \
54 	 ASSABET_BCR_IRDA_MD0)
55 
56 #define ASSABET_BCR_DB1111 \
57 	(ASSABET_BCR_SPK_OFF    | \
58 	 ASSABET_BCR_LED_GREEN  | ASSABET_BCR_LED_RED   | \
59 	 ASSABET_BCR_RS232EN    | ASSABET_BCR_LCD_12RGB | \
60 	 ASSABET_BCR_CF_BUS_OFF | ASSABET_BCR_STEREO_LB | \
61 	 ASSABET_BCR_IRDA_MD0   | ASSABET_BCR_CF_RST)
62 
63 unsigned long SCR_value = ASSABET_SCR_INIT;
64 EXPORT_SYMBOL(SCR_value);
65 
66 static struct gpio_chip *assabet_bcr_gc;
67 
68 static const char *assabet_names[] = {
69 	"cf_pwr", "cf_gfx_reset", "nsoft_reset", "irda_fsel",
70 	"irda_md0", "irda_md1", "stereo_loopback", "ncf_bus_on",
71 	"audio_pwr_on", "light_pwr_on", "lcd16data", "lcd_pwr_on",
72 	"rs232_on", "nred_led", "ngreen_led", "vib_on",
73 	"com_dtr", "com_rts", "radio_wake_mod", "i2c_enab",
74 	"tvir_enab", "qmute", "radio_pwr_on", "spkr_off",
75 	"rs232_valid", "com_dcd", "com_cts", "com_dsr",
76 	"radio_cts", "radio_dsr", "radio_dcd", "radio_ri",
77 };
78 
79 /* The old deprecated interface */
80 void ASSABET_BCR_frob(unsigned int mask, unsigned int val)
81 {
82 	unsigned long m = mask, v = val;
83 
84 	assabet_bcr_gc->set_multiple(assabet_bcr_gc, &m, &v);
85 }
86 EXPORT_SYMBOL(ASSABET_BCR_frob);
87 
88 static int __init assabet_init_gpio(void __iomem *reg, u32 def_val)
89 {
90 	struct gpio_chip *gc;
91 
92 	writel_relaxed(def_val, reg);
93 
94 	gc = gpio_reg_init(NULL, reg, -1, 32, "assabet", 0xff000000, def_val,
95 			   assabet_names, NULL, NULL);
96 
97 	if (IS_ERR(gc))
98 		return PTR_ERR(gc);
99 
100 	assabet_bcr_gc = gc;
101 
102 	return gc->base;
103 }
104 
105 /*
106  * The codec reset goes to three devices, so we need to release
107  * the rest when any one of these requests it.  However, that
108  * causes the ADV7171 to consume around 100mA - more than half
109  * the LCD-blanked power.
110  *
111  * With the ADV7171, LCD and backlight enabled, we go over
112  * budget on the MAX846 Li-Ion charger, and if no Li-Ion battery
113  * is connected, the Assabet crashes.
114  */
115 #define RST_UCB1X00 (1 << 0)
116 #define RST_UDA1341 (1 << 1)
117 #define RST_ADV7171 (1 << 2)
118 
119 #define SDA GPIO_GPIO(15)
120 #define SCK GPIO_GPIO(18)
121 #define MOD GPIO_GPIO(17)
122 
123 static void adv7171_start(void)
124 {
125 	GPSR = SCK;
126 	udelay(1);
127 	GPSR = SDA;
128 	udelay(2);
129 	GPCR = SDA;
130 }
131 
132 static void adv7171_stop(void)
133 {
134 	GPSR = SCK;
135 	udelay(2);
136 	GPSR = SDA;
137 	udelay(1);
138 }
139 
140 static void adv7171_send(unsigned byte)
141 {
142 	unsigned i;
143 
144 	for (i = 0; i < 8; i++, byte <<= 1) {
145 		GPCR = SCK;
146 		udelay(1);
147 		if (byte & 0x80)
148 			GPSR = SDA;
149 		else
150 			GPCR = SDA;
151 		udelay(1);
152 		GPSR = SCK;
153 		udelay(1);
154 	}
155 	GPCR = SCK;
156 	udelay(1);
157 	GPSR = SDA;
158 	udelay(1);
159 	GPDR &= ~SDA;
160 	GPSR = SCK;
161 	udelay(1);
162 	if (GPLR & SDA)
163 		printk(KERN_WARNING "No ACK from ADV7171\n");
164 	udelay(1);
165 	GPCR = SCK | SDA;
166 	udelay(1);
167 	GPDR |= SDA;
168 	udelay(1);
169 }
170 
171 static void adv7171_write(unsigned reg, unsigned val)
172 {
173 	unsigned gpdr = GPDR;
174 	unsigned gplr = GPLR;
175 
176 	ASSABET_BCR_frob(ASSABET_BCR_AUDIO_ON, ASSABET_BCR_AUDIO_ON);
177 	udelay(100);
178 
179 	GPCR = SDA | SCK | MOD; /* clear L3 mode to ensure UDA1341 doesn't respond */
180 	GPDR = (GPDR | SCK | MOD) & ~SDA;
181 	udelay(10);
182 	if (!(GPLR & SDA))
183 		printk(KERN_WARNING "Something dragging SDA down?\n");
184 	GPDR |= SDA;
185 
186 	adv7171_start();
187 	adv7171_send(0x54);
188 	adv7171_send(reg);
189 	adv7171_send(val);
190 	adv7171_stop();
191 
192 	/* Restore GPIO state for L3 bus */
193 	GPSR = gplr & (SDA | SCK | MOD);
194 	GPCR = (~gplr) & (SDA | SCK | MOD);
195 	GPDR = gpdr;
196 }
197 
198 static void adv7171_sleep(void)
199 {
200 	/* Put the ADV7171 into sleep mode */
201 	adv7171_write(0x04, 0x40);
202 }
203 
204 static unsigned codec_nreset;
205 
206 static void assabet_codec_reset(unsigned mask, int set)
207 {
208 	unsigned long flags;
209 	bool old;
210 
211 	local_irq_save(flags);
212 	old = !codec_nreset;
213 	if (set)
214 		codec_nreset &= ~mask;
215 	else
216 		codec_nreset |= mask;
217 
218 	if (old != !codec_nreset) {
219 		if (codec_nreset) {
220 			ASSABET_BCR_set(ASSABET_BCR_NCODEC_RST);
221 			adv7171_sleep();
222 		} else {
223 			ASSABET_BCR_clear(ASSABET_BCR_NCODEC_RST);
224 		}
225 	}
226 	local_irq_restore(flags);
227 }
228 
229 static void assabet_ucb1x00_reset(enum ucb1x00_reset state)
230 {
231 	int set = state == UCB_RST_REMOVE || state == UCB_RST_SUSPEND ||
232 		state == UCB_RST_PROBE_FAIL;
233 	assabet_codec_reset(RST_UCB1X00, set);
234 }
235 
236 void assabet_uda1341_reset(int set)
237 {
238 	assabet_codec_reset(RST_UDA1341, set);
239 }
240 EXPORT_SYMBOL(assabet_uda1341_reset);
241 
242 
243 /*
244  * Assabet flash support code.
245  */
246 
247 #ifdef ASSABET_REV_4
248 /*
249  * Phase 4 Assabet has two 28F160B3 flash parts in bank 0:
250  */
251 static struct mtd_partition assabet_partitions[] = {
252 	{
253 		.name		= "bootloader",
254 		.size		= 0x00020000,
255 		.offset		= 0,
256 		.mask_flags	= MTD_WRITEABLE,
257 	}, {
258 		.name		= "bootloader params",
259 		.size		= 0x00020000,
260 		.offset		= MTDPART_OFS_APPEND,
261 		.mask_flags	= MTD_WRITEABLE,
262 	}, {
263 		.name		= "jffs",
264 		.size		= MTDPART_SIZ_FULL,
265 		.offset		= MTDPART_OFS_APPEND,
266 	}
267 };
268 #else
269 /*
270  * Phase 5 Assabet has two 28F128J3A flash parts in bank 0:
271  */
272 static struct mtd_partition assabet_partitions[] = {
273 	{
274 		.name		= "bootloader",
275 		.size		= 0x00040000,
276 		.offset		= 0,
277 		.mask_flags	= MTD_WRITEABLE,
278 	}, {
279 		.name		= "bootloader params",
280 		.size		= 0x00040000,
281 		.offset		= MTDPART_OFS_APPEND,
282 		.mask_flags	= MTD_WRITEABLE,
283 	}, {
284 		.name		= "jffs",
285 		.size		= MTDPART_SIZ_FULL,
286 		.offset		= MTDPART_OFS_APPEND,
287 	}
288 };
289 #endif
290 
291 static struct flash_platform_data assabet_flash_data = {
292 	.map_name	= "cfi_probe",
293 	.parts		= assabet_partitions,
294 	.nr_parts	= ARRAY_SIZE(assabet_partitions),
295 };
296 
297 static struct resource assabet_flash_resources[] = {
298 	DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M),
299 	DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_32M),
300 };
301 
302 
303 /*
304  * Assabet IrDA support code.
305  */
306 
307 static int assabet_irda_set_power(struct device *dev, unsigned int state)
308 {
309 	static unsigned int bcr_state[4] = {
310 		ASSABET_BCR_IRDA_MD0,
311 		ASSABET_BCR_IRDA_MD1|ASSABET_BCR_IRDA_MD0,
312 		ASSABET_BCR_IRDA_MD1,
313 		0
314 	};
315 
316 	if (state < 4)
317 		ASSABET_BCR_frob(ASSABET_BCR_IRDA_MD1 | ASSABET_BCR_IRDA_MD0,
318 				 bcr_state[state]);
319 	return 0;
320 }
321 
322 static void assabet_irda_set_speed(struct device *dev, unsigned int speed)
323 {
324 	if (speed < 4000000)
325 		ASSABET_BCR_clear(ASSABET_BCR_IRDA_FSEL);
326 	else
327 		ASSABET_BCR_set(ASSABET_BCR_IRDA_FSEL);
328 }
329 
330 static struct irda_platform_data assabet_irda_data = {
331 	.set_power	= assabet_irda_set_power,
332 	.set_speed	= assabet_irda_set_speed,
333 };
334 
335 static struct ucb1x00_plat_data assabet_ucb1x00_data = {
336 	.reset		= assabet_ucb1x00_reset,
337 	.gpio_base	= -1,
338 	.can_wakeup	= 1,
339 };
340 
341 static struct mcp_plat_data assabet_mcp_data = {
342 	.mccr0		= MCCR0_ADM,
343 	.sclk_rate	= 11981000,
344 	.codec_pdata	= &assabet_ucb1x00_data,
345 };
346 
347 static void assabet_lcd_set_visual(u32 visual)
348 {
349 	u_int is_true_color = visual == FB_VISUAL_TRUECOLOR;
350 
351 	if (machine_is_assabet()) {
352 #if 1		// phase 4 or newer Assabet's
353 		if (is_true_color)
354 			ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
355 		else
356 			ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
357 #else
358 		// older Assabet's
359 		if (is_true_color)
360 			ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
361 		else
362 			ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
363 #endif
364 	}
365 }
366 
367 #ifndef ASSABET_PAL_VIDEO
368 static void assabet_lcd_backlight_power(int on)
369 {
370 	if (on)
371 		ASSABET_BCR_set(ASSABET_BCR_LIGHT_ON);
372 	else
373 		ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
374 }
375 
376 /*
377  * Turn on/off the backlight.  When turning the backlight on, we wait
378  * 500us after turning it on so we don't cause the supplies to droop
379  * when we enable the LCD controller (and cause a hard reset.)
380  */
381 static void assabet_lcd_power(int on)
382 {
383 	if (on) {
384 		ASSABET_BCR_set(ASSABET_BCR_LCD_ON);
385 		udelay(500);
386 	} else
387 		ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
388 }
389 
390 /*
391  * The assabet uses a sharp LQ039Q2DS54 LCD module.  It is actually
392  * takes an RGB666 signal, but we provide it with an RGB565 signal
393  * instead (def_rgb_16).
394  */
395 static struct sa1100fb_mach_info lq039q2ds54_info = {
396 	.pixclock	= 171521,	.bpp		= 16,
397 	.xres		= 320,		.yres		= 240,
398 
399 	.hsync_len	= 5,		.vsync_len	= 1,
400 	.left_margin	= 61,		.upper_margin	= 3,
401 	.right_margin	= 9,		.lower_margin	= 0,
402 
403 	.sync		= FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
404 
405 	.lccr0		= LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
406 	.lccr3		= LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2),
407 
408 	.backlight_power = assabet_lcd_backlight_power,
409 	.lcd_power = assabet_lcd_power,
410 	.set_visual = assabet_lcd_set_visual,
411 };
412 #else
413 static void assabet_pal_backlight_power(int on)
414 {
415 	ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
416 }
417 
418 static void assabet_pal_power(int on)
419 {
420 	ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
421 }
422 
423 static struct sa1100fb_mach_info pal_info = {
424 	.pixclock	= 67797,	.bpp		= 16,
425 	.xres		= 640,		.yres		= 512,
426 
427 	.hsync_len	= 64,		.vsync_len	= 6,
428 	.left_margin	= 125,		.upper_margin	= 70,
429 	.right_margin	= 115,		.lower_margin	= 36,
430 
431 	.lccr0		= LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
432 	.lccr3		= LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(512),
433 
434 	.backlight_power = assabet_pal_backlight_power,
435 	.lcd_power = assabet_pal_power,
436 	.set_visual = assabet_lcd_set_visual,
437 };
438 #endif
439 
440 #ifdef CONFIG_ASSABET_NEPONSET
441 static struct resource neponset_resources[] = {
442 	DEFINE_RES_MEM(0x10000000, 0x08000000),
443 	DEFINE_RES_MEM(0x18000000, 0x04000000),
444 	DEFINE_RES_MEM(0x40000000, SZ_8K),
445 	DEFINE_RES_IRQ(IRQ_GPIO25),
446 };
447 #endif
448 
449 static struct gpiod_lookup_table assabet_cf_gpio_table = {
450 	.dev_id = "sa11x0-pcmcia.1",
451 	.table = {
452 		GPIO_LOOKUP("gpio", 21, "ready", GPIO_ACTIVE_HIGH),
453 		GPIO_LOOKUP("gpio", 22, "detect", GPIO_ACTIVE_LOW),
454 		GPIO_LOOKUP("gpio", 24, "bvd2", GPIO_ACTIVE_HIGH),
455 		GPIO_LOOKUP("gpio", 25, "bvd1", GPIO_ACTIVE_HIGH),
456 		GPIO_LOOKUP("assabet", 1, "reset", GPIO_ACTIVE_HIGH),
457 		GPIO_LOOKUP("assabet", 7, "bus-enable", GPIO_ACTIVE_LOW),
458 		{ },
459 	},
460 };
461 
462 static struct regulator_consumer_supply assabet_cf_vcc_consumers[] = {
463 	REGULATOR_SUPPLY("vcc", "sa11x0-pcmcia.1"),
464 };
465 
466 static struct fixed_voltage_config assabet_cf_vcc_pdata __initdata = {
467 	.supply_name = "cf-power",
468 	.microvolts = 3300000,
469 };
470 
471 static struct gpiod_lookup_table assabet_cf_vcc_gpio_table = {
472 	.dev_id = "reg-fixed-voltage.0",
473 	.table = {
474 		GPIO_LOOKUP("assabet", 0, NULL, GPIO_ACTIVE_HIGH),
475 		{ },
476 	},
477 };
478 
479 static struct gpio_led assabet_leds[] __initdata = {
480 	{
481 		.name = "assabet:red",
482 		.default_trigger = "cpu0",
483 		.active_low = 1,
484 		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
485 	}, {
486 		.name = "assabet:green",
487 		.default_trigger = "heartbeat",
488 		.active_low = 1,
489 		.default_state = LEDS_GPIO_DEFSTATE_KEEP,
490 	},
491 };
492 
493 static const struct gpio_led_platform_data assabet_leds_pdata __initconst = {
494 	.num_leds = ARRAY_SIZE(assabet_leds),
495 	.leds = assabet_leds,
496 };
497 
498 static struct gpio_keys_button assabet_keys_buttons[] = {
499 	{
500 		.gpio = 0,
501 		.irq = IRQ_GPIO0,
502 		.desc = "gpio0",
503 		.wakeup = 1,
504 		.can_disable = 1,
505 		.debounce_interval = 5,
506 	}, {
507 		.gpio = 1,
508 		.irq = IRQ_GPIO1,
509 		.desc = "gpio1",
510 		.wakeup = 1,
511 		.can_disable = 1,
512 		.debounce_interval = 5,
513 	},
514 };
515 
516 static const struct gpio_keys_platform_data assabet_keys_pdata = {
517 	.buttons = assabet_keys_buttons,
518 	.nbuttons = ARRAY_SIZE(assabet_keys_buttons),
519 	.rep = 0,
520 };
521 
522 static struct gpiod_lookup_table assabet_uart1_gpio_table = {
523 	.dev_id = "sa11x0-uart.1",
524 	.table = {
525 		GPIO_LOOKUP("assabet", 16, "dtr", GPIO_ACTIVE_LOW),
526 		GPIO_LOOKUP("assabet", 17, "rts", GPIO_ACTIVE_LOW),
527 		GPIO_LOOKUP("assabet", 25, "dcd", GPIO_ACTIVE_LOW),
528 		GPIO_LOOKUP("assabet", 26, "cts", GPIO_ACTIVE_LOW),
529 		GPIO_LOOKUP("assabet", 27, "dsr", GPIO_ACTIVE_LOW),
530 		{ },
531 	},
532 };
533 
534 static struct gpiod_lookup_table assabet_uart3_gpio_table = {
535 	.dev_id = "sa11x0-uart.3",
536 	.table = {
537 		GPIO_LOOKUP("assabet", 28, "cts", GPIO_ACTIVE_LOW),
538 		GPIO_LOOKUP("assabet", 29, "dsr", GPIO_ACTIVE_LOW),
539 		GPIO_LOOKUP("assabet", 30, "dcd", GPIO_ACTIVE_LOW),
540 		GPIO_LOOKUP("assabet", 31, "rng", GPIO_ACTIVE_LOW),
541 		{ },
542 	},
543 };
544 
545 static void __init assabet_init(void)
546 {
547 	/*
548 	 * Ensure that the power supply is in "high power" mode.
549 	 */
550 	GPSR = GPIO_GPIO16;
551 	GPDR |= GPIO_GPIO16;
552 
553 	/*
554 	 * Ensure that these pins are set as outputs and are driving
555 	 * logic 0.  This ensures that we won't inadvertently toggle
556 	 * the WS latch in the CPLD, and we don't float causing
557 	 * excessive power drain.  --rmk
558 	 */
559 	GPCR = GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
560 	GPDR |= GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
561 
562 	/*
563 	 * Also set GPIO27 as an output; this is used to clock UART3
564 	 * via the FPGA and as otherwise has no pullups or pulldowns,
565 	 * so stop it floating.
566 	 */
567 	GPCR = GPIO_GPIO27;
568 	GPDR |= GPIO_GPIO27;
569 
570 	/*
571 	 * Set up registers for sleep mode.
572 	 */
573 	PWER = PWER_GPIO0;
574 	PGSR = 0;
575 	PCFR = 0;
576 	PSDR = 0;
577 	PPDR |= PPC_TXD3 | PPC_TXD1;
578 	PPSR |= PPC_TXD3 | PPC_TXD1;
579 
580 	sa11x0_ppc_configure_mcp();
581 
582 	if (machine_has_neponset()) {
583 #ifndef CONFIG_ASSABET_NEPONSET
584 		printk( "Warning: Neponset detected but full support "
585 			"hasn't been configured in the kernel\n" );
586 #else
587 		platform_device_register_simple("neponset", 0,
588 			neponset_resources, ARRAY_SIZE(neponset_resources));
589 #endif
590 	} else {
591 		gpiod_add_lookup_table(&assabet_uart1_gpio_table);
592 		gpiod_add_lookup_table(&assabet_uart3_gpio_table);
593 		gpiod_add_lookup_table(&assabet_cf_vcc_gpio_table);
594 
595 		sa11x0_register_fixed_regulator(0, &assabet_cf_vcc_pdata,
596 					assabet_cf_vcc_consumers,
597 					ARRAY_SIZE(assabet_cf_vcc_consumers),
598 					true);
599 
600 	}
601 
602 	platform_device_register_resndata(NULL, "gpio-keys", 0,
603 					  NULL, 0,
604 					  &assabet_keys_pdata,
605 					  sizeof(assabet_keys_pdata));
606 
607 	gpio_led_register_device(-1, &assabet_leds_pdata);
608 
609 #ifndef ASSABET_PAL_VIDEO
610 	sa11x0_register_lcd(&lq039q2ds54_info);
611 #else
612 	sa11x0_register_lcd(&pal_video);
613 #endif
614 	sa11x0_register_mtd(&assabet_flash_data, assabet_flash_resources,
615 			    ARRAY_SIZE(assabet_flash_resources));
616 	sa11x0_register_irda(&assabet_irda_data);
617 	sa11x0_register_mcp(&assabet_mcp_data);
618 
619 	if (!machine_has_neponset())
620 		sa11x0_register_pcmcia(1, &assabet_cf_gpio_table);
621 }
622 
623 /*
624  * On Assabet, we must probe for the Neponset board _before_
625  * paging_init() has occurred to actually determine the amount
626  * of RAM available.  To do so, we map the appropriate IO section
627  * in the page table here in order to access GPIO registers.
628  */
629 static void __init map_sa1100_gpio_regs( void )
630 {
631 	unsigned long phys = __PREG(GPLR) & PMD_MASK;
632 	unsigned long virt = (unsigned long)io_p2v(phys);
633 	int prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_DOMAIN(DOMAIN_IO);
634 	pmd_t *pmd;
635 
636 	pmd = pmd_offset(pud_offset(p4d_offset(pgd_offset_k(virt), virt), virt), virt);
637 	*pmd = __pmd(phys | prot);
638 	flush_pmd_entry(pmd);
639 }
640 
641 /*
642  * Read System Configuration "Register"
643  * (taken from "Intel StrongARM SA-1110 Microprocessor Development Board
644  * User's Guide", section 4.4.1)
645  *
646  * This same scan is performed in arch/arm/boot/compressed/head-sa1100.S
647  * to set up the serial port for decompression status messages. We
648  * repeat it here because the kernel may not be loaded as a zImage, and
649  * also because it's a hassle to communicate the SCR value to the kernel
650  * from the decompressor.
651  *
652  * Note that IRQs are guaranteed to be disabled.
653  */
654 static void __init get_assabet_scr(void)
655 {
656 	unsigned long uninitialized_var(scr), i;
657 
658 	GPDR |= 0x3fc;			/* Configure GPIO 9:2 as outputs */
659 	GPSR = 0x3fc;			/* Write 0xFF to GPIO 9:2 */
660 	GPDR &= ~(0x3fc);		/* Configure GPIO 9:2 as inputs */
661 	for(i = 100; i--; )		/* Read GPIO 9:2 */
662 		scr = GPLR;
663 	GPDR |= 0x3fc;			/*  restore correct pin direction */
664 	scr &= 0x3fc;			/* save as system configuration byte. */
665 	SCR_value = scr;
666 }
667 
668 static void __init
669 fixup_assabet(struct tag *tags, char **cmdline)
670 {
671 	/* This must be done before any call to machine_has_neponset() */
672 	map_sa1100_gpio_regs();
673 	get_assabet_scr();
674 
675 	if (machine_has_neponset())
676 		printk("Neponset expansion board detected\n");
677 }
678 
679 
680 static void assabet_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
681 {
682 	if (port->mapbase == _Ser1UTCR0) {
683 		if (state)
684 			ASSABET_BCR_clear(ASSABET_BCR_RS232EN);
685 		else
686 			ASSABET_BCR_set(ASSABET_BCR_RS232EN);
687 	}
688 }
689 
690 static struct sa1100_port_fns assabet_port_fns __initdata = {
691 	.pm		= assabet_uart_pm,
692 };
693 
694 static struct map_desc assabet_io_desc[] __initdata = {
695   	{	/* Board Control Register */
696 		.virtual	=  0xf1000000,
697 		.pfn		= __phys_to_pfn(0x12000000),
698 		.length		= 0x00100000,
699 		.type		= MT_DEVICE
700 	}, {	/* MQ200 */
701 		.virtual	=  0xf2800000,
702 		.pfn		= __phys_to_pfn(0x4b800000),
703 		.length		= 0x00800000,
704 		.type		= MT_DEVICE
705 	}
706 };
707 
708 static void __init assabet_map_io(void)
709 {
710 	sa1100_map_io();
711 	iotable_init(assabet_io_desc, ARRAY_SIZE(assabet_io_desc));
712 
713 	/*
714 	 * Set SUS bit in SDCR0 so serial port 1 functions.
715 	 * Its called GPCLKR0 in my SA1110 manual.
716 	 */
717 	Ser1SDCR0 |= SDCR0_SUS;
718 	MSC1 = (MSC1 & ~0xffff) |
719 		MSC_NonBrst | MSC_32BitStMem |
720 		MSC_RdAcc(2) | MSC_WrAcc(2) | MSC_Rec(0);
721 
722 	if (!machine_has_neponset())
723 		sa1100_register_uart_fns(&assabet_port_fns);
724 
725 	/*
726 	 * When Neponset is attached, the first UART should be
727 	 * UART3.  That's what Angel is doing and many documents
728 	 * are stating this.
729 	 *
730 	 * We do the Neponset mapping even if Neponset support
731 	 * isn't compiled in so the user will still get something on
732 	 * the expected physical serial port.
733 	 *
734 	 * We no longer do this; not all boot loaders support it,
735 	 * and UART3 appears to be somewhat unreliable with blob.
736 	 */
737 	sa1100_register_uart(0, 1);
738 	sa1100_register_uart(2, 3);
739 }
740 
741 void __init assabet_init_irq(void)
742 {
743 	unsigned int assabet_gpio_base;
744 	u32 def_val;
745 
746 	sa1100_init_irq();
747 
748 	if (machine_has_neponset())
749 		def_val = ASSABET_BCR_DB1111;
750 	else
751 		def_val = ASSABET_BCR_DB1110;
752 
753 	/*
754 	 * Angel sets this, but other bootloaders may not.
755 	 *
756 	 * This must precede any driver calls to BCR_set() or BCR_clear().
757 	 */
758 	assabet_gpio_base = assabet_init_gpio((void *)&ASSABET_BCR, def_val);
759 
760 	assabet_leds[0].gpio = assabet_gpio_base + 13;
761 	assabet_leds[1].gpio = assabet_gpio_base + 14;
762 }
763 
764 MACHINE_START(ASSABET, "Intel-Assabet")
765 	.atag_offset	= 0x100,
766 	.fixup		= fixup_assabet,
767 	.map_io		= assabet_map_io,
768 	.nr_irqs	= SA1100_NR_IRQS,
769 	.init_irq	= assabet_init_irq,
770 	.init_time	= sa1100_timer_init,
771 	.init_machine	= assabet_init,
772 	.init_late	= sa11x0_init_late,
773 #ifdef CONFIG_SA1111
774 	.dma_zone_size	= SZ_1M,
775 #endif
776 	.restart	= sa11x0_restart,
777 MACHINE_END
778