xref: /openbmc/linux/arch/arm/mach-sa1100/assabet.c (revision 6d99a79c)
1 /*
2  * linux/arch/arm/mach-sa1100/assabet.c
3  *
4  * Author: Nicolas Pitre
5  *
6  * This file contains all Assabet-specific tweaks.
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  */
12 #include <linux/init.h>
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/errno.h>
16 #include <linux/gpio/gpio-reg.h>
17 #include <linux/gpio/machine.h>
18 #include <linux/ioport.h>
19 #include <linux/platform_data/sa11x0-serial.h>
20 #include <linux/regulator/fixed.h>
21 #include <linux/regulator/machine.h>
22 #include <linux/serial_core.h>
23 #include <linux/platform_device.h>
24 #include <linux/mfd/ucb1x00.h>
25 #include <linux/mtd/mtd.h>
26 #include <linux/mtd/partitions.h>
27 #include <linux/delay.h>
28 #include <linux/mm.h>
29 #include <linux/leds.h>
30 #include <linux/slab.h>
31 
32 #include <video/sa1100fb.h>
33 
34 #include <mach/hardware.h>
35 #include <asm/mach-types.h>
36 #include <asm/setup.h>
37 #include <asm/page.h>
38 #include <asm/pgtable-hwdef.h>
39 #include <asm/pgtable.h>
40 #include <asm/tlbflush.h>
41 
42 #include <asm/mach/arch.h>
43 #include <asm/mach/flash.h>
44 #include <linux/platform_data/irda-sa11x0.h>
45 #include <asm/mach/map.h>
46 #include <mach/assabet.h>
47 #include <linux/platform_data/mfd-mcp-sa11x0.h>
48 #include <mach/irqs.h>
49 
50 #include "generic.h"
51 
52 #define ASSABET_BCR_DB1110 \
53 	(ASSABET_BCR_SPK_OFF    | \
54 	 ASSABET_BCR_LED_GREEN  | ASSABET_BCR_LED_RED   | \
55 	 ASSABET_BCR_RS232EN    | ASSABET_BCR_LCD_12RGB | \
56 	 ASSABET_BCR_IRDA_MD0)
57 
58 #define ASSABET_BCR_DB1111 \
59 	(ASSABET_BCR_SPK_OFF    | \
60 	 ASSABET_BCR_LED_GREEN  | ASSABET_BCR_LED_RED   | \
61 	 ASSABET_BCR_RS232EN    | ASSABET_BCR_LCD_12RGB | \
62 	 ASSABET_BCR_CF_BUS_OFF | ASSABET_BCR_STEREO_LB | \
63 	 ASSABET_BCR_IRDA_MD0   | ASSABET_BCR_CF_RST)
64 
65 unsigned long SCR_value = ASSABET_SCR_INIT;
66 EXPORT_SYMBOL(SCR_value);
67 
68 static struct gpio_chip *assabet_bcr_gc;
69 
70 static const char *assabet_names[] = {
71 	"cf_pwr", "cf_gfx_reset", "nsoft_reset", "irda_fsel",
72 	"irda_md0", "irda_md1", "stereo_loopback", "ncf_bus_on",
73 	"audio_pwr_on", "light_pwr_on", "lcd16data", "lcd_pwr_on",
74 	"rs232_on", "nred_led", "ngreen_led", "vib_on",
75 	"com_dtr", "com_rts", "radio_wake_mod", "i2c_enab",
76 	"tvir_enab", "qmute", "radio_pwr_on", "spkr_off",
77 	"rs232_valid", "com_dcd", "com_cts", "com_dsr",
78 	"radio_cts", "radio_dsr", "radio_dcd", "radio_ri",
79 };
80 
81 /* The old deprecated interface */
82 void ASSABET_BCR_frob(unsigned int mask, unsigned int val)
83 {
84 	unsigned long m = mask, v = val;
85 
86 	assabet_bcr_gc->set_multiple(assabet_bcr_gc, &m, &v);
87 }
88 EXPORT_SYMBOL(ASSABET_BCR_frob);
89 
90 static int __init assabet_init_gpio(void __iomem *reg, u32 def_val)
91 {
92 	struct gpio_chip *gc;
93 
94 	writel_relaxed(def_val, reg);
95 
96 	gc = gpio_reg_init(NULL, reg, -1, 32, "assabet", 0xff000000, def_val,
97 			   assabet_names, NULL, NULL);
98 
99 	if (IS_ERR(gc))
100 		return PTR_ERR(gc);
101 
102 	assabet_bcr_gc = gc;
103 
104 	return 0;
105 }
106 
107 /*
108  * The codec reset goes to three devices, so we need to release
109  * the rest when any one of these requests it.  However, that
110  * causes the ADV7171 to consume around 100mA - more than half
111  * the LCD-blanked power.
112  *
113  * With the ADV7171, LCD and backlight enabled, we go over
114  * budget on the MAX846 Li-Ion charger, and if no Li-Ion battery
115  * is connected, the Assabet crashes.
116  */
117 #define RST_UCB1X00 (1 << 0)
118 #define RST_UDA1341 (1 << 1)
119 #define RST_ADV7171 (1 << 2)
120 
121 #define SDA GPIO_GPIO(15)
122 #define SCK GPIO_GPIO(18)
123 #define MOD GPIO_GPIO(17)
124 
125 static void adv7171_start(void)
126 {
127 	GPSR = SCK;
128 	udelay(1);
129 	GPSR = SDA;
130 	udelay(2);
131 	GPCR = SDA;
132 }
133 
134 static void adv7171_stop(void)
135 {
136 	GPSR = SCK;
137 	udelay(2);
138 	GPSR = SDA;
139 	udelay(1);
140 }
141 
142 static void adv7171_send(unsigned byte)
143 {
144 	unsigned i;
145 
146 	for (i = 0; i < 8; i++, byte <<= 1) {
147 		GPCR = SCK;
148 		udelay(1);
149 		if (byte & 0x80)
150 			GPSR = SDA;
151 		else
152 			GPCR = SDA;
153 		udelay(1);
154 		GPSR = SCK;
155 		udelay(1);
156 	}
157 	GPCR = SCK;
158 	udelay(1);
159 	GPSR = SDA;
160 	udelay(1);
161 	GPDR &= ~SDA;
162 	GPSR = SCK;
163 	udelay(1);
164 	if (GPLR & SDA)
165 		printk(KERN_WARNING "No ACK from ADV7171\n");
166 	udelay(1);
167 	GPCR = SCK | SDA;
168 	udelay(1);
169 	GPDR |= SDA;
170 	udelay(1);
171 }
172 
173 static void adv7171_write(unsigned reg, unsigned val)
174 {
175 	unsigned gpdr = GPDR;
176 	unsigned gplr = GPLR;
177 
178 	ASSABET_BCR_frob(ASSABET_BCR_AUDIO_ON, ASSABET_BCR_AUDIO_ON);
179 	udelay(100);
180 
181 	GPCR = SDA | SCK | MOD; /* clear L3 mode to ensure UDA1341 doesn't respond */
182 	GPDR = (GPDR | SCK | MOD) & ~SDA;
183 	udelay(10);
184 	if (!(GPLR & SDA))
185 		printk(KERN_WARNING "Something dragging SDA down?\n");
186 	GPDR |= SDA;
187 
188 	adv7171_start();
189 	adv7171_send(0x54);
190 	adv7171_send(reg);
191 	adv7171_send(val);
192 	adv7171_stop();
193 
194 	/* Restore GPIO state for L3 bus */
195 	GPSR = gplr & (SDA | SCK | MOD);
196 	GPCR = (~gplr) & (SDA | SCK | MOD);
197 	GPDR = gpdr;
198 }
199 
200 static void adv7171_sleep(void)
201 {
202 	/* Put the ADV7171 into sleep mode */
203 	adv7171_write(0x04, 0x40);
204 }
205 
206 static unsigned codec_nreset;
207 
208 static void assabet_codec_reset(unsigned mask, int set)
209 {
210 	unsigned long flags;
211 	bool old;
212 
213 	local_irq_save(flags);
214 	old = !codec_nreset;
215 	if (set)
216 		codec_nreset &= ~mask;
217 	else
218 		codec_nreset |= mask;
219 
220 	if (old != !codec_nreset) {
221 		if (codec_nreset) {
222 			ASSABET_BCR_set(ASSABET_BCR_NCODEC_RST);
223 			adv7171_sleep();
224 		} else {
225 			ASSABET_BCR_clear(ASSABET_BCR_NCODEC_RST);
226 		}
227 	}
228 	local_irq_restore(flags);
229 }
230 
231 static void assabet_ucb1x00_reset(enum ucb1x00_reset state)
232 {
233 	int set = state == UCB_RST_REMOVE || state == UCB_RST_SUSPEND ||
234 		state == UCB_RST_PROBE_FAIL;
235 	assabet_codec_reset(RST_UCB1X00, set);
236 }
237 
238 void assabet_uda1341_reset(int set)
239 {
240 	assabet_codec_reset(RST_UDA1341, set);
241 }
242 EXPORT_SYMBOL(assabet_uda1341_reset);
243 
244 
245 /*
246  * Assabet flash support code.
247  */
248 
249 #ifdef ASSABET_REV_4
250 /*
251  * Phase 4 Assabet has two 28F160B3 flash parts in bank 0:
252  */
253 static struct mtd_partition assabet_partitions[] = {
254 	{
255 		.name		= "bootloader",
256 		.size		= 0x00020000,
257 		.offset		= 0,
258 		.mask_flags	= MTD_WRITEABLE,
259 	}, {
260 		.name		= "bootloader params",
261 		.size		= 0x00020000,
262 		.offset		= MTDPART_OFS_APPEND,
263 		.mask_flags	= MTD_WRITEABLE,
264 	}, {
265 		.name		= "jffs",
266 		.size		= MTDPART_SIZ_FULL,
267 		.offset		= MTDPART_OFS_APPEND,
268 	}
269 };
270 #else
271 /*
272  * Phase 5 Assabet has two 28F128J3A flash parts in bank 0:
273  */
274 static struct mtd_partition assabet_partitions[] = {
275 	{
276 		.name		= "bootloader",
277 		.size		= 0x00040000,
278 		.offset		= 0,
279 		.mask_flags	= MTD_WRITEABLE,
280 	}, {
281 		.name		= "bootloader params",
282 		.size		= 0x00040000,
283 		.offset		= MTDPART_OFS_APPEND,
284 		.mask_flags	= MTD_WRITEABLE,
285 	}, {
286 		.name		= "jffs",
287 		.size		= MTDPART_SIZ_FULL,
288 		.offset		= MTDPART_OFS_APPEND,
289 	}
290 };
291 #endif
292 
293 static struct flash_platform_data assabet_flash_data = {
294 	.map_name	= "cfi_probe",
295 	.parts		= assabet_partitions,
296 	.nr_parts	= ARRAY_SIZE(assabet_partitions),
297 };
298 
299 static struct resource assabet_flash_resources[] = {
300 	DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M),
301 	DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_32M),
302 };
303 
304 
305 /*
306  * Assabet IrDA support code.
307  */
308 
309 static int assabet_irda_set_power(struct device *dev, unsigned int state)
310 {
311 	static unsigned int bcr_state[4] = {
312 		ASSABET_BCR_IRDA_MD0,
313 		ASSABET_BCR_IRDA_MD1|ASSABET_BCR_IRDA_MD0,
314 		ASSABET_BCR_IRDA_MD1,
315 		0
316 	};
317 
318 	if (state < 4)
319 		ASSABET_BCR_frob(ASSABET_BCR_IRDA_MD1 | ASSABET_BCR_IRDA_MD0,
320 				 bcr_state[state]);
321 	return 0;
322 }
323 
324 static void assabet_irda_set_speed(struct device *dev, unsigned int speed)
325 {
326 	if (speed < 4000000)
327 		ASSABET_BCR_clear(ASSABET_BCR_IRDA_FSEL);
328 	else
329 		ASSABET_BCR_set(ASSABET_BCR_IRDA_FSEL);
330 }
331 
332 static struct irda_platform_data assabet_irda_data = {
333 	.set_power	= assabet_irda_set_power,
334 	.set_speed	= assabet_irda_set_speed,
335 };
336 
337 static struct ucb1x00_plat_data assabet_ucb1x00_data = {
338 	.reset		= assabet_ucb1x00_reset,
339 	.gpio_base	= -1,
340 	.can_wakeup	= 1,
341 };
342 
343 static struct mcp_plat_data assabet_mcp_data = {
344 	.mccr0		= MCCR0_ADM,
345 	.sclk_rate	= 11981000,
346 	.codec_pdata	= &assabet_ucb1x00_data,
347 };
348 
349 static void assabet_lcd_set_visual(u32 visual)
350 {
351 	u_int is_true_color = visual == FB_VISUAL_TRUECOLOR;
352 
353 	if (machine_is_assabet()) {
354 #if 1		// phase 4 or newer Assabet's
355 		if (is_true_color)
356 			ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
357 		else
358 			ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
359 #else
360 		// older Assabet's
361 		if (is_true_color)
362 			ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
363 		else
364 			ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
365 #endif
366 	}
367 }
368 
369 #ifndef ASSABET_PAL_VIDEO
370 static void assabet_lcd_backlight_power(int on)
371 {
372 	if (on)
373 		ASSABET_BCR_set(ASSABET_BCR_LIGHT_ON);
374 	else
375 		ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
376 }
377 
378 /*
379  * Turn on/off the backlight.  When turning the backlight on, we wait
380  * 500us after turning it on so we don't cause the supplies to droop
381  * when we enable the LCD controller (and cause a hard reset.)
382  */
383 static void assabet_lcd_power(int on)
384 {
385 	if (on) {
386 		ASSABET_BCR_set(ASSABET_BCR_LCD_ON);
387 		udelay(500);
388 	} else
389 		ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
390 }
391 
392 /*
393  * The assabet uses a sharp LQ039Q2DS54 LCD module.  It is actually
394  * takes an RGB666 signal, but we provide it with an RGB565 signal
395  * instead (def_rgb_16).
396  */
397 static struct sa1100fb_mach_info lq039q2ds54_info = {
398 	.pixclock	= 171521,	.bpp		= 16,
399 	.xres		= 320,		.yres		= 240,
400 
401 	.hsync_len	= 5,		.vsync_len	= 1,
402 	.left_margin	= 61,		.upper_margin	= 3,
403 	.right_margin	= 9,		.lower_margin	= 0,
404 
405 	.sync		= FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
406 
407 	.lccr0		= LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
408 	.lccr3		= LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2),
409 
410 	.backlight_power = assabet_lcd_backlight_power,
411 	.lcd_power = assabet_lcd_power,
412 	.set_visual = assabet_lcd_set_visual,
413 };
414 #else
415 static void assabet_pal_backlight_power(int on)
416 {
417 	ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
418 }
419 
420 static void assabet_pal_power(int on)
421 {
422 	ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
423 }
424 
425 static struct sa1100fb_mach_info pal_info = {
426 	.pixclock	= 67797,	.bpp		= 16,
427 	.xres		= 640,		.yres		= 512,
428 
429 	.hsync_len	= 64,		.vsync_len	= 6,
430 	.left_margin	= 125,		.upper_margin	= 70,
431 	.right_margin	= 115,		.lower_margin	= 36,
432 
433 	.lccr0		= LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
434 	.lccr3		= LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(512),
435 
436 	.backlight_power = assabet_pal_backlight_power,
437 	.lcd_power = assabet_pal_power,
438 	.set_visual = assabet_lcd_set_visual,
439 };
440 #endif
441 
442 #ifdef CONFIG_ASSABET_NEPONSET
443 static struct resource neponset_resources[] = {
444 	DEFINE_RES_MEM(0x10000000, 0x08000000),
445 	DEFINE_RES_MEM(0x18000000, 0x04000000),
446 	DEFINE_RES_MEM(0x40000000, SZ_8K),
447 	DEFINE_RES_IRQ(IRQ_GPIO25),
448 };
449 #endif
450 
451 static struct gpiod_lookup_table assabet_cf_gpio_table = {
452 	.dev_id = "sa11x0-pcmcia.1",
453 	.table = {
454 		GPIO_LOOKUP("gpio", 21, "ready", GPIO_ACTIVE_HIGH),
455 		GPIO_LOOKUP("gpio", 22, "detect", GPIO_ACTIVE_LOW),
456 		GPIO_LOOKUP("gpio", 24, "bvd2", GPIO_ACTIVE_HIGH),
457 		GPIO_LOOKUP("gpio", 25, "bvd1", GPIO_ACTIVE_HIGH),
458 		GPIO_LOOKUP("assabet", 1, "reset", GPIO_ACTIVE_HIGH),
459 		GPIO_LOOKUP("assabet", 7, "bus-enable", GPIO_ACTIVE_LOW),
460 		{ },
461 	},
462 };
463 
464 static struct regulator_consumer_supply assabet_cf_vcc_consumers[] = {
465 	REGULATOR_SUPPLY("vcc", "sa11x0-pcmcia.1"),
466 };
467 
468 static struct fixed_voltage_config assabet_cf_vcc_pdata __initdata = {
469 	.supply_name = "cf-power",
470 	.microvolts = 3300000,
471 	.enable_high = 1,
472 };
473 
474 static struct gpiod_lookup_table assabet_cf_vcc_gpio_table = {
475 	.dev_id = "reg-fixed-voltage.0",
476 	.table = {
477 		GPIO_LOOKUP("assabet", 0, NULL, GPIO_ACTIVE_HIGH),
478 		{ },
479 	},
480 };
481 
482 static void __init assabet_init(void)
483 {
484 	/*
485 	 * Ensure that the power supply is in "high power" mode.
486 	 */
487 	GPSR = GPIO_GPIO16;
488 	GPDR |= GPIO_GPIO16;
489 
490 	/*
491 	 * Ensure that these pins are set as outputs and are driving
492 	 * logic 0.  This ensures that we won't inadvertently toggle
493 	 * the WS latch in the CPLD, and we don't float causing
494 	 * excessive power drain.  --rmk
495 	 */
496 	GPCR = GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
497 	GPDR |= GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
498 
499 	/*
500 	 * Also set GPIO27 as an output; this is used to clock UART3
501 	 * via the FPGA and as otherwise has no pullups or pulldowns,
502 	 * so stop it floating.
503 	 */
504 	GPCR = GPIO_GPIO27;
505 	GPDR |= GPIO_GPIO27;
506 
507 	/*
508 	 * Set up registers for sleep mode.
509 	 */
510 	PWER = PWER_GPIO0;
511 	PGSR = 0;
512 	PCFR = 0;
513 	PSDR = 0;
514 	PPDR |= PPC_TXD3 | PPC_TXD1;
515 	PPSR |= PPC_TXD3 | PPC_TXD1;
516 
517 	sa11x0_ppc_configure_mcp();
518 
519 	if (machine_has_neponset()) {
520 #ifndef CONFIG_ASSABET_NEPONSET
521 		printk( "Warning: Neponset detected but full support "
522 			"hasn't been configured in the kernel\n" );
523 #else
524 		platform_device_register_simple("neponset", 0,
525 			neponset_resources, ARRAY_SIZE(neponset_resources));
526 #endif
527 	} else {
528 		gpiod_add_lookup_table(&assabet_cf_vcc_gpio_table);
529 		sa11x0_register_fixed_regulator(0, &assabet_cf_vcc_pdata,
530 					assabet_cf_vcc_consumers,
531 					ARRAY_SIZE(assabet_cf_vcc_consumers),
532 					true);
533 
534 	}
535 
536 #ifndef ASSABET_PAL_VIDEO
537 	sa11x0_register_lcd(&lq039q2ds54_info);
538 #else
539 	sa11x0_register_lcd(&pal_video);
540 #endif
541 	sa11x0_register_mtd(&assabet_flash_data, assabet_flash_resources,
542 			    ARRAY_SIZE(assabet_flash_resources));
543 	sa11x0_register_irda(&assabet_irda_data);
544 	sa11x0_register_mcp(&assabet_mcp_data);
545 
546 	if (!machine_has_neponset())
547 		sa11x0_register_pcmcia(1, &assabet_cf_gpio_table);
548 }
549 
550 /*
551  * On Assabet, we must probe for the Neponset board _before_
552  * paging_init() has occurred to actually determine the amount
553  * of RAM available.  To do so, we map the appropriate IO section
554  * in the page table here in order to access GPIO registers.
555  */
556 static void __init map_sa1100_gpio_regs( void )
557 {
558 	unsigned long phys = __PREG(GPLR) & PMD_MASK;
559 	unsigned long virt = (unsigned long)io_p2v(phys);
560 	int prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_DOMAIN(DOMAIN_IO);
561 	pmd_t *pmd;
562 
563 	pmd = pmd_offset(pud_offset(pgd_offset_k(virt), virt), virt);
564 	*pmd = __pmd(phys | prot);
565 	flush_pmd_entry(pmd);
566 }
567 
568 /*
569  * Read System Configuration "Register"
570  * (taken from "Intel StrongARM SA-1110 Microprocessor Development Board
571  * User's Guide", section 4.4.1)
572  *
573  * This same scan is performed in arch/arm/boot/compressed/head-sa1100.S
574  * to set up the serial port for decompression status messages. We
575  * repeat it here because the kernel may not be loaded as a zImage, and
576  * also because it's a hassle to communicate the SCR value to the kernel
577  * from the decompressor.
578  *
579  * Note that IRQs are guaranteed to be disabled.
580  */
581 static void __init get_assabet_scr(void)
582 {
583 	unsigned long uninitialized_var(scr), i;
584 
585 	GPDR |= 0x3fc;			/* Configure GPIO 9:2 as outputs */
586 	GPSR = 0x3fc;			/* Write 0xFF to GPIO 9:2 */
587 	GPDR &= ~(0x3fc);		/* Configure GPIO 9:2 as inputs */
588 	for(i = 100; i--; )		/* Read GPIO 9:2 */
589 		scr = GPLR;
590 	GPDR |= 0x3fc;			/*  restore correct pin direction */
591 	scr &= 0x3fc;			/* save as system configuration byte. */
592 	SCR_value = scr;
593 }
594 
595 static void __init
596 fixup_assabet(struct tag *tags, char **cmdline)
597 {
598 	/* This must be done before any call to machine_has_neponset() */
599 	map_sa1100_gpio_regs();
600 	get_assabet_scr();
601 
602 	if (machine_has_neponset())
603 		printk("Neponset expansion board detected\n");
604 }
605 
606 
607 static void assabet_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
608 {
609 	if (port->mapbase == _Ser1UTCR0) {
610 		if (state)
611 			ASSABET_BCR_clear(ASSABET_BCR_RS232EN |
612 					  ASSABET_BCR_COM_RTS |
613 					  ASSABET_BCR_COM_DTR);
614 		else
615 			ASSABET_BCR_set(ASSABET_BCR_RS232EN |
616 					ASSABET_BCR_COM_RTS |
617 					ASSABET_BCR_COM_DTR);
618 	}
619 }
620 
621 /*
622  * Assabet uses COM_RTS and COM_DTR for both UART1 (com port)
623  * and UART3 (radio module).  We only handle them for UART1 here.
624  */
625 static void assabet_set_mctrl(struct uart_port *port, u_int mctrl)
626 {
627 	if (port->mapbase == _Ser1UTCR0) {
628 		u_int set = 0, clear = 0;
629 
630 		if (mctrl & TIOCM_RTS)
631 			clear |= ASSABET_BCR_COM_RTS;
632 		else
633 			set |= ASSABET_BCR_COM_RTS;
634 
635 		if (mctrl & TIOCM_DTR)
636 			clear |= ASSABET_BCR_COM_DTR;
637 		else
638 			set |= ASSABET_BCR_COM_DTR;
639 
640 		ASSABET_BCR_clear(clear);
641 		ASSABET_BCR_set(set);
642 	}
643 }
644 
645 static u_int assabet_get_mctrl(struct uart_port *port)
646 {
647 	u_int ret = 0;
648 	u_int bsr = ASSABET_BSR;
649 
650 	/* need 2 reads to read current value */
651 	bsr = ASSABET_BSR;
652 
653 	if (port->mapbase == _Ser1UTCR0) {
654 		if (bsr & ASSABET_BSR_COM_DCD)
655 			ret |= TIOCM_CD;
656 		if (bsr & ASSABET_BSR_COM_CTS)
657 			ret |= TIOCM_CTS;
658 		if (bsr & ASSABET_BSR_COM_DSR)
659 			ret |= TIOCM_DSR;
660 	} else if (port->mapbase == _Ser3UTCR0) {
661 		if (bsr & ASSABET_BSR_RAD_DCD)
662 			ret |= TIOCM_CD;
663 		if (bsr & ASSABET_BSR_RAD_CTS)
664 			ret |= TIOCM_CTS;
665 		if (bsr & ASSABET_BSR_RAD_DSR)
666 			ret |= TIOCM_DSR;
667 		if (bsr & ASSABET_BSR_RAD_RI)
668 			ret |= TIOCM_RI;
669 	} else {
670 		ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
671 	}
672 
673 	return ret;
674 }
675 
676 static struct sa1100_port_fns assabet_port_fns __initdata = {
677 	.set_mctrl	= assabet_set_mctrl,
678 	.get_mctrl	= assabet_get_mctrl,
679 	.pm		= assabet_uart_pm,
680 };
681 
682 static struct map_desc assabet_io_desc[] __initdata = {
683   	{	/* Board Control Register */
684 		.virtual	=  0xf1000000,
685 		.pfn		= __phys_to_pfn(0x12000000),
686 		.length		= 0x00100000,
687 		.type		= MT_DEVICE
688 	}, {	/* MQ200 */
689 		.virtual	=  0xf2800000,
690 		.pfn		= __phys_to_pfn(0x4b800000),
691 		.length		= 0x00800000,
692 		.type		= MT_DEVICE
693 	}
694 };
695 
696 static void __init assabet_map_io(void)
697 {
698 	sa1100_map_io();
699 	iotable_init(assabet_io_desc, ARRAY_SIZE(assabet_io_desc));
700 
701 	/*
702 	 * Set SUS bit in SDCR0 so serial port 1 functions.
703 	 * Its called GPCLKR0 in my SA1110 manual.
704 	 */
705 	Ser1SDCR0 |= SDCR0_SUS;
706 	MSC1 = (MSC1 & ~0xffff) |
707 		MSC_NonBrst | MSC_32BitStMem |
708 		MSC_RdAcc(2) | MSC_WrAcc(2) | MSC_Rec(0);
709 
710 	if (!machine_has_neponset())
711 		sa1100_register_uart_fns(&assabet_port_fns);
712 
713 	/*
714 	 * When Neponset is attached, the first UART should be
715 	 * UART3.  That's what Angel is doing and many documents
716 	 * are stating this.
717 	 *
718 	 * We do the Neponset mapping even if Neponset support
719 	 * isn't compiled in so the user will still get something on
720 	 * the expected physical serial port.
721 	 *
722 	 * We no longer do this; not all boot loaders support it,
723 	 * and UART3 appears to be somewhat unreliable with blob.
724 	 */
725 	sa1100_register_uart(0, 1);
726 	sa1100_register_uart(2, 3);
727 }
728 
729 /* LEDs */
730 #if defined(CONFIG_NEW_LEDS) && defined(CONFIG_LEDS_CLASS)
731 struct assabet_led {
732 	struct led_classdev cdev;
733 	u32 mask;
734 };
735 
736 /*
737  * The triggers lines up below will only be used if the
738  * LED triggers are compiled in.
739  */
740 static const struct {
741 	const char *name;
742 	const char *trigger;
743 } assabet_leds[] = {
744 	{ "assabet:red", "cpu0",},
745 	{ "assabet:green", "heartbeat", },
746 };
747 
748 /*
749  * The LED control in Assabet is reversed:
750  *  - setting bit means turn off LED
751  *  - clearing bit means turn on LED
752  */
753 static void assabet_led_set(struct led_classdev *cdev,
754 		enum led_brightness b)
755 {
756 	struct assabet_led *led = container_of(cdev,
757 			struct assabet_led, cdev);
758 
759 	if (b != LED_OFF)
760 		ASSABET_BCR_clear(led->mask);
761 	else
762 		ASSABET_BCR_set(led->mask);
763 }
764 
765 static enum led_brightness assabet_led_get(struct led_classdev *cdev)
766 {
767 	struct assabet_led *led = container_of(cdev,
768 			struct assabet_led, cdev);
769 
770 	return (ASSABET_BCR & led->mask) ? LED_OFF : LED_FULL;
771 }
772 
773 static int __init assabet_leds_init(void)
774 {
775 	int i;
776 
777 	if (!machine_is_assabet())
778 		return -ENODEV;
779 
780 	for (i = 0; i < ARRAY_SIZE(assabet_leds); i++) {
781 		struct assabet_led *led;
782 
783 		led = kzalloc(sizeof(*led), GFP_KERNEL);
784 		if (!led)
785 			break;
786 
787 		led->cdev.name = assabet_leds[i].name;
788 		led->cdev.brightness_set = assabet_led_set;
789 		led->cdev.brightness_get = assabet_led_get;
790 		led->cdev.default_trigger = assabet_leds[i].trigger;
791 
792 		if (!i)
793 			led->mask = ASSABET_BCR_LED_RED;
794 		else
795 			led->mask = ASSABET_BCR_LED_GREEN;
796 
797 		if (led_classdev_register(NULL, &led->cdev) < 0) {
798 			kfree(led);
799 			break;
800 		}
801 	}
802 
803 	return 0;
804 }
805 
806 /*
807  * Since we may have triggers on any subsystem, defer registration
808  * until after subsystem_init.
809  */
810 fs_initcall(assabet_leds_init);
811 #endif
812 
813 void __init assabet_init_irq(void)
814 {
815 	u32 def_val;
816 
817 	sa1100_init_irq();
818 
819 	if (machine_has_neponset())
820 		def_val = ASSABET_BCR_DB1111;
821 	else
822 		def_val = ASSABET_BCR_DB1110;
823 
824 	/*
825 	 * Angel sets this, but other bootloaders may not.
826 	 *
827 	 * This must precede any driver calls to BCR_set() or BCR_clear().
828 	 */
829 	assabet_init_gpio((void *)&ASSABET_BCR, def_val);
830 }
831 
832 MACHINE_START(ASSABET, "Intel-Assabet")
833 	.atag_offset	= 0x100,
834 	.fixup		= fixup_assabet,
835 	.map_io		= assabet_map_io,
836 	.nr_irqs	= SA1100_NR_IRQS,
837 	.init_irq	= assabet_init_irq,
838 	.init_time	= sa1100_timer_init,
839 	.init_machine	= assabet_init,
840 	.init_late	= sa11x0_init_late,
841 #ifdef CONFIG_SA1111
842 	.dma_zone_size	= SZ_1M,
843 #endif
844 	.restart	= sa11x0_restart,
845 MACHINE_END
846