1c6ff132dSArnd Bergmann /* SPDX-License-Identifier: GPL-2.0 */ 2c6ff132dSArnd Bergmann /* 3c6ff132dSArnd Bergmann * Copyright (c) 2008 Simtec Electronics 4c6ff132dSArnd Bergmann * Ben Dooks <ben@simtec.co.uk> 5c6ff132dSArnd Bergmann * 6c6ff132dSArnd Bergmann * S3C24XX - Memory map definitions 7c6ff132dSArnd Bergmann */ 8c6ff132dSArnd Bergmann 9c6ff132dSArnd Bergmann #ifndef __ASM_PLAT_MAP_S3C_H 10c6ff132dSArnd Bergmann #define __ASM_PLAT_MAP_S3C_H __FILE__ 11c6ff132dSArnd Bergmann 12c6ff132dSArnd Bergmann #include "map.h" 13c6ff132dSArnd Bergmann 14c6ff132dSArnd Bergmann #define S3C24XX_VA_IRQ S3C_VA_IRQ 15c6ff132dSArnd Bergmann #define S3C24XX_VA_MEMCTRL S3C_VA_MEM 16c6ff132dSArnd Bergmann #define S3C24XX_VA_UART S3C_VA_UART 17c6ff132dSArnd Bergmann 18c6ff132dSArnd Bergmann #define S3C24XX_VA_TIMER S3C_VA_TIMER 19c6ff132dSArnd Bergmann #define S3C24XX_VA_CLKPWR S3C_VA_SYS 20c6ff132dSArnd Bergmann #define S3C24XX_VA_WATCHDOG S3C_VA_WATCHDOG 21c6ff132dSArnd Bergmann 22c6ff132dSArnd Bergmann #define S3C2412_VA_SSMC S3C_ADDR_CPU(0x00000000) 23c6ff132dSArnd Bergmann #define S3C2412_VA_EBI S3C_ADDR_CPU(0x00100000) 24c6ff132dSArnd Bergmann 25c6ff132dSArnd Bergmann #define S3C2410_PA_UART (0x50000000) 26c6ff132dSArnd Bergmann #define S3C24XX_PA_UART S3C2410_PA_UART 27c6ff132dSArnd Bergmann 28c6ff132dSArnd Bergmann /* 29c6ff132dSArnd Bergmann * GPIO ports 30c6ff132dSArnd Bergmann * 31c6ff132dSArnd Bergmann * the calculation for the VA of this must ensure that 32c6ff132dSArnd Bergmann * it is the same distance apart from the UART in the 33c6ff132dSArnd Bergmann * phsyical address space, as the initial mapping for the IO 34c6ff132dSArnd Bergmann * is done as a 1:1 mapping. This puts it (currently) at 35c6ff132dSArnd Bergmann * 0xFA800000, which is not in the way of any current mapping 36c6ff132dSArnd Bergmann * by the base system. 37c6ff132dSArnd Bergmann */ 38c6ff132dSArnd Bergmann 39c6ff132dSArnd Bergmann #define S3C2410_PA_GPIO (0x56000000) 40c6ff132dSArnd Bergmann #define S3C24XX_PA_GPIO S3C2410_PA_GPIO 41c6ff132dSArnd Bergmann 42c6ff132dSArnd Bergmann #define S3C24XX_VA_GPIO ((S3C24XX_PA_GPIO - S3C24XX_PA_UART) + S3C24XX_VA_UART) 43c6ff132dSArnd Bergmann #define S3C64XX_VA_GPIO S3C_ADDR_CPU(0x00000000) 44c6ff132dSArnd Bergmann 45c6ff132dSArnd Bergmann #define S3C64XX_VA_MODEM S3C_ADDR_CPU(0x00100000) 46c6ff132dSArnd Bergmann #define S3C64XX_VA_USB_HSPHY S3C_ADDR_CPU(0x00200000) 47c6ff132dSArnd Bergmann 48c6ff132dSArnd Bergmann #define S3C_VA_USB_HSPHY S3C64XX_VA_USB_HSPHY 49c6ff132dSArnd Bergmann 50c6ff132dSArnd Bergmann #define S3C2410_ADDR(x) S3C_ADDR(x) 51c6ff132dSArnd Bergmann 52c6ff132dSArnd Bergmann /* deal with the registers that move under the 2412/2413 */ 53c6ff132dSArnd Bergmann 54c6ff132dSArnd Bergmann #if defined(CONFIG_CPU_S3C2412) 55c6ff132dSArnd Bergmann #ifndef __ASSEMBLY__ 56c6ff132dSArnd Bergmann extern void __iomem *s3c24xx_va_gpio2; 57c6ff132dSArnd Bergmann #endif 58c6ff132dSArnd Bergmann #ifdef CONFIG_CPU_S3C2412_ONLY 59c6ff132dSArnd Bergmann #define S3C24XX_VA_GPIO2 (S3C24XX_VA_GPIO + 0x10) 60c6ff132dSArnd Bergmann #else 61c6ff132dSArnd Bergmann #define S3C24XX_VA_GPIO2 s3c24xx_va_gpio2 62c6ff132dSArnd Bergmann #endif 63c6ff132dSArnd Bergmann #else 64c6ff132dSArnd Bergmann #define s3c24xx_va_gpio2 S3C24XX_VA_GPIO 65c6ff132dSArnd Bergmann #define S3C24XX_VA_GPIO2 S3C24XX_VA_GPIO 66c6ff132dSArnd Bergmann #endif 67c6ff132dSArnd Bergmann 68c6ff132dSArnd Bergmann #include "map-s5p.h" 69c6ff132dSArnd Bergmann 70c6ff132dSArnd Bergmann #endif /* __ASM_PLAT_MAP_S3C_H */ 71