xref: /openbmc/linux/arch/arm/mach-s3c/map-base.h (revision f5c27da4)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright 2003, 2007 Simtec Electronics
4  *	http://armlinux.simtec.co.uk/
5  *	Ben Dooks <ben@simtec.co.uk>
6  *
7  * S3C - Memory map definitions (virtual addresses)
8  */
9 
10 #ifndef __ASM_PLAT_MAP_H
11 #define __ASM_PLAT_MAP_H __FILE__
12 
13 /* Fit all our registers in at 0xF6000000 upwards, trying to use as
14  * little of the VA space as possible so vmalloc and friends have a
15  * better chance of getting memory.
16  *
17  * we try to ensure stuff like the IRQ registers are available for
18  * an single MOVS instruction (ie, only 8 bits of set data)
19  */
20 
21 #define S3C_ADDR_BASE	0xF6000000
22 
23 #ifndef __ASSEMBLY__
24 #define S3C_ADDR(x)	((void __iomem __force *)S3C_ADDR_BASE + (x))
25 #else
26 #define S3C_ADDR(x)	(S3C_ADDR_BASE + (x))
27 #endif
28 
29 #define S3C_VA_IRQ	S3C_ADDR(0x00000000)	/* irq controller(s) */
30 #define S3C_VA_SYS	S3C_ADDR(0x00100000)	/* system control */
31 #define S3C_VA_MEM	S3C_ADDR(0x00200000)	/* memory control */
32 #define S3C_VA_TIMER	S3C_ADDR(0x00300000)	/* timer block */
33 #define S3C_VA_WATCHDOG	S3C_ADDR(0x00400000)	/* watchdog */
34 #define S3C_VA_UART	S3C_ADDR(0x01000000)	/* UART */
35 
36 /* ISA device mapping for BAST to use with inb()/outb() on 8-bit I/O.
37  * 16-bit I/O on BAST now requires driver modifications to manually
38  * ioremap CS3.
39  */
40 #define S3C24XX_VA_ISA_BYTE	PCI_IOBASE
41 
42 /* This is used for the CPU specific mappings that may be needed, so that
43  * they do not need to directly used S3C_ADDR() and thus make it easier to
44  * modify the space for mapping.
45  */
46 #define S3C_ADDR_CPU(x)	S3C_ADDR(0x00500000 + (x))
47 
48 #endif /* __ASM_PLAT_MAP_H */
49