1*91276c0fSArnd Bergmann /* SPDX-License-Identifier: GPL-2.0 */ 2*91276c0fSArnd Bergmann /* 3*91276c0fSArnd Bergmann * Copyright 2003, 2007 Simtec Electronics 4*91276c0fSArnd Bergmann * http://armlinux.simtec.co.uk/ 5*91276c0fSArnd Bergmann * Ben Dooks <ben@simtec.co.uk> 6*91276c0fSArnd Bergmann * 7*91276c0fSArnd Bergmann * S3C - Memory map definitions (virtual addresses) 8*91276c0fSArnd Bergmann */ 9*91276c0fSArnd Bergmann 10*91276c0fSArnd Bergmann #ifndef __ASM_PLAT_MAP_H 11*91276c0fSArnd Bergmann #define __ASM_PLAT_MAP_H __FILE__ 12*91276c0fSArnd Bergmann 13*91276c0fSArnd Bergmann /* Fit all our registers in at 0xF6000000 upwards, trying to use as 14*91276c0fSArnd Bergmann * little of the VA space as possible so vmalloc and friends have a 15*91276c0fSArnd Bergmann * better chance of getting memory. 16*91276c0fSArnd Bergmann * 17*91276c0fSArnd Bergmann * we try to ensure stuff like the IRQ registers are available for 18*91276c0fSArnd Bergmann * an single MOVS instruction (ie, only 8 bits of set data) 19*91276c0fSArnd Bergmann */ 20*91276c0fSArnd Bergmann 21*91276c0fSArnd Bergmann #define S3C_ADDR_BASE 0xF6000000 22*91276c0fSArnd Bergmann 23*91276c0fSArnd Bergmann #ifndef __ASSEMBLY__ 24*91276c0fSArnd Bergmann #define S3C_ADDR(x) ((void __iomem __force *)S3C_ADDR_BASE + (x)) 25*91276c0fSArnd Bergmann #else 26*91276c0fSArnd Bergmann #define S3C_ADDR(x) (S3C_ADDR_BASE + (x)) 27*91276c0fSArnd Bergmann #endif 28*91276c0fSArnd Bergmann 29*91276c0fSArnd Bergmann #define S3C_VA_IRQ S3C_ADDR(0x00000000) /* irq controller(s) */ 30*91276c0fSArnd Bergmann #define S3C_VA_SYS S3C_ADDR(0x00100000) /* system control */ 31*91276c0fSArnd Bergmann #define S3C_VA_MEM S3C_ADDR(0x00200000) /* memory control */ 32*91276c0fSArnd Bergmann #define S3C_VA_TIMER S3C_ADDR(0x00300000) /* timer block */ 33*91276c0fSArnd Bergmann #define S3C_VA_WATCHDOG S3C_ADDR(0x00400000) /* watchdog */ 34*91276c0fSArnd Bergmann #define S3C_VA_UART S3C_ADDR(0x01000000) /* UART */ 35*91276c0fSArnd Bergmann 36*91276c0fSArnd Bergmann /* ISA device mapping for BAST to use with inb()/outb() on 8-bit I/O. 37*91276c0fSArnd Bergmann * 16-bit I/O on BAST now requires driver modifications to manually 38*91276c0fSArnd Bergmann * ioremap CS3. 39*91276c0fSArnd Bergmann */ 40*91276c0fSArnd Bergmann #define S3C24XX_VA_ISA_BYTE PCI_IOBASE 41*91276c0fSArnd Bergmann 42*91276c0fSArnd Bergmann /* This is used for the CPU specific mappings that may be needed, so that 43*91276c0fSArnd Bergmann * they do not need to directly used S3C_ADDR() and thus make it easier to 44*91276c0fSArnd Bergmann * modify the space for mapping. 45*91276c0fSArnd Bergmann */ 46*91276c0fSArnd Bergmann #define S3C_ADDR_CPU(x) S3C_ADDR(0x00500000 + (x)) 47*91276c0fSArnd Bergmann 48*91276c0fSArnd Bergmann #endif /* __ASM_PLAT_MAP_H */ 49