xref: /openbmc/linux/arch/arm/mach-s3c/gpio-core.h (revision 63705da3)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * Copyright 2008 Simtec Electronics
4  *	http://armlinux.simtec.co.uk/
5  *	Ben Dooks <ben@simtec.co.uk>
6  *
7  * S3C Platform - GPIO core
8  */
9 
10 #ifndef __PLAT_SAMSUNG_GPIO_CORE_H
11 #define __PLAT_SAMSUNG_GPIO_CORE_H
12 
13 /* Bring in machine-local definitions, especially S3C_GPIO_END */
14 #include "gpio-samsung.h"
15 #include <linux/gpio/driver.h>
16 
17 #define GPIOCON_OFF	(0x00)
18 #define GPIODAT_OFF	(0x04)
19 
20 #define con_4bit_shift(__off) ((__off) * 4)
21 
22 /* Define the core gpiolib support functions that the s3c platforms may
23  * need to extend or change depending on the hardware and the s3c chip
24  * selected at build or found at run time.
25  *
26  * These definitions are not intended for driver inclusion, there is
27  * nothing here that should not live outside the platform and core
28  * specific code.
29 */
30 
31 struct samsung_gpio_chip;
32 
33 /**
34  * struct samsung_gpio_pm - power management (suspend/resume) information
35  * @save: Routine to save the state of the GPIO block
36  * @resume: Routine to resume the GPIO block.
37  */
38 struct samsung_gpio_pm {
39 	void (*save)(struct samsung_gpio_chip *chip);
40 	void (*resume)(struct samsung_gpio_chip *chip);
41 };
42 
43 struct samsung_gpio_cfg;
44 
45 /**
46  * struct samsung_gpio_chip - wrapper for specific implementation of gpio
47  * @chip: The chip structure to be exported via gpiolib.
48  * @base: The base pointer to the gpio configuration registers.
49  * @group: The group register number for gpio interrupt support.
50  * @irq_base: The base irq number.
51  * @config: special function and pull-resistor control information.
52  * @lock: Lock for exclusive access to this gpio bank.
53  * @pm_save: Save information for suspend/resume support.
54  * @bitmap_gpio_int: Bitmap for representing GPIO interrupt or not.
55  *
56  * This wrapper provides the necessary information for the Samsung
57  * specific gpios being registered with gpiolib.
58  *
59  * The lock protects each gpio bank from multiple access of the shared
60  * configuration registers, or from reading of data whilst another thread
61  * is writing to the register set.
62  *
63  * Each chip has its own lock to avoid any  contention between different
64  * CPU cores trying to get one lock for different GPIO banks, where each
65  * bank of GPIO has its own register space and configuration registers.
66  */
67 struct samsung_gpio_chip {
68 	struct gpio_chip	chip;
69 	struct samsung_gpio_cfg	*config;
70 	struct samsung_gpio_pm	*pm;
71 	void __iomem		*base;
72 	int			irq_base;
73 	int			group;
74 	spinlock_t		 lock;
75 #ifdef CONFIG_PM
76 	u32			pm_save[4];
77 #endif
78 	u32			bitmap_gpio_int;
79 };
80 
81 static inline struct samsung_gpio_chip *to_samsung_gpio(struct gpio_chip *gpc)
82 {
83 	return container_of(gpc, struct samsung_gpio_chip, chip);
84 }
85 
86 /**
87  * samsung_gpiolib_to_irq - convert gpio pin to irq number
88  * @chip: The gpio chip that the pin belongs to.
89  * @offset: The offset of the pin in the chip.
90  *
91  * This helper returns the irq number calculated from the chip->irq_base and
92  * the provided offset.
93  */
94 extern int samsung_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset);
95 
96 /* exported for core SoC support to change */
97 extern struct samsung_gpio_cfg s3c24xx_gpiocfg_default;
98 
99 #ifdef CONFIG_S3C_GPIO_TRACK
100 extern struct samsung_gpio_chip *s3c_gpios[S3C_GPIO_END];
101 
102 static inline struct samsung_gpio_chip *samsung_gpiolib_getchip(unsigned int chip)
103 {
104 	return (chip < S3C_GPIO_END) ? s3c_gpios[chip] : NULL;
105 }
106 #else
107 /* machine specific code should provide samsung_gpiolib_getchip */
108 
109 extern struct samsung_gpio_chip s3c24xx_gpios[];
110 
111 static inline struct samsung_gpio_chip *samsung_gpiolib_getchip(unsigned int pin)
112 {
113 	struct samsung_gpio_chip *chip;
114 
115 	if (pin > S3C_GPIO_END)
116 		return NULL;
117 
118 	chip = &s3c24xx_gpios[pin/32];
119 	return ((pin - chip->chip.base) < chip->chip.ngpio) ? chip : NULL;
120 }
121 
122 static inline void s3c_gpiolib_track(struct samsung_gpio_chip *chip) { }
123 #endif
124 
125 #ifdef CONFIG_PM
126 extern struct samsung_gpio_pm samsung_gpio_pm_1bit;
127 extern struct samsung_gpio_pm samsung_gpio_pm_2bit;
128 extern struct samsung_gpio_pm samsung_gpio_pm_4bit;
129 #define __gpio_pm(x) x
130 #else
131 #define samsung_gpio_pm_1bit NULL
132 #define samsung_gpio_pm_2bit NULL
133 #define samsung_gpio_pm_4bit NULL
134 #define __gpio_pm(x) NULL
135 
136 #endif /* CONFIG_PM */
137 
138 /* locking wrappers to deal with multiple access to the same gpio bank */
139 #define samsung_gpio_lock(_oc, _fl) spin_lock_irqsave(&(_oc)->lock, _fl)
140 #define samsung_gpio_unlock(_oc, _fl) spin_unlock_irqrestore(&(_oc)->lock, _fl)
141 
142 #endif /* __PLAT_SAMSUNG_GPIO_CORE_H */
143