1a09e64fbSRussell King /*
2a09e64fbSRussell King  *  arch/arm/mach-rpc/include/mach/hardware.h
3a09e64fbSRussell King  *
4a09e64fbSRussell King  *  Copyright (C) 1996-1999 Russell King.
5a09e64fbSRussell King  *
6a09e64fbSRussell King  * This program is free software; you can redistribute it and/or modify
7a09e64fbSRussell King  * it under the terms of the GNU General Public License version 2 as
8a09e64fbSRussell King  * published by the Free Software Foundation.
9a09e64fbSRussell King  *
10a09e64fbSRussell King  *  This file contains the hardware definitions of the RiscPC series machines.
11a09e64fbSRussell King  */
12a09e64fbSRussell King #ifndef __ASM_ARCH_HARDWARE_H
13a09e64fbSRussell King #define __ASM_ARCH_HARDWARE_H
14a09e64fbSRussell King 
15a09e64fbSRussell King #include <mach/memory.h>
16a09e64fbSRussell King 
17a09e64fbSRussell King /*
18a09e64fbSRussell King  * What hardware must be present
19a09e64fbSRussell King  */
20a09e64fbSRussell King #define HAS_IOMD
21a09e64fbSRussell King #define HAS_VIDC20
22a09e64fbSRussell King 
23a09e64fbSRussell King /* Hardware addresses of major areas.
24a09e64fbSRussell King  *  *_START is the physical address
25a09e64fbSRussell King  *  *_SIZE  is the size of the region
26a09e64fbSRussell King  *  *_BASE  is the virtual address
27a09e64fbSRussell King  */
28a09e64fbSRussell King #define RAM_SIZE		0x10000000
29a09e64fbSRussell King #define RAM_START		0x10000000
30a09e64fbSRussell King 
31a09e64fbSRussell King #define EASI_SIZE		0x08000000	/* EASI I/O */
32a09e64fbSRussell King #define EASI_START		0x08000000
335e4cdb83SRussell King #define EASI_BASE		IOMEM(0xe5000000)
34a09e64fbSRussell King 
35a09e64fbSRussell King #define IO_START		0x03000000	/* I/O */
36a09e64fbSRussell King #define IO_SIZE			0x01000000
37a09e64fbSRussell King #define IO_BASE			IOMEM(0xe0000000)
38a09e64fbSRussell King 
39a09e64fbSRussell King #define SCREEN_START		0x02000000	/* VRAM */
40a09e64fbSRussell King #define SCREEN_END		0xdfc00000
41a09e64fbSRussell King #define SCREEN_BASE		0xdf800000
42a09e64fbSRussell King 
43c94e4ad2SRussell King #define UNCACHEABLE_ADDR	(FLUSH_BASE + 0x10000)
44a09e64fbSRussell King 
45a09e64fbSRussell King /*
46a09e64fbSRussell King  * IO Addresses
47a09e64fbSRussell King  */
485e4cdb83SRussell King #define ECARD_EASI_BASE		(EASI_BASE)
49d0a84e72SRussell King #define VIDC_BASE		(IO_BASE + 0x00400000)
50d0a84e72SRussell King #define EXPMASK_BASE		(IO_BASE + 0x00360000)
5106cf0b54SRussell King #define ECARD_IOC4_BASE		(IO_BASE + 0x00270000)
5206cf0b54SRussell King #define ECARD_IOC_BASE		(IO_BASE + 0x00240000)
53d0a84e72SRussell King #define IOMD_BASE		(IO_BASE + 0x00200000)
54d0a84e72SRussell King #define IOC_BASE		(IO_BASE + 0x00200000)
5506cf0b54SRussell King #define ECARD_MEMC8_BASE	(IO_BASE + 0x0002b000)
56d0a84e72SRussell King #define FLOPPYDMA_BASE		(IO_BASE + 0x0002a000)
57d0a84e72SRussell King #define PCIO_BASE		(IO_BASE + 0x00010000)
5806cf0b54SRussell King #define ECARD_MEMC_BASE		(IO_BASE + 0x00000000)
59a09e64fbSRussell King 
60a09e64fbSRussell King #define vidc_writel(val)	__raw_writel(val, VIDC_BASE)
61a09e64fbSRussell King 
62a09e64fbSRussell King #define NETSLOT_BASE		0x0302b000
63a09e64fbSRussell King #define NETSLOT_SIZE		0x00001000
64a09e64fbSRussell King 
65a09e64fbSRussell King #define PODSLOT_IOC0_BASE	0x03240000
66a09e64fbSRussell King #define PODSLOT_IOC4_BASE	0x03270000
67a09e64fbSRussell King #define PODSLOT_IOC_SIZE	(1 << 14)
68a09e64fbSRussell King #define PODSLOT_MEMC_BASE	0x03000000
69a09e64fbSRussell King #define PODSLOT_MEMC_SIZE	(1 << 14)
70a09e64fbSRussell King #define PODSLOT_EASI_BASE	0x08000000
71a09e64fbSRussell King #define PODSLOT_EASI_SIZE	(1 << 24)
72a09e64fbSRussell King 
73a09e64fbSRussell King #define	EXPMASK_STATUS		(EXPMASK_BASE + 0x00)
74a09e64fbSRussell King #define EXPMASK_ENABLE		(EXPMASK_BASE + 0x04)
75a09e64fbSRussell King 
76a09e64fbSRussell King #endif
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