1 /* 2 * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd 3 * Author: Tony Xie <tony.xie@rock-chips.com> 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms and conditions of the GNU General Public License, 7 * version 2, as published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 */ 15 16 #include <linux/init.h> 17 #include <linux/io.h> 18 #include <linux/kernel.h> 19 #include <linux/of.h> 20 #include <linux/of_address.h> 21 #include <linux/regmap.h> 22 #include <linux/suspend.h> 23 #include <linux/mfd/syscon.h> 24 #include <linux/regulator/machine.h> 25 26 #include <asm/cacheflush.h> 27 #include <asm/tlbflush.h> 28 #include <asm/suspend.h> 29 30 #include "pm.h" 31 32 /* These enum are option of low power mode */ 33 enum { 34 ROCKCHIP_ARM_OFF_LOGIC_NORMAL = 0, 35 ROCKCHIP_ARM_OFF_LOGIC_DEEP = 1, 36 }; 37 38 struct rockchip_pm_data { 39 const struct platform_suspend_ops *ops; 40 int (*init)(struct device_node *np); 41 }; 42 43 static void __iomem *rk3288_bootram_base; 44 static phys_addr_t rk3288_bootram_phy; 45 46 static struct regmap *pmu_regmap; 47 static struct regmap *grf_regmap; 48 static struct regmap *sgrf_regmap; 49 50 static u32 rk3288_pmu_pwr_mode_con; 51 static u32 rk3288_grf_soc_con0; 52 static u32 rk3288_sgrf_soc_con0; 53 54 static inline u32 rk3288_l2_config(void) 55 { 56 u32 l2ctlr; 57 58 asm("mrc p15, 1, %0, c9, c0, 2" : "=r" (l2ctlr)); 59 return l2ctlr; 60 } 61 62 static void rk3288_config_bootdata(void) 63 { 64 rkpm_bootdata_cpusp = rk3288_bootram_phy + (SZ_4K - 8); 65 rkpm_bootdata_cpu_code = virt_to_phys(cpu_resume); 66 67 rkpm_bootdata_l2ctlr_f = 1; 68 rkpm_bootdata_l2ctlr = rk3288_l2_config(); 69 } 70 71 static void rk3288_slp_mode_set(int level) 72 { 73 u32 mode_set, mode_set1; 74 75 regmap_read(grf_regmap, RK3288_GRF_SOC_CON0, &rk3288_grf_soc_con0); 76 77 regmap_read(sgrf_regmap, RK3288_SGRF_SOC_CON0, &rk3288_sgrf_soc_con0); 78 79 regmap_read(pmu_regmap, RK3288_PMU_PWRMODE_CON, 80 &rk3288_pmu_pwr_mode_con); 81 82 /* 83 * We need set this bit GRF_FORCE_JTAG here, for the debug module, 84 * otherwise, it may become inaccessible after resume. 85 * This creates a potential security issue, as the sdmmc pins may 86 * accept jtag data for a short time during resume if no card is 87 * inserted. 88 * But this is of course also true for the regular boot, before we 89 * turn of the jtag/sdmmc autodetect. 90 */ 91 regmap_write(grf_regmap, RK3288_GRF_SOC_CON0, GRF_FORCE_JTAG | 92 GRF_FORCE_JTAG_WRITE); 93 94 /* 95 * SGRF_FAST_BOOT_EN - system to boot from FAST_BOOT_ADDR 96 * PCLK_WDT_GATE - disable WDT during suspend. 97 */ 98 regmap_write(sgrf_regmap, RK3288_SGRF_SOC_CON0, 99 SGRF_PCLK_WDT_GATE | SGRF_FAST_BOOT_EN 100 | SGRF_PCLK_WDT_GATE_WRITE | SGRF_FAST_BOOT_EN_WRITE); 101 102 /* 103 * The dapswjdp can not auto reset before resume, that cause it may 104 * access some illegal address during resume. Let's disable it before 105 * suspend, and the MASKROM will enable it back. 106 */ 107 regmap_write(sgrf_regmap, RK3288_SGRF_CPU_CON0, SGRF_DAPDEVICEEN_WRITE); 108 109 /* booting address of resuming system is from this register value */ 110 regmap_write(sgrf_regmap, RK3288_SGRF_FAST_BOOT_ADDR, 111 rk3288_bootram_phy); 112 113 regmap_write(pmu_regmap, RK3288_PMU_WAKEUP_CFG1, 114 PMU_ARMINT_WAKEUP_EN); 115 116 mode_set = BIT(PMU_GLOBAL_INT_DISABLE) | BIT(PMU_L2FLUSH_EN) | 117 BIT(PMU_SREF0_ENTER_EN) | BIT(PMU_SREF1_ENTER_EN) | 118 BIT(PMU_DDR0_GATING_EN) | BIT(PMU_DDR1_GATING_EN) | 119 BIT(PMU_PWR_MODE_EN) | BIT(PMU_CHIP_PD_EN) | 120 BIT(PMU_SCU_EN); 121 122 mode_set1 = BIT(PMU_CLR_CORE) | BIT(PMU_CLR_CPUP); 123 124 if (level == ROCKCHIP_ARM_OFF_LOGIC_DEEP) { 125 /* arm off, logic deep sleep */ 126 mode_set |= BIT(PMU_BUS_PD_EN) | 127 BIT(PMU_DDR1IO_RET_EN) | BIT(PMU_DDR0IO_RET_EN) | 128 BIT(PMU_OSC_24M_DIS) | BIT(PMU_PMU_USE_LF) | 129 BIT(PMU_ALIVE_USE_LF) | BIT(PMU_PLL_PD_EN); 130 131 mode_set1 |= BIT(PMU_CLR_ALIVE) | BIT(PMU_CLR_BUS) | 132 BIT(PMU_CLR_PERI) | BIT(PMU_CLR_DMA); 133 } else { 134 /* 135 * arm off, logic normal 136 * if pmu_clk_core_src_gate_en is not set, 137 * wakeup will be error 138 */ 139 mode_set |= BIT(PMU_CLK_CORE_SRC_GATE_EN); 140 } 141 142 regmap_write(pmu_regmap, RK3288_PMU_PWRMODE_CON, mode_set); 143 regmap_write(pmu_regmap, RK3288_PMU_PWRMODE_CON1, mode_set1); 144 } 145 146 static void rk3288_slp_mode_set_resume(void) 147 { 148 regmap_write(pmu_regmap, RK3288_PMU_PWRMODE_CON, 149 rk3288_pmu_pwr_mode_con); 150 151 regmap_write(sgrf_regmap, RK3288_SGRF_SOC_CON0, 152 rk3288_sgrf_soc_con0 | SGRF_PCLK_WDT_GATE_WRITE 153 | SGRF_FAST_BOOT_EN_WRITE); 154 155 regmap_write(grf_regmap, RK3288_GRF_SOC_CON0, rk3288_grf_soc_con0 | 156 GRF_FORCE_JTAG_WRITE); 157 } 158 159 static int rockchip_lpmode_enter(unsigned long arg) 160 { 161 flush_cache_all(); 162 163 cpu_do_idle(); 164 165 pr_err("%s: Failed to suspend\n", __func__); 166 167 return 1; 168 } 169 170 static int rk3288_suspend_enter(suspend_state_t state) 171 { 172 local_fiq_disable(); 173 174 rk3288_slp_mode_set(ROCKCHIP_ARM_OFF_LOGIC_NORMAL); 175 176 cpu_suspend(0, rockchip_lpmode_enter); 177 178 rk3288_slp_mode_set_resume(); 179 180 local_fiq_enable(); 181 182 return 0; 183 } 184 185 static int rk3288_suspend_prepare(void) 186 { 187 return regulator_suspend_prepare(PM_SUSPEND_MEM); 188 } 189 190 static void rk3288_suspend_finish(void) 191 { 192 if (regulator_suspend_finish()) 193 pr_err("%s: Suspend finish failed\n", __func__); 194 } 195 196 static int rk3288_suspend_init(struct device_node *np) 197 { 198 struct device_node *sram_np; 199 struct resource res; 200 int ret; 201 202 pmu_regmap = syscon_node_to_regmap(np); 203 if (IS_ERR(pmu_regmap)) { 204 pr_err("%s: could not find pmu regmap\n", __func__); 205 return PTR_ERR(pmu_regmap); 206 } 207 208 sgrf_regmap = syscon_regmap_lookup_by_compatible( 209 "rockchip,rk3288-sgrf"); 210 if (IS_ERR(sgrf_regmap)) { 211 pr_err("%s: could not find sgrf regmap\n", __func__); 212 return PTR_ERR(pmu_regmap); 213 } 214 215 grf_regmap = syscon_regmap_lookup_by_compatible( 216 "rockchip,rk3288-grf"); 217 if (IS_ERR(grf_regmap)) { 218 pr_err("%s: could not find grf regmap\n", __func__); 219 return PTR_ERR(pmu_regmap); 220 } 221 222 sram_np = of_find_compatible_node(NULL, NULL, 223 "rockchip,rk3288-pmu-sram"); 224 if (!sram_np) { 225 pr_err("%s: could not find bootram dt node\n", __func__); 226 return -ENODEV; 227 } 228 229 rk3288_bootram_base = of_iomap(sram_np, 0); 230 if (!rk3288_bootram_base) { 231 pr_err("%s: could not map bootram base\n", __func__); 232 return -ENOMEM; 233 } 234 235 ret = of_address_to_resource(sram_np, 0, &res); 236 if (ret) { 237 pr_err("%s: could not get bootram phy addr\n", __func__); 238 return ret; 239 } 240 rk3288_bootram_phy = res.start; 241 242 of_node_put(sram_np); 243 244 rk3288_config_bootdata(); 245 246 /* copy resume code and data to bootsram */ 247 memcpy(rk3288_bootram_base, rockchip_slp_cpu_resume, 248 rk3288_bootram_sz); 249 250 regmap_write(pmu_regmap, RK3288_PMU_OSC_CNT, OSC_STABL_CNT_THRESH); 251 regmap_write(pmu_regmap, RK3288_PMU_STABL_CNT, PMU_STABL_CNT_THRESH); 252 253 return 0; 254 } 255 256 static const struct platform_suspend_ops rk3288_suspend_ops = { 257 .enter = rk3288_suspend_enter, 258 .valid = suspend_valid_only_mem, 259 .prepare = rk3288_suspend_prepare, 260 .finish = rk3288_suspend_finish, 261 }; 262 263 static const struct rockchip_pm_data rk3288_pm_data __initconst = { 264 .ops = &rk3288_suspend_ops, 265 .init = rk3288_suspend_init, 266 }; 267 268 static const struct of_device_id rockchip_pmu_of_device_ids[] __initconst = { 269 { 270 .compatible = "rockchip,rk3288-pmu", 271 .data = &rk3288_pm_data, 272 }, 273 { /* sentinel */ }, 274 }; 275 276 void __init rockchip_suspend_init(void) 277 { 278 const struct rockchip_pm_data *pm_data; 279 const struct of_device_id *match; 280 struct device_node *np; 281 int ret; 282 283 np = of_find_matching_node_and_match(NULL, rockchip_pmu_of_device_ids, 284 &match); 285 if (!match) { 286 pr_err("Failed to find PMU node\n"); 287 return; 288 } 289 pm_data = (struct rockchip_pm_data *) match->data; 290 291 if (pm_data->init) { 292 ret = pm_data->init(np); 293 294 if (ret) { 295 pr_err("%s: matches init error %d\n", __func__, ret); 296 return; 297 } 298 } 299 300 suspend_set_ops(pm_data->ops); 301 } 302