1 /* 2 * linux/arch/arm/mach-pxa/pxa25x.c 3 * 4 * Author: Nicolas Pitre 5 * Created: Jun 15, 2001 6 * Copyright: MontaVista Software Inc. 7 * 8 * Code specific to PXA21x/25x/26x variants. 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License version 2 as 12 * published by the Free Software Foundation. 13 * 14 * Since this file should be linked before any other machine specific file, 15 * the __initcall() here will be executed first. This serves as default 16 * initialization stuff for PXA machines which can be overridden later if 17 * need be. 18 */ 19 #include <linux/module.h> 20 #include <linux/kernel.h> 21 #include <linux/init.h> 22 #include <linux/pm.h> 23 24 #include <asm/hardware.h> 25 #include <asm/arch/pxa-regs.h> 26 27 #include "generic.h" 28 29 /* 30 * Various clock factors driven by the CCCR register. 31 */ 32 33 /* Crystal Frequency to Memory Frequency Multiplier (L) */ 34 static unsigned char L_clk_mult[32] = { 0, 27, 32, 36, 40, 45, 0, }; 35 36 /* Memory Frequency to Run Mode Frequency Multiplier (M) */ 37 static unsigned char M_clk_mult[4] = { 0, 1, 2, 4 }; 38 39 /* Run Mode Frequency to Turbo Mode Frequency Multiplier (N) */ 40 /* Note: we store the value N * 2 here. */ 41 static unsigned char N2_clk_mult[8] = { 0, 0, 2, 3, 4, 0, 6, 0 }; 42 43 /* Crystal clock */ 44 #define BASE_CLK 3686400 45 46 /* 47 * Get the clock frequency as reflected by CCCR and the turbo flag. 48 * We assume these values have been applied via a fcs. 49 * If info is not 0 we also display the current settings. 50 */ 51 unsigned int get_clk_frequency_khz(int info) 52 { 53 unsigned long cccr, turbo; 54 unsigned int l, L, m, M, n2, N; 55 56 cccr = CCCR; 57 asm( "mrc\tp14, 0, %0, c6, c0, 0" : "=r" (turbo) ); 58 59 l = L_clk_mult[(cccr >> 0) & 0x1f]; 60 m = M_clk_mult[(cccr >> 5) & 0x03]; 61 n2 = N2_clk_mult[(cccr >> 7) & 0x07]; 62 63 L = l * BASE_CLK; 64 M = m * L; 65 N = n2 * M / 2; 66 67 if(info) 68 { 69 L += 5000; 70 printk( KERN_INFO "Memory clock: %d.%02dMHz (*%d)\n", 71 L / 1000000, (L % 1000000) / 10000, l ); 72 M += 5000; 73 printk( KERN_INFO "Run Mode clock: %d.%02dMHz (*%d)\n", 74 M / 1000000, (M % 1000000) / 10000, m ); 75 N += 5000; 76 printk( KERN_INFO "Turbo Mode clock: %d.%02dMHz (*%d.%d, %sactive)\n", 77 N / 1000000, (N % 1000000) / 10000, n2 / 2, (n2 % 2) * 5, 78 (turbo & 1) ? "" : "in" ); 79 } 80 81 return (turbo & 1) ? (N/1000) : (M/1000); 82 } 83 84 EXPORT_SYMBOL(get_clk_frequency_khz); 85 86 /* 87 * Return the current memory clock frequency in units of 10kHz 88 */ 89 unsigned int get_memclk_frequency_10khz(void) 90 { 91 return L_clk_mult[(CCCR >> 0) & 0x1f] * BASE_CLK / 10000; 92 } 93 94 EXPORT_SYMBOL(get_memclk_frequency_10khz); 95 96 /* 97 * Return the current LCD clock frequency in units of 10kHz 98 */ 99 unsigned int get_lcdclk_frequency_10khz(void) 100 { 101 return get_memclk_frequency_10khz(); 102 } 103 104 EXPORT_SYMBOL(get_lcdclk_frequency_10khz); 105 106 #ifdef CONFIG_PM 107 108 int pxa_cpu_pm_prepare(suspend_state_t state) 109 { 110 switch (state) { 111 case PM_SUSPEND_MEM: 112 break; 113 default: 114 return -EINVAL; 115 } 116 117 return 0; 118 } 119 120 void pxa_cpu_pm_enter(suspend_state_t state) 121 { 122 extern void pxa_cpu_suspend(unsigned int); 123 extern void pxa_cpu_resume(void); 124 125 CKEN = 0; 126 127 switch (state) { 128 case PM_SUSPEND_MEM: 129 /* set resume return address */ 130 PSPR = virt_to_phys(pxa_cpu_resume); 131 pxa_cpu_suspend(PWRMODE_SLEEP); 132 break; 133 } 134 } 135 136 #endif 137