xref: /openbmc/linux/arch/arm/mach-pxa/pxa-regs.h (revision 9a29f5fc)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  *  Author:	Nicolas Pitre
4  *  Created:	Jun 15, 2001
5  *  Copyright:	MontaVista Software Inc.
6  */
7 #ifndef __ASM_MACH_PXA_REGS_H
8 #define __ASM_MACH_PXA_REGS_H
9 
10 /*
11  * Workarounds for at least 2 errata so far require this.
12  * The mapping is set in mach-pxa/generic.c.
13  */
14 #define UNCACHED_PHYS_0		0xfe000000
15 #define UNCACHED_PHYS_0_SIZE	0x00100000
16 
17 /*
18  * Intel PXA2xx internal register mapping:
19  *
20  * 0x40000000 - 0x41ffffff <--> 0xf2000000 - 0xf3ffffff
21  * 0x44000000 - 0x45ffffff <--> 0xf4000000 - 0xf5ffffff
22  * 0x48000000 - 0x49ffffff <--> 0xf6000000 - 0xf7ffffff
23  * 0x4c000000 - 0x4dffffff <--> 0xf8000000 - 0xf9ffffff
24  * 0x50000000 - 0x51ffffff <--> 0xfa000000 - 0xfbffffff
25  * 0x54000000 - 0x55ffffff <--> 0xfc000000 - 0xfdffffff
26  * 0x58000000 - 0x59ffffff <--> 0xfe000000 - 0xffffffff
27  *
28  * Note that not all PXA2xx chips implement all those addresses, and the
29  * kernel only maps the minimum needed range of this mapping.
30  */
31 #define io_v2p(x) (0x3c000000 + ((x) & 0x01ffffff) + (((x) & 0x0e000000) << 1))
32 #define io_p2v(x) IOMEM(0xf2000000 + ((x) & 0x01ffffff) + (((x) & 0x1c000000) >> 1))
33 
34 #ifndef __ASSEMBLY__
35 # define __REG(x)	(*((volatile u32 __iomem *)io_p2v(x)))
36 
37 /* With indexed regs we don't want to feed the index through io_p2v()
38    especially if it is a variable, otherwise horrible code will result. */
39 # define __REG2(x,y)	\
40 	(*(volatile u32 __iomem*)((u32)&__REG(x) + (y)))
41 
42 # define __PREG(x)	(io_v2p((u32)&(x)))
43 
44 #else
45 
46 # define __REG(x)	io_p2v(x)
47 # define __PREG(x)	io_v2p(x)
48 
49 #endif
50 
51 
52 #endif
53