1 /* 2 * linux/arch/arm/mach-pxa/irq.c 3 * 4 * Generic PXA IRQ handling 5 * 6 * Author: Nicolas Pitre 7 * Created: Jun 15, 2001 8 * Copyright: MontaVista Software Inc. 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License version 2 as 12 * published by the Free Software Foundation. 13 */ 14 15 #include <linux/init.h> 16 #include <linux/module.h> 17 #include <linux/interrupt.h> 18 #include <linux/sysdev.h> 19 20 #include <mach/hardware.h> 21 #include <asm/irq.h> 22 #include <asm/mach/irq.h> 23 #include <mach/gpio.h> 24 #include <mach/regs-intc.h> 25 26 #include "generic.h" 27 28 #define IRQ_BIT(n) (((n) - PXA_IRQ(0)) & 0x1f) 29 #define _ICMR(n) (*((((n) - PXA_IRQ(0)) & ~0x1f) ? &ICMR2 : &ICMR)) 30 #define _ICLR(n) (*((((n) - PXA_IRQ(0)) & ~0x1f) ? &ICLR2 : &ICLR)) 31 32 /* 33 * This is for peripheral IRQs internal to the PXA chip. 34 */ 35 36 static int pxa_internal_irq_nr; 37 38 static void pxa_mask_irq(unsigned int irq) 39 { 40 _ICMR(irq) &= ~(1 << IRQ_BIT(irq)); 41 } 42 43 static void pxa_unmask_irq(unsigned int irq) 44 { 45 _ICMR(irq) |= 1 << IRQ_BIT(irq); 46 } 47 48 static struct irq_chip pxa_internal_irq_chip = { 49 .name = "SC", 50 .ack = pxa_mask_irq, 51 .mask = pxa_mask_irq, 52 .unmask = pxa_unmask_irq, 53 }; 54 55 /* 56 * GPIO IRQs for GPIO 0 and 1 57 */ 58 static int pxa_set_low_gpio_type(unsigned int irq, unsigned int type) 59 { 60 int gpio = irq - IRQ_GPIO0; 61 62 if (__gpio_is_occupied(gpio)) { 63 pr_err("%s failed: GPIO is configured\n", __func__); 64 return -EINVAL; 65 } 66 67 if (type & IRQ_TYPE_EDGE_RISING) 68 GRER0 |= GPIO_bit(gpio); 69 else 70 GRER0 &= ~GPIO_bit(gpio); 71 72 if (type & IRQ_TYPE_EDGE_FALLING) 73 GFER0 |= GPIO_bit(gpio); 74 else 75 GFER0 &= ~GPIO_bit(gpio); 76 77 return 0; 78 } 79 80 static void pxa_ack_low_gpio(unsigned int irq) 81 { 82 GEDR0 = (1 << (irq - IRQ_GPIO0)); 83 } 84 85 static void pxa_mask_low_gpio(unsigned int irq) 86 { 87 ICMR &= ~(1 << (irq - PXA_IRQ(0))); 88 } 89 90 static void pxa_unmask_low_gpio(unsigned int irq) 91 { 92 ICMR |= 1 << (irq - PXA_IRQ(0)); 93 } 94 95 static struct irq_chip pxa_low_gpio_chip = { 96 .name = "GPIO-l", 97 .ack = pxa_ack_low_gpio, 98 .mask = pxa_mask_low_gpio, 99 .unmask = pxa_unmask_low_gpio, 100 .set_type = pxa_set_low_gpio_type, 101 }; 102 103 static void __init pxa_init_low_gpio_irq(set_wake_t fn) 104 { 105 int irq; 106 107 /* clear edge detection on GPIO 0 and 1 */ 108 GFER0 &= ~0x3; 109 GRER0 &= ~0x3; 110 GEDR0 = 0x3; 111 112 for (irq = IRQ_GPIO0; irq <= IRQ_GPIO1; irq++) { 113 set_irq_chip(irq, &pxa_low_gpio_chip); 114 set_irq_handler(irq, handle_edge_irq); 115 set_irq_flags(irq, IRQF_VALID); 116 } 117 118 pxa_low_gpio_chip.set_wake = fn; 119 } 120 121 void __init pxa_init_irq(int irq_nr, set_wake_t fn) 122 { 123 int irq, i; 124 125 pxa_internal_irq_nr = irq_nr; 126 127 for (irq = PXA_IRQ(0); irq < PXA_IRQ(irq_nr); irq += 32) { 128 _ICMR(irq) = 0; /* disable all IRQs */ 129 _ICLR(irq) = 0; /* all IRQs are IRQ, not FIQ */ 130 } 131 132 /* initialize interrupt priority */ 133 if (cpu_is_pxa27x() || cpu_is_pxa3xx()) { 134 for (i = 0; i < irq_nr; i++) 135 IPR(i) = i | (1 << 31); 136 } 137 138 /* only unmasked interrupts kick us out of idle */ 139 ICCR = 1; 140 141 for (irq = PXA_IRQ(0); irq < PXA_IRQ(irq_nr); irq++) { 142 set_irq_chip(irq, &pxa_internal_irq_chip); 143 set_irq_handler(irq, handle_level_irq); 144 set_irq_flags(irq, IRQF_VALID); 145 } 146 147 pxa_internal_irq_chip.set_wake = fn; 148 pxa_init_low_gpio_irq(fn); 149 } 150 151 #ifdef CONFIG_PM 152 static unsigned long saved_icmr[2]; 153 154 static int pxa_irq_suspend(struct sys_device *dev, pm_message_t state) 155 { 156 int i, irq = PXA_IRQ(0); 157 158 for (i = 0; irq < PXA_IRQ(pxa_internal_irq_nr); i++, irq += 32) { 159 saved_icmr[i] = _ICMR(irq); 160 _ICMR(irq) = 0; 161 } 162 163 return 0; 164 } 165 166 static int pxa_irq_resume(struct sys_device *dev) 167 { 168 int i, irq = PXA_IRQ(0); 169 170 for (i = 0; irq < PXA_IRQ(pxa_internal_irq_nr); i++, irq += 32) { 171 _ICMR(irq) = saved_icmr[i]; 172 _ICLR(irq) = 0; 173 } 174 175 ICCR = 1; 176 return 0; 177 } 178 #else 179 #define pxa_irq_suspend NULL 180 #define pxa_irq_resume NULL 181 #endif 182 183 struct sysdev_class pxa_irq_sysclass = { 184 .name = "irq", 185 .suspend = pxa_irq_suspend, 186 .resume = pxa_irq_resume, 187 }; 188 189 static int __init pxa_irq_init(void) 190 { 191 return sysdev_class_register(&pxa_irq_sysclass); 192 } 193 194 core_initcall(pxa_irq_init); 195