1*0fdebc5eSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 2c22c2c60SArnd Bergmann /* 3c22c2c60SArnd Bergmann * Generic definitions of Orion SoC flavors: 4c22c2c60SArnd Bergmann * Orion-1, Orion-VoIP, Orion-NAS, Orion-2, and Orion-1-90. 5c22c2c60SArnd Bergmann * 6c22c2c60SArnd Bergmann * Maintainer: Tzachi Perelstein <tzachi@marvell.com> 7c22c2c60SArnd Bergmann */ 8c22c2c60SArnd Bergmann 9c22c2c60SArnd Bergmann #ifndef __ASM_ARCH_ORION5X_H 10c22c2c60SArnd Bergmann #define __ASM_ARCH_ORION5X_H 11c22c2c60SArnd Bergmann 12c22c2c60SArnd Bergmann #include "irqs.h" 13c22c2c60SArnd Bergmann 14c22c2c60SArnd Bergmann /***************************************************************************** 15c22c2c60SArnd Bergmann * Orion Address Maps 16c22c2c60SArnd Bergmann * 17c22c2c60SArnd Bergmann * phys 18c22c2c60SArnd Bergmann * e0000000 PCIe MEM space 19c22c2c60SArnd Bergmann * e8000000 PCI MEM space 20c22c2c60SArnd Bergmann * f0000000 PCIe WA space (Orion-1/Orion-NAS only) 21c22c2c60SArnd Bergmann * f1000000 on-chip peripheral registers 22c22c2c60SArnd Bergmann * f2000000 PCIe I/O space 23c22c2c60SArnd Bergmann * f2100000 PCI I/O space 24c22c2c60SArnd Bergmann * f2200000 SRAM dedicated for the crypto unit 25c22c2c60SArnd Bergmann * f4000000 device bus mappings (boot) 26c22c2c60SArnd Bergmann * fa000000 device bus mappings (cs0) 27c22c2c60SArnd Bergmann * fa800000 device bus mappings (cs2) 28c22c2c60SArnd Bergmann * fc000000 device bus mappings (cs0/cs1) 29c22c2c60SArnd Bergmann * 30c22c2c60SArnd Bergmann * virt phys size 313584be9eSArnd Bergmann * fec00000 f1000000 1M on-chip peripheral registers 32c22c2c60SArnd Bergmann * fee00000 f2000000 64K PCIe I/O space 33c22c2c60SArnd Bergmann * fee10000 f2100000 64K PCI I/O space 34c22c2c60SArnd Bergmann * fd000000 f0000000 16M PCIe WA space (Orion-1/Orion-NAS only) 35c22c2c60SArnd Bergmann ****************************************************************************/ 36c22c2c60SArnd Bergmann #define ORION5X_REGS_PHYS_BASE 0xf1000000 373584be9eSArnd Bergmann #define ORION5X_REGS_VIRT_BASE IOMEM(0xfec00000) 38c22c2c60SArnd Bergmann #define ORION5X_REGS_SIZE SZ_1M 39c22c2c60SArnd Bergmann 40c22c2c60SArnd Bergmann #define ORION5X_PCIE_IO_PHYS_BASE 0xf2000000 41c22c2c60SArnd Bergmann #define ORION5X_PCIE_IO_BUS_BASE 0x00000000 42c22c2c60SArnd Bergmann #define ORION5X_PCIE_IO_SIZE SZ_64K 43c22c2c60SArnd Bergmann 44c22c2c60SArnd Bergmann #define ORION5X_PCI_IO_PHYS_BASE 0xf2100000 45c22c2c60SArnd Bergmann #define ORION5X_PCI_IO_BUS_BASE 0x00010000 46c22c2c60SArnd Bergmann #define ORION5X_PCI_IO_SIZE SZ_64K 47c22c2c60SArnd Bergmann 48c22c2c60SArnd Bergmann #define ORION5X_SRAM_PHYS_BASE (0xf2200000) 49c22c2c60SArnd Bergmann #define ORION5X_SRAM_SIZE SZ_8K 50c22c2c60SArnd Bergmann 51c22c2c60SArnd Bergmann /* Relevant only for Orion-1/Orion-NAS */ 52c22c2c60SArnd Bergmann #define ORION5X_PCIE_WA_PHYS_BASE 0xf0000000 53c22c2c60SArnd Bergmann #define ORION5X_PCIE_WA_VIRT_BASE IOMEM(0xfd000000) 54c22c2c60SArnd Bergmann #define ORION5X_PCIE_WA_SIZE SZ_16M 55c22c2c60SArnd Bergmann 56c22c2c60SArnd Bergmann #define ORION5X_PCIE_MEM_PHYS_BASE 0xe0000000 57c22c2c60SArnd Bergmann #define ORION5X_PCIE_MEM_SIZE SZ_128M 58c22c2c60SArnd Bergmann 59c22c2c60SArnd Bergmann #define ORION5X_PCI_MEM_PHYS_BASE 0xe8000000 60c22c2c60SArnd Bergmann #define ORION5X_PCI_MEM_SIZE SZ_128M 61c22c2c60SArnd Bergmann 62c22c2c60SArnd Bergmann /******************************************************************************* 63c22c2c60SArnd Bergmann * Orion Registers Map 64c22c2c60SArnd Bergmann ******************************************************************************/ 65c22c2c60SArnd Bergmann 66c22c2c60SArnd Bergmann #define ORION5X_DDR_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x00000) 67c22c2c60SArnd Bergmann #define ORION5X_DDR_WINS_BASE (ORION5X_DDR_PHYS_BASE + 0x1500) 68c22c2c60SArnd Bergmann #define ORION5X_DDR_WINS_SZ (0x10) 69c22c2c60SArnd Bergmann #define ORION5X_DDR_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x00000) 70c22c2c60SArnd Bergmann #define ORION5X_DEV_BUS_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x10000) 71c22c2c60SArnd Bergmann #define ORION5X_DEV_BUS_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x10000) 72c22c2c60SArnd Bergmann #define ORION5X_DEV_BUS_REG(x) (ORION5X_DEV_BUS_VIRT_BASE + (x)) 73c22c2c60SArnd Bergmann #define GPIO_VIRT_BASE ORION5X_DEV_BUS_REG(0x0100) 74c22c2c60SArnd Bergmann #define SPI_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE + 0x0600) 75c22c2c60SArnd Bergmann #define I2C_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE + 0x1000) 76c22c2c60SArnd Bergmann #define UART0_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE + 0x2000) 77c22c2c60SArnd Bergmann #define UART0_VIRT_BASE (ORION5X_DEV_BUS_VIRT_BASE + 0x2000) 78c22c2c60SArnd Bergmann #define UART1_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE + 0x2100) 79c22c2c60SArnd Bergmann #define UART1_VIRT_BASE (ORION5X_DEV_BUS_VIRT_BASE + 0x2100) 80c22c2c60SArnd Bergmann 81c22c2c60SArnd Bergmann #define ORION5X_BRIDGE_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x20000) 82c22c2c60SArnd Bergmann #define ORION5X_BRIDGE_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x20000) 83c22c2c60SArnd Bergmann #define ORION5X_BRIDGE_WINS_BASE (ORION5X_BRIDGE_PHYS_BASE) 84c22c2c60SArnd Bergmann #define ORION5X_BRIDGE_WINS_SZ (0x80) 85c22c2c60SArnd Bergmann 86c22c2c60SArnd Bergmann #define ORION5X_PCI_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x30000) 87c22c2c60SArnd Bergmann 88c22c2c60SArnd Bergmann #define ORION5X_PCIE_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x40000) 89c22c2c60SArnd Bergmann 90c22c2c60SArnd Bergmann #define ORION5X_USB0_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x50000) 91c22c2c60SArnd Bergmann #define ORION5X_USB0_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x50000) 92c22c2c60SArnd Bergmann 93c22c2c60SArnd Bergmann #define ORION5X_XOR_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x60900) 94c22c2c60SArnd Bergmann #define ORION5X_XOR_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x60900) 95c22c2c60SArnd Bergmann 96c22c2c60SArnd Bergmann #define ORION5X_ETH_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x70000) 97c22c2c60SArnd Bergmann #define ORION5X_ETH_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x70000) 98c22c2c60SArnd Bergmann 99c22c2c60SArnd Bergmann #define ORION5X_SATA_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x80000) 100c22c2c60SArnd Bergmann #define ORION5X_SATA_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x80000) 101c22c2c60SArnd Bergmann 102c22c2c60SArnd Bergmann #define ORION5X_CRYPTO_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x90000) 103c22c2c60SArnd Bergmann 104c22c2c60SArnd Bergmann #define ORION5X_USB1_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0xa0000) 105c22c2c60SArnd Bergmann #define ORION5X_USB1_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0xa0000) 106c22c2c60SArnd Bergmann 107c22c2c60SArnd Bergmann /******************************************************************************* 108c22c2c60SArnd Bergmann * Device Bus Registers 109c22c2c60SArnd Bergmann ******************************************************************************/ 110c22c2c60SArnd Bergmann #define MPP_0_7_CTRL ORION5X_DEV_BUS_REG(0x000) 111c22c2c60SArnd Bergmann #define MPP_8_15_CTRL ORION5X_DEV_BUS_REG(0x004) 112c22c2c60SArnd Bergmann #define MPP_16_19_CTRL ORION5X_DEV_BUS_REG(0x050) 113c22c2c60SArnd Bergmann #define MPP_DEV_CTRL ORION5X_DEV_BUS_REG(0x008) 114c22c2c60SArnd Bergmann #define MPP_RESET_SAMPLE ORION5X_DEV_BUS_REG(0x010) 115c22c2c60SArnd Bergmann #define DEV_BANK_0_PARAM ORION5X_DEV_BUS_REG(0x45c) 116c22c2c60SArnd Bergmann #define DEV_BANK_1_PARAM ORION5X_DEV_BUS_REG(0x460) 117c22c2c60SArnd Bergmann #define DEV_BANK_2_PARAM ORION5X_DEV_BUS_REG(0x464) 118c22c2c60SArnd Bergmann #define DEV_BANK_BOOT_PARAM ORION5X_DEV_BUS_REG(0x46c) 119c22c2c60SArnd Bergmann #define DEV_BUS_CTRL ORION5X_DEV_BUS_REG(0x4c0) 120c22c2c60SArnd Bergmann #define DEV_BUS_INT_CAUSE ORION5X_DEV_BUS_REG(0x4d0) 121c22c2c60SArnd Bergmann #define DEV_BUS_INT_MASK ORION5X_DEV_BUS_REG(0x4d4) 122c22c2c60SArnd Bergmann 123c22c2c60SArnd Bergmann /******************************************************************************* 124c22c2c60SArnd Bergmann * Supported Devices & Revisions 125c22c2c60SArnd Bergmann ******************************************************************************/ 126c22c2c60SArnd Bergmann /* Orion-1 (88F5181) and Orion-VoIP (88F5181L) */ 127c22c2c60SArnd Bergmann #define MV88F5181_DEV_ID 0x5181 128c22c2c60SArnd Bergmann #define MV88F5181_REV_B1 3 129c22c2c60SArnd Bergmann #define MV88F5181L_REV_A0 8 130c22c2c60SArnd Bergmann #define MV88F5181L_REV_A1 9 131c22c2c60SArnd Bergmann /* Orion-NAS (88F5182) */ 132c22c2c60SArnd Bergmann #define MV88F5182_DEV_ID 0x5182 133c22c2c60SArnd Bergmann #define MV88F5182_REV_A2 2 134c22c2c60SArnd Bergmann /* Orion-2 (88F5281) */ 135c22c2c60SArnd Bergmann #define MV88F5281_DEV_ID 0x5281 136c22c2c60SArnd Bergmann #define MV88F5281_REV_D0 4 137c22c2c60SArnd Bergmann #define MV88F5281_REV_D1 5 138c22c2c60SArnd Bergmann #define MV88F5281_REV_D2 6 139c22c2c60SArnd Bergmann /* Orion-1-90 (88F6183) */ 140c22c2c60SArnd Bergmann #define MV88F6183_DEV_ID 0x6183 141c22c2c60SArnd Bergmann #define MV88F6183_REV_B0 3 142c22c2c60SArnd Bergmann 143c22c2c60SArnd Bergmann #endif 144