xref: /openbmc/linux/arch/arm/mach-orion5x/mpp.h (revision b2441318)
1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */
219cfd5c0SLennert Buytenhek #ifndef __ARCH_ORION5X_MPP_H
319cfd5c0SLennert Buytenhek #define __ARCH_ORION5X_MPP_H
419cfd5c0SLennert Buytenhek 
5554cdaefSAndrew Lunn #define MPP(_num, _sel, _in, _out, _F5181l, _F5182, _F5281) ( \
6554cdaefSAndrew Lunn 	/* MPP number */		((_num) & 0xff) | \
7554cdaefSAndrew Lunn 	/* MPP select value */		(((_sel) & 0xf) << 8) | \
8554cdaefSAndrew Lunn 	/* may be input signal */	((!!(_in)) << 12) | \
9554cdaefSAndrew Lunn 	/* may be output signal */	((!!(_out)) << 13) | \
10554cdaefSAndrew Lunn 	/* available on F5181l */	((!!(_F5181l)) << 14) | \
11554cdaefSAndrew Lunn 	/* available on F5182 */	((!!(_F5182)) << 15) | \
12554cdaefSAndrew Lunn 	/* available on F5281 */	((!!(_F5281)) << 16))
1319cfd5c0SLennert Buytenhek 
14554cdaefSAndrew Lunn 				/* num sel  i  o  5181 5182 5281 */
1519cfd5c0SLennert Buytenhek 
16554cdaefSAndrew Lunn #define MPP_F5181_MASK		MPP(0,  0x0, 0, 0, 1,   0,   0)
17554cdaefSAndrew Lunn #define MPP_F5182_MASK		MPP(0,  0x0, 0, 0, 0,   1,   0)
18554cdaefSAndrew Lunn #define MPP_F5281_MASK		MPP(0,  0x0, 0, 0, 0,   0,   1)
1919cfd5c0SLennert Buytenhek 
20554cdaefSAndrew Lunn #define MPP0_UNUSED	        MPP(0,  0x3, 0, 0, 1,   1,   1)
21554cdaefSAndrew Lunn #define MPP0_GPIO		MPP(0,  0x3, 1, 1, 1,   1,   1)
22554cdaefSAndrew Lunn #define MPP0_PCIE_RST_OUTn	MPP(0,  0x0, 0, 0, 1,   1,   1)
23554cdaefSAndrew Lunn #define MPP0_PCI_ARB            MPP(0,  0x2, 0, 0, 1,   1,   1)
2419cfd5c0SLennert Buytenhek 
25554cdaefSAndrew Lunn #define MPP1_UNUSED		MPP(1,  0x0, 0, 0, 1,   1,   1)
26554cdaefSAndrew Lunn #define MPP1_GPIO		MPP(1,  0x0, 1, 1, 1,   1,   1)
27554cdaefSAndrew Lunn #define MPP1_PCI_ARB            MPP(1,  0x2, 0, 0, 1,   1,   1)
2819cfd5c0SLennert Buytenhek 
29554cdaefSAndrew Lunn #define MPP2_UNUSED		MPP(2,  0x0, 0, 0, 1,   1,   1)
30554cdaefSAndrew Lunn #define MPP2_GPIO		MPP(2,  0x0, 1, 1, 1,   1,   1)
31554cdaefSAndrew Lunn #define MPP2_PCI_ARB            MPP(2,  0x2, 0, 0, 1,   1,   1)
32554cdaefSAndrew Lunn #define MPP2_PCI_PMEn           MPP(2,  0x3, 0, 0, 1,   1,   1)
3319cfd5c0SLennert Buytenhek 
34554cdaefSAndrew Lunn #define MPP3_UNUSED		MPP(3,  0x0, 0, 0, 1,   1,   1)
35554cdaefSAndrew Lunn #define MPP3_GPIO		MPP(3,  0x0, 1, 1, 1,   1,   1)
36554cdaefSAndrew Lunn #define MPP3_PCI_ARB            MPP(3,  0x2, 0, 0, 1,   1,   1)
3719cfd5c0SLennert Buytenhek 
38554cdaefSAndrew Lunn #define MPP4_UNUSED		MPP(4,  0x0, 0, 0, 1,   1,   1)
39554cdaefSAndrew Lunn #define MPP4_GPIO		MPP(4,  0x0, 1, 1, 1,   1,   1)
40554cdaefSAndrew Lunn #define MPP4_PCI_ARB            MPP(4,  0x2, 0, 0, 1,   1,   1)
41554cdaefSAndrew Lunn #define MPP4_NAND               MPP(4,  0x4, 0, 0, 0,   1,   1)
42554cdaefSAndrew Lunn #define MPP4_SATA_LED           MPP(4,  0x5, 0, 0, 0,   1,   0)
4319cfd5c0SLennert Buytenhek 
44554cdaefSAndrew Lunn #define MPP5_UNUSED		MPP(5,  0x0, 0, 0, 1,   1,   1)
45554cdaefSAndrew Lunn #define MPP5_GPIO		MPP(5,  0x0, 1, 1, 1,   1,   1)
46554cdaefSAndrew Lunn #define MPP5_PCI_ARB            MPP(5,  0x2, 0, 0, 1,   1,   1)
47554cdaefSAndrew Lunn #define MPP5_NAND               MPP(5,  0x4, 0, 0, 0,   1,   1)
48554cdaefSAndrew Lunn #define MPP5_SATA_LED           MPP(5,  0x5, 0, 0, 0,   1,   0)
4919cfd5c0SLennert Buytenhek 
50554cdaefSAndrew Lunn #define MPP6_UNUSED		MPP(6,  0x0, 0, 0, 1,   1,   1)
51554cdaefSAndrew Lunn #define MPP6_GPIO		MPP(6,  0x0, 1, 1, 1,   1,   1)
52554cdaefSAndrew Lunn #define MPP6_PCI_ARB            MPP(6,  0x2, 0, 0, 1,   1,   1)
53554cdaefSAndrew Lunn #define MPP6_NAND               MPP(6,  0x4, 0, 0, 0,   1,   1)
54554cdaefSAndrew Lunn #define MPP6_PCI_CLK            MPP(6,  0x5, 0, 0, 1,   0,   0)
55554cdaefSAndrew Lunn #define MPP6_SATA_LED           MPP(6,  0x5, 0, 0, 0,   1,   0)
5619cfd5c0SLennert Buytenhek 
57554cdaefSAndrew Lunn #define MPP7_UNUSED		MPP(7,  0x0, 0, 0, 1,   1,   1)
58554cdaefSAndrew Lunn #define MPP7_GPIO		MPP(7,  0x0, 1, 1, 1,   1,   1)
59554cdaefSAndrew Lunn #define MPP7_PCI_ARB            MPP(7,  0x2, 0, 0, 1,   1,   1)
60554cdaefSAndrew Lunn #define MPP7_NAND               MPP(7,  0x4, 0, 0, 0,   1,   1)
61554cdaefSAndrew Lunn #define MPP7_PCI_CLK            MPP(7,  0x5, 0, 0, 1,   0,   0)
62554cdaefSAndrew Lunn #define MPP7_SATA_LED           MPP(7,  0x5, 0, 0, 0,   1,   0)
6319cfd5c0SLennert Buytenhek 
64554cdaefSAndrew Lunn #define MPP8_UNUSED		MPP(8,  0x0, 0, 0, 1,   1,   1)
65554cdaefSAndrew Lunn #define MPP8_GPIO		MPP(8,  0x0, 1, 1, 1,   1,   1)
66554cdaefSAndrew Lunn #define MPP8_GIGE               MPP(8,  0x1, 0, 0, 1,   1,   1)
6719cfd5c0SLennert Buytenhek 
68554cdaefSAndrew Lunn #define MPP9_UNUSED		MPP(9,  0x0, 0, 0, 1,   1,   1)
6948d99f47SBen Hutchings #define MPP9_GPIO		MPP(9,  0x0, 1, 1, 1,   1,   1)
7048d99f47SBen Hutchings #define MPP9_GIGE               MPP(9,  0x1, 0, 0, 1,   1,   1)
71554cdaefSAndrew Lunn 
72554cdaefSAndrew Lunn #define MPP10_UNUSED		MPP(10, 0x0, 0, 0, 1,   1,   1)
73554cdaefSAndrew Lunn #define MPP10_GPIO		MPP(10, 0x0, 1, 1, 1,   1,   1)
74554cdaefSAndrew Lunn #define MPP10_GIGE              MPP(10, 0x1, 0, 0, 1,   1,   1)
75554cdaefSAndrew Lunn 
76554cdaefSAndrew Lunn #define MPP11_UNUSED		MPP(11, 0x0, 0, 0, 1,   1,   1)
77554cdaefSAndrew Lunn #define MPP11_GPIO		MPP(11, 0x0, 1, 1, 1,   1,   1)
78554cdaefSAndrew Lunn #define MPP11_GIGE              MPP(11, 0x1, 0, 0, 1,   1,   1)
79554cdaefSAndrew Lunn 
80554cdaefSAndrew Lunn #define MPP12_UNUSED		MPP(12, 0x0, 0, 0, 1,   1,   1)
81554cdaefSAndrew Lunn #define MPP12_GPIO		MPP(12, 0x0, 1, 1, 1,   1,   1)
82554cdaefSAndrew Lunn #define MPP12_GIGE              MPP(12, 0x1, 0, 0, 1,   1,   1)
83554cdaefSAndrew Lunn #define MPP12_NAND              MPP(12, 0x4, 0, 0, 0,   1,   1)
84554cdaefSAndrew Lunn #define MPP12_SATA_LED          MPP(12, 0x5, 0, 0, 0,   1,   0)
85554cdaefSAndrew Lunn 
86554cdaefSAndrew Lunn #define MPP13_UNUSED		MPP(13, 0x0, 0, 0, 1,   1,   1)
87554cdaefSAndrew Lunn #define MPP13_GPIO		MPP(13, 0x0, 1, 1, 1,   1,   1)
88554cdaefSAndrew Lunn #define MPP13_GIGE              MPP(13, 0x1, 0, 0, 1,   1,   1)
89554cdaefSAndrew Lunn #define MPP13_NAND              MPP(13, 0x4, 0, 0, 0,   1,   1)
90554cdaefSAndrew Lunn #define MPP13_SATA_LED          MPP(13, 0x5, 0, 0, 0,   1,   0)
91554cdaefSAndrew Lunn 
92554cdaefSAndrew Lunn #define MPP14_UNUSED		MPP(14, 0x0, 0, 0, 1,   1,   1)
93554cdaefSAndrew Lunn #define MPP14_GPIO		MPP(14, 0x0, 1, 1, 1,   1,   1)
94554cdaefSAndrew Lunn #define MPP14_GIGE              MPP(14, 0x1, 0, 0, 1,   1,   1)
95554cdaefSAndrew Lunn #define MPP14_NAND              MPP(14, 0x4, 0, 0, 0,   1,   1)
96554cdaefSAndrew Lunn #define MPP14_SATA_LED          MPP(14, 0x5, 0, 0, 0,   1,   0)
97554cdaefSAndrew Lunn 
98554cdaefSAndrew Lunn #define MPP15_UNUSED		MPP(15, 0x0, 0, 0, 1,   1,   1)
99554cdaefSAndrew Lunn #define MPP15_GPIO		MPP(15, 0x0, 1, 1, 1,   1,   1)
100554cdaefSAndrew Lunn #define MPP15_GIGE              MPP(15, 0x1, 0, 0, 1,   1,   1)
101554cdaefSAndrew Lunn #define MPP15_NAND              MPP(15, 0x4, 0, 0, 0,   1,   1)
102554cdaefSAndrew Lunn #define MPP15_SATA_LED          MPP(15, 0x5, 0, 0, 0,   1,   0)
103554cdaefSAndrew Lunn 
104554cdaefSAndrew Lunn #define MPP16_UNUSED		MPP(16, 0x0, 0, 0, 1,   1,   1)
105554cdaefSAndrew Lunn #define MPP16_GPIO		MPP(16, 0x5, 1, 1, 0,   1,   0)
106554cdaefSAndrew Lunn #define MPP16_GIGE              MPP(16, 0x1, 0, 0, 1,   1,   1)
107554cdaefSAndrew Lunn #define MPP16_NAND              MPP(16, 0x4, 0, 0, 0,   1,   1)
108554cdaefSAndrew Lunn #define MPP16_UART              MPP(16, 0x0, 0, 0, 0,   1,   1)
109554cdaefSAndrew Lunn 
110554cdaefSAndrew Lunn #define MPP17_UNUSED		MPP(17, 0x0, 0, 0, 1,   1,   1)
111554cdaefSAndrew Lunn #define MPP17_GPIO		MPP(17, 0x5, 1, 1, 0,   1,   0)
112554cdaefSAndrew Lunn #define MPP17_GIGE              MPP(17, 0x1, 0, 0, 1,   1,   1)
113554cdaefSAndrew Lunn #define MPP17_NAND              MPP(17, 0x4, 0, 0, 0,   1,   1)
114554cdaefSAndrew Lunn #define MPP17_UART              MPP(17, 0x0, 0, 0, 0,   1,   1)
115554cdaefSAndrew Lunn 
116554cdaefSAndrew Lunn #define MPP18_UNUSED		MPP(18, 0x0, 0, 0, 1,   1,   1)
117554cdaefSAndrew Lunn #define MPP18_GPIO		MPP(18, 0x5, 1, 1, 0,   1,   0)
118554cdaefSAndrew Lunn #define MPP18_GIGE              MPP(18, 0x1, 0, 0, 1,   1,   1)
119554cdaefSAndrew Lunn #define MPP18_UART              MPP(18, 0x0, 0, 0, 0,   1,   1)
120554cdaefSAndrew Lunn 
121554cdaefSAndrew Lunn #define MPP19_UNUSED		MPP(19, 0x0, 0, 0, 1,   1,   1)
122554cdaefSAndrew Lunn #define MPP19_GPIO		MPP(19, 0x5, 1, 1, 0,   1,   0)
123554cdaefSAndrew Lunn #define MPP19_GIGE              MPP(19, 0x1, 0, 0, 1,   1,   1)
124554cdaefSAndrew Lunn #define MPP19_UART              MPP(19, 0x0, 0, 0, 0,   1,   1)
125554cdaefSAndrew Lunn 
126554cdaefSAndrew Lunn #define MPP_MAX			19
127554cdaefSAndrew Lunn 
128554cdaefSAndrew Lunn void orion5x_mpp_conf(unsigned int *mpp_list);
12919cfd5c0SLennert Buytenhek 
13019cfd5c0SLennert Buytenhek #endif
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