19dd0b194SLennert Buytenhek /* 29dd0b194SLennert Buytenhek * arch/arm/mach-orion5x/irq.c 39dd0b194SLennert Buytenhek * 49dd0b194SLennert Buytenhek * Core IRQ functions for Marvell Orion System On Chip 59dd0b194SLennert Buytenhek * 69dd0b194SLennert Buytenhek * Maintainer: Tzachi Perelstein <tzachi@marvell.com> 79dd0b194SLennert Buytenhek * 89dd0b194SLennert Buytenhek * This file is licensed under the terms of the GNU General Public 99dd0b194SLennert Buytenhek * License version 2. This program is licensed "as is" without any 109dd0b194SLennert Buytenhek * warranty of any kind, whether express or implied. 119dd0b194SLennert Buytenhek */ 122f8163baSRussell King #include <linux/gpio.h> 139dd0b194SLennert Buytenhek #include <linux/kernel.h> 149dd0b194SLennert Buytenhek #include <linux/irq.h> 153904a393SThomas Petazzoni #include <linux/io.h> 16fdd8b079SNicolas Pitre #include <mach/bridge-regs.h> 17ce91574cSRob Herring #include <plat/orion-gpio.h> 186f088f1dSLennert Buytenhek #include <plat/irq.h> 19ab5ab9dbSThomas Petazzoni #include <asm/exception.h> 2042366666SAndrew Lunn #include "common.h" 219dd0b194SLennert Buytenhek 22278b45b0SAndrew Lunn static int __initdata gpio0_irqs[4] = { 23278b45b0SAndrew Lunn IRQ_ORION5X_GPIO_0_7, 24278b45b0SAndrew Lunn IRQ_ORION5X_GPIO_8_15, 25278b45b0SAndrew Lunn IRQ_ORION5X_GPIO_16_23, 26278b45b0SAndrew Lunn IRQ_ORION5X_GPIO_24_31, 27278b45b0SAndrew Lunn }; 289dd0b194SLennert Buytenhek 29ab5ab9dbSThomas Petazzoni #ifdef CONFIG_MULTI_IRQ_HANDLER 30ab5ab9dbSThomas Petazzoni /* 31ab5ab9dbSThomas Petazzoni * Compiling with both non-DT and DT support enabled, will 32ab5ab9dbSThomas Petazzoni * break asm irq handler used by non-DT boards. Therefore, 33ab5ab9dbSThomas Petazzoni * we provide a C-style irq handler even for non-DT boards, 34ab5ab9dbSThomas Petazzoni * if MULTI_IRQ_HANDLER is set. 35ab5ab9dbSThomas Petazzoni */ 36ab5ab9dbSThomas Petazzoni 37ab5ab9dbSThomas Petazzoni asmlinkage void 38ab5ab9dbSThomas Petazzoni __exception_irq_entry orion5x_legacy_handle_irq(struct pt_regs *regs) 39ab5ab9dbSThomas Petazzoni { 40ab5ab9dbSThomas Petazzoni u32 stat; 41ab5ab9dbSThomas Petazzoni 42ab5ab9dbSThomas Petazzoni stat = readl_relaxed(MAIN_IRQ_CAUSE); 43ab5ab9dbSThomas Petazzoni stat &= readl_relaxed(MAIN_IRQ_MASK); 44ab5ab9dbSThomas Petazzoni if (stat) { 455be9fc23SBenjamin Cama unsigned int hwirq = 1 + __fls(stat); 46ab5ab9dbSThomas Petazzoni handle_IRQ(hwirq, regs); 47ab5ab9dbSThomas Petazzoni return; 48ab5ab9dbSThomas Petazzoni } 49ab5ab9dbSThomas Petazzoni } 50ab5ab9dbSThomas Petazzoni #endif 51ab5ab9dbSThomas Petazzoni 5207332318SLennert Buytenhek void __init orion5x_init_irq(void) 539dd0b194SLennert Buytenhek { 545be9fc23SBenjamin Cama orion_irq_init(1, MAIN_IRQ_MASK); 559dd0b194SLennert Buytenhek 56ab5ab9dbSThomas Petazzoni #ifdef CONFIG_MULTI_IRQ_HANDLER 57ab5ab9dbSThomas Petazzoni set_handle_irq(orion5x_legacy_handle_irq); 58ab5ab9dbSThomas Petazzoni #endif 59ab5ab9dbSThomas Petazzoni 609dd0b194SLennert Buytenhek /* 619eac6d0aSLennert Buytenhek * Initialize gpiolib for GPIOs 0-31. 629dd0b194SLennert Buytenhek */ 633904a393SThomas Petazzoni orion_gpio_init(NULL, 0, 32, GPIO_VIRT_BASE, 0, 64278b45b0SAndrew Lunn IRQ_ORION5X_GPIO_START, gpio0_irqs); 659dd0b194SLennert Buytenhek } 66