19dd0b194SLennert Buytenhek /* 29dd0b194SLennert Buytenhek * arch/arm/mach-orion5x/irq.c 39dd0b194SLennert Buytenhek * 49dd0b194SLennert Buytenhek * Core IRQ functions for Marvell Orion System On Chip 59dd0b194SLennert Buytenhek * 69dd0b194SLennert Buytenhek * Maintainer: Tzachi Perelstein <tzachi@marvell.com> 79dd0b194SLennert Buytenhek * 89dd0b194SLennert Buytenhek * This file is licensed under the terms of the GNU General Public 99dd0b194SLennert Buytenhek * License version 2. This program is licensed "as is" without any 109dd0b194SLennert Buytenhek * warranty of any kind, whether express or implied. 119dd0b194SLennert Buytenhek */ 129dd0b194SLennert Buytenhek 139dd0b194SLennert Buytenhek #include <linux/kernel.h> 149dd0b194SLennert Buytenhek #include <linux/init.h> 159dd0b194SLennert Buytenhek #include <linux/irq.h> 16fced80c7SRussell King #include <linux/io.h> 179dd0b194SLennert Buytenhek #include <asm/gpio.h> 18a09e64fbSRussell King #include <mach/orion5x.h> 196f088f1dSLennert Buytenhek #include <plat/irq.h> 209dd0b194SLennert Buytenhek #include "common.h" 219dd0b194SLennert Buytenhek 2207332318SLennert Buytenhek static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) 239dd0b194SLennert Buytenhek { 249dd0b194SLennert Buytenhek BUG_ON(irq < IRQ_ORION5X_GPIO_0_7 || irq > IRQ_ORION5X_GPIO_24_31); 259dd0b194SLennert Buytenhek 2607332318SLennert Buytenhek orion_gpio_irq_handler((irq - IRQ_ORION5X_GPIO_0_7) << 3); 279dd0b194SLennert Buytenhek } 289dd0b194SLennert Buytenhek 2907332318SLennert Buytenhek void __init orion5x_init_irq(void) 309dd0b194SLennert Buytenhek { 319dd0b194SLennert Buytenhek int i; 3207332318SLennert Buytenhek 3307332318SLennert Buytenhek orion_irq_init(0, (void __iomem *)MAIN_IRQ_MASK); 349dd0b194SLennert Buytenhek 359dd0b194SLennert Buytenhek /* 369dd0b194SLennert Buytenhek * Mask and clear GPIO IRQ interrupts 379dd0b194SLennert Buytenhek */ 3807332318SLennert Buytenhek writel(0x0, GPIO_LEVEL_MASK(0)); 3907332318SLennert Buytenhek writel(0x0, GPIO_EDGE_MASK(0)); 4007332318SLennert Buytenhek writel(0x0, GPIO_EDGE_CAUSE(0)); 419dd0b194SLennert Buytenhek 429dd0b194SLennert Buytenhek /* 439dd0b194SLennert Buytenhek * Register chained level handlers for GPIO IRQs by default. 449dd0b194SLennert Buytenhek * User can use set_type() if he wants to use edge types handlers. 459dd0b194SLennert Buytenhek */ 469dd0b194SLennert Buytenhek for (i = IRQ_ORION5X_GPIO_START; i < NR_IRQS; i++) { 4707332318SLennert Buytenhek set_irq_chip(i, &orion_gpio_irq_level_chip); 489dd0b194SLennert Buytenhek set_irq_handler(i, handle_level_irq); 4907332318SLennert Buytenhek irq_desc[i].status |= IRQ_LEVEL; 509dd0b194SLennert Buytenhek set_irq_flags(i, IRQF_VALID); 519dd0b194SLennert Buytenhek } 5207332318SLennert Buytenhek set_irq_chained_handler(IRQ_ORION5X_GPIO_0_7, gpio_irq_handler); 5307332318SLennert Buytenhek set_irq_chained_handler(IRQ_ORION5X_GPIO_8_15, gpio_irq_handler); 5407332318SLennert Buytenhek set_irq_chained_handler(IRQ_ORION5X_GPIO_16_23, gpio_irq_handler); 5507332318SLennert Buytenhek set_irq_chained_handler(IRQ_ORION5X_GPIO_24_31, gpio_irq_handler); 569dd0b194SLennert Buytenhek } 57