1065194a0SThomas Petazzoni /* 2065194a0SThomas Petazzoni * arch/arm/mach-orion5x/rd88f5182-setup.c 3065194a0SThomas Petazzoni * 4065194a0SThomas Petazzoni * Marvell Orion-NAS Reference Design Setup 5065194a0SThomas Petazzoni * 6065194a0SThomas Petazzoni * Maintainer: Ronen Shitrit <rshitrit@marvell.com> 7065194a0SThomas Petazzoni * 8065194a0SThomas Petazzoni * This file is licensed under the terms of the GNU General Public 9065194a0SThomas Petazzoni * License version 2. This program is licensed "as is" without any 10065194a0SThomas Petazzoni * warranty of any kind, whether express or implied. 11065194a0SThomas Petazzoni */ 12065194a0SThomas Petazzoni #include <linux/gpio.h> 13065194a0SThomas Petazzoni #include <linux/kernel.h> 14065194a0SThomas Petazzoni #include <linux/init.h> 15065194a0SThomas Petazzoni #include <linux/platform_device.h> 16065194a0SThomas Petazzoni #include <linux/pci.h> 17065194a0SThomas Petazzoni #include <linux/irq.h> 18065194a0SThomas Petazzoni #include <asm/mach-types.h> 19065194a0SThomas Petazzoni #include <asm/mach/arch.h> 20065194a0SThomas Petazzoni #include <asm/mach/pci.h> 21065194a0SThomas Petazzoni #include <mach/orion5x.h> 22065194a0SThomas Petazzoni #include "common.h" 23065194a0SThomas Petazzoni 24065194a0SThomas Petazzoni /***************************************************************************** 25065194a0SThomas Petazzoni * RD-88F5182 Info 26065194a0SThomas Petazzoni ****************************************************************************/ 27065194a0SThomas Petazzoni 28065194a0SThomas Petazzoni /* 29065194a0SThomas Petazzoni * PCI 30065194a0SThomas Petazzoni */ 31065194a0SThomas Petazzoni 32065194a0SThomas Petazzoni #define RD88F5182_PCI_SLOT0_OFFS 7 33065194a0SThomas Petazzoni #define RD88F5182_PCI_SLOT0_IRQ_A_PIN 7 34065194a0SThomas Petazzoni #define RD88F5182_PCI_SLOT0_IRQ_B_PIN 6 35065194a0SThomas Petazzoni 36065194a0SThomas Petazzoni /***************************************************************************** 37065194a0SThomas Petazzoni * PCI 38065194a0SThomas Petazzoni ****************************************************************************/ 39065194a0SThomas Petazzoni 40065194a0SThomas Petazzoni static void __init rd88f5182_pci_preinit(void) 41065194a0SThomas Petazzoni { 42065194a0SThomas Petazzoni int pin; 43065194a0SThomas Petazzoni 44065194a0SThomas Petazzoni /* 45065194a0SThomas Petazzoni * Configure PCI GPIO IRQ pins 46065194a0SThomas Petazzoni */ 47065194a0SThomas Petazzoni pin = RD88F5182_PCI_SLOT0_IRQ_A_PIN; 48065194a0SThomas Petazzoni if (gpio_request(pin, "PCI IntA") == 0) { 49065194a0SThomas Petazzoni if (gpio_direction_input(pin) == 0) { 50065194a0SThomas Petazzoni irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); 51065194a0SThomas Petazzoni } else { 52065194a0SThomas Petazzoni printk(KERN_ERR "rd88f5182_pci_preinit failed to " 53065194a0SThomas Petazzoni "set_irq_type pin %d\n", pin); 54065194a0SThomas Petazzoni gpio_free(pin); 55065194a0SThomas Petazzoni } 56065194a0SThomas Petazzoni } else { 57065194a0SThomas Petazzoni printk(KERN_ERR "rd88f5182_pci_preinit failed to request gpio %d\n", pin); 58065194a0SThomas Petazzoni } 59065194a0SThomas Petazzoni 60065194a0SThomas Petazzoni pin = RD88F5182_PCI_SLOT0_IRQ_B_PIN; 61065194a0SThomas Petazzoni if (gpio_request(pin, "PCI IntB") == 0) { 62065194a0SThomas Petazzoni if (gpio_direction_input(pin) == 0) { 63065194a0SThomas Petazzoni irq_set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW); 64065194a0SThomas Petazzoni } else { 65065194a0SThomas Petazzoni printk(KERN_ERR "rd88f5182_pci_preinit failed to " 66065194a0SThomas Petazzoni "set_irq_type pin %d\n", pin); 67065194a0SThomas Petazzoni gpio_free(pin); 68065194a0SThomas Petazzoni } 69065194a0SThomas Petazzoni } else { 70065194a0SThomas Petazzoni printk(KERN_ERR "rd88f5182_pci_preinit failed to gpio_request %d\n", pin); 71065194a0SThomas Petazzoni } 72065194a0SThomas Petazzoni } 73065194a0SThomas Petazzoni 74065194a0SThomas Petazzoni static int __init rd88f5182_pci_map_irq(const struct pci_dev *dev, u8 slot, 75065194a0SThomas Petazzoni u8 pin) 76065194a0SThomas Petazzoni { 77065194a0SThomas Petazzoni int irq; 78065194a0SThomas Petazzoni 79065194a0SThomas Petazzoni /* 80065194a0SThomas Petazzoni * Check for devices with hard-wired IRQs. 81065194a0SThomas Petazzoni */ 82065194a0SThomas Petazzoni irq = orion5x_pci_map_irq(dev, slot, pin); 83065194a0SThomas Petazzoni if (irq != -1) 84065194a0SThomas Petazzoni return irq; 85065194a0SThomas Petazzoni 86065194a0SThomas Petazzoni /* 87065194a0SThomas Petazzoni * PCI IRQs are connected via GPIOs 88065194a0SThomas Petazzoni */ 89065194a0SThomas Petazzoni switch (slot - RD88F5182_PCI_SLOT0_OFFS) { 90065194a0SThomas Petazzoni case 0: 91065194a0SThomas Petazzoni if (pin == 1) 92065194a0SThomas Petazzoni return gpio_to_irq(RD88F5182_PCI_SLOT0_IRQ_A_PIN); 93065194a0SThomas Petazzoni else 94065194a0SThomas Petazzoni return gpio_to_irq(RD88F5182_PCI_SLOT0_IRQ_B_PIN); 95065194a0SThomas Petazzoni default: 96065194a0SThomas Petazzoni return -1; 97065194a0SThomas Petazzoni } 98065194a0SThomas Petazzoni } 99065194a0SThomas Petazzoni 100065194a0SThomas Petazzoni static struct hw_pci rd88f5182_pci __initdata = { 101065194a0SThomas Petazzoni .nr_controllers = 2, 102065194a0SThomas Petazzoni .preinit = rd88f5182_pci_preinit, 103065194a0SThomas Petazzoni .setup = orion5x_pci_sys_setup, 104065194a0SThomas Petazzoni .scan = orion5x_pci_sys_scan_bus, 105065194a0SThomas Petazzoni .map_irq = rd88f5182_pci_map_irq, 106065194a0SThomas Petazzoni }; 107065194a0SThomas Petazzoni 108065194a0SThomas Petazzoni static int __init rd88f5182_pci_init(void) 109065194a0SThomas Petazzoni { 110065194a0SThomas Petazzoni if (of_machine_is_compatible("marvell,rd-88f5182-nas")) 111065194a0SThomas Petazzoni pci_common_init(&rd88f5182_pci); 112065194a0SThomas Petazzoni 113065194a0SThomas Petazzoni return 0; 114065194a0SThomas Petazzoni } 115065194a0SThomas Petazzoni 116065194a0SThomas Petazzoni subsys_initcall(rd88f5182_pci_init); 117