1c0718df4SPaul Walmsley /* 2c0718df4SPaul Walmsley * OMAP4 Voltage Controller (VC) data 3c0718df4SPaul Walmsley * 4c0718df4SPaul Walmsley * Copyright (C) 2007, 2010 Texas Instruments, Inc. 5c0718df4SPaul Walmsley * Rajendra Nayak <rnayak@ti.com> 6c0718df4SPaul Walmsley * Lesly A M <x0080970@ti.com> 7c0718df4SPaul Walmsley * Thara Gopinath <thara@ti.com> 8c0718df4SPaul Walmsley * 9c0718df4SPaul Walmsley * Copyright (C) 2008, 2011 Nokia Corporation 10c0718df4SPaul Walmsley * Kalle Jokiniemi 11c0718df4SPaul Walmsley * Paul Walmsley 12c0718df4SPaul Walmsley * 13c0718df4SPaul Walmsley * This program is free software; you can redistribute it and/or modify 14c0718df4SPaul Walmsley * it under the terms of the GNU General Public License version 2 as 15c0718df4SPaul Walmsley * published by the Free Software Foundation. 16c0718df4SPaul Walmsley */ 17c0718df4SPaul Walmsley #include <linux/io.h> 18c0718df4SPaul Walmsley #include <linux/err.h> 19c0718df4SPaul Walmsley #include <linux/init.h> 20c0718df4SPaul Walmsley 214e65331cSTony Lindgren #include "common.h" 22c0718df4SPaul Walmsley 23c0718df4SPaul Walmsley #include "prm44xx.h" 24c0718df4SPaul Walmsley #include "prm-regbits-44xx.h" 25c0718df4SPaul Walmsley #include "voltage.h" 26c0718df4SPaul Walmsley 27c0718df4SPaul Walmsley #include "vc.h" 28c0718df4SPaul Walmsley 29c0718df4SPaul Walmsley /* 30c0718df4SPaul Walmsley * VC data common to 44xx chips 31c0718df4SPaul Walmsley * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file. 32c0718df4SPaul Walmsley */ 33d84adcf4SKevin Hilman static const struct omap_vc_common omap4_vc_common = { 34c0718df4SPaul Walmsley .bypass_val_reg = OMAP4_PRM_VC_VAL_BYPASS_OFFSET, 35c0718df4SPaul Walmsley .data_shift = OMAP4430_DATA_SHIFT, 36c0718df4SPaul Walmsley .slaveaddr_shift = OMAP4430_SLAVEADDR_SHIFT, 37c0718df4SPaul Walmsley .regaddr_shift = OMAP4430_REGADDR_SHIFT, 38c0718df4SPaul Walmsley .valid = OMAP4430_VALID_MASK, 39c0718df4SPaul Walmsley .cmd_on_shift = OMAP4430_ON_SHIFT, 40c0718df4SPaul Walmsley .cmd_on_mask = OMAP4430_ON_MASK, 41c0718df4SPaul Walmsley .cmd_onlp_shift = OMAP4430_ONLP_SHIFT, 42c0718df4SPaul Walmsley .cmd_ret_shift = OMAP4430_RET_SHIFT, 43c0718df4SPaul Walmsley .cmd_off_shift = OMAP4430_OFF_SHIFT, 44f5395480SKevin Hilman .i2c_cfg_reg = OMAP4_PRM_VC_CFG_I2C_MODE_OFFSET, 45f5395480SKevin Hilman .i2c_cfg_hsen_mask = OMAP4430_HSMODEEN_MASK, 46f5395480SKevin Hilman .i2c_mcode_mask = OMAP4430_HSMCODE_MASK, 47c0718df4SPaul Walmsley }; 48c0718df4SPaul Walmsley 49c0718df4SPaul Walmsley /* VC instance data for each controllable voltage line */ 50d84adcf4SKevin Hilman struct omap_vc_channel omap4_vc_mpu = { 518abc0b58SKevin Hilman .flags = OMAP_VC_CHANNEL_DEFAULT | OMAP_VC_CHANNEL_CFG_MUTANT, 52d84adcf4SKevin Hilman .common = &omap4_vc_common, 535876c940SKevin Hilman .smps_sa_reg = OMAP4_PRM_VC_SMPS_SA_OFFSET, 545876c940SKevin Hilman .smps_volra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET, 555876c940SKevin Hilman .smps_cmdra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_CMD_OFFSET, 565876c940SKevin Hilman .cfg_channel_reg = OMAP4_PRM_VC_CFG_CHANNEL_OFFSET, 57c0718df4SPaul Walmsley .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET, 58c0718df4SPaul Walmsley .smps_sa_mask = OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_MASK, 59c0718df4SPaul Walmsley .smps_volra_mask = OMAP4430_VOLRA_VDD_MPU_L_MASK, 60e4e021c5SKevin Hilman .smps_cmdra_mask = OMAP4430_CMDRA_VDD_MPU_L_MASK, 6124d3194aSKevin Hilman .cfg_channel_sa_shift = OMAP4430_SA_VDD_MPU_L_SHIFT, 62c0718df4SPaul Walmsley }; 63c0718df4SPaul Walmsley 64d84adcf4SKevin Hilman struct omap_vc_channel omap4_vc_iva = { 65d84adcf4SKevin Hilman .common = &omap4_vc_common, 665876c940SKevin Hilman .smps_sa_reg = OMAP4_PRM_VC_SMPS_SA_OFFSET, 675876c940SKevin Hilman .smps_volra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET, 685876c940SKevin Hilman .smps_cmdra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_CMD_OFFSET, 695876c940SKevin Hilman .cfg_channel_reg = OMAP4_PRM_VC_CFG_CHANNEL_OFFSET, 70c0718df4SPaul Walmsley .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_IVA_L_OFFSET, 71c0718df4SPaul Walmsley .smps_sa_mask = OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_MASK, 72c0718df4SPaul Walmsley .smps_volra_mask = OMAP4430_VOLRA_VDD_IVA_L_MASK, 73e4e021c5SKevin Hilman .smps_cmdra_mask = OMAP4430_CMDRA_VDD_IVA_L_MASK, 7424d3194aSKevin Hilman .cfg_channel_sa_shift = OMAP4430_SA_VDD_IVA_L_SHIFT, 75c0718df4SPaul Walmsley }; 76c0718df4SPaul Walmsley 77d84adcf4SKevin Hilman struct omap_vc_channel omap4_vc_core = { 78d84adcf4SKevin Hilman .common = &omap4_vc_common, 795876c940SKevin Hilman .smps_sa_reg = OMAP4_PRM_VC_SMPS_SA_OFFSET, 805876c940SKevin Hilman .smps_volra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET, 815876c940SKevin Hilman .smps_cmdra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_CMD_OFFSET, 825876c940SKevin Hilman .cfg_channel_reg = OMAP4_PRM_VC_CFG_CHANNEL_OFFSET, 83c0718df4SPaul Walmsley .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_CORE_L_OFFSET, 84c0718df4SPaul Walmsley .smps_sa_mask = OMAP4430_SA_VDD_CORE_L_0_6_MASK, 85c0718df4SPaul Walmsley .smps_volra_mask = OMAP4430_VOLRA_VDD_CORE_L_MASK, 86e4e021c5SKevin Hilman .smps_cmdra_mask = OMAP4430_CMDRA_VDD_CORE_L_MASK, 8724d3194aSKevin Hilman .cfg_channel_sa_shift = OMAP4430_SA_VDD_CORE_L_SHIFT, 88c0718df4SPaul Walmsley }; 89c0718df4SPaul Walmsley 90