1 /* 2 * OMAP3 Voltage Controller (VC) data 3 * 4 * Copyright (C) 2007, 2010 Texas Instruments, Inc. 5 * Rajendra Nayak <rnayak@ti.com> 6 * Lesly A M <x0080970@ti.com> 7 * Thara Gopinath <thara@ti.com> 8 * 9 * Copyright (C) 2008, 2011 Nokia Corporation 10 * Kalle Jokiniemi 11 * Paul Walmsley 12 * 13 * This program is free software; you can redistribute it and/or modify 14 * it under the terms of the GNU General Public License version 2 as 15 * published by the Free Software Foundation. 16 */ 17 #include <linux/io.h> 18 #include <linux/err.h> 19 #include <linux/init.h> 20 21 #include "common.h" 22 23 #include "prm-regbits-34xx.h" 24 #include "voltage.h" 25 26 #include "vc.h" 27 28 /* 29 * VC data common to 34xx/36xx chips 30 * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file. 31 */ 32 static struct omap_vc_common omap3_vc_common = { 33 .bypass_val_reg = OMAP3_PRM_VC_BYPASS_VAL_OFFSET, 34 .data_shift = OMAP3430_DATA_SHIFT, 35 .slaveaddr_shift = OMAP3430_SLAVEADDR_SHIFT, 36 .regaddr_shift = OMAP3430_REGADDR_SHIFT, 37 .valid = OMAP3430_VALID_MASK, 38 .cmd_on_shift = OMAP3430_VC_CMD_ON_SHIFT, 39 .cmd_on_mask = OMAP3430_VC_CMD_ON_MASK, 40 .cmd_onlp_shift = OMAP3430_VC_CMD_ONLP_SHIFT, 41 .cmd_ret_shift = OMAP3430_VC_CMD_RET_SHIFT, 42 .cmd_off_shift = OMAP3430_VC_CMD_OFF_SHIFT, 43 .i2c_cfg_clear_mask = OMAP3430_SREN_MASK | OMAP3430_HSEN_MASK, 44 .i2c_cfg_hsen_mask = OMAP3430_HSEN_MASK, 45 .i2c_cfg_reg = OMAP3_PRM_VC_I2C_CFG_OFFSET, 46 .i2c_mcode_mask = OMAP3430_MCODE_MASK, 47 }; 48 49 struct omap_vc_channel omap3_vc_mpu = { 50 .flags = OMAP_VC_CHANNEL_DEFAULT, 51 .common = &omap3_vc_common, 52 .smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET, 53 .smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET, 54 .smps_cmdra_reg = OMAP3_PRM_VC_SMPS_CMD_RA_OFFSET, 55 .cfg_channel_reg = OMAP3_PRM_VC_CH_CONF_OFFSET, 56 .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_0_OFFSET, 57 .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA0_MASK, 58 .smps_volra_mask = OMAP3430_VOLRA0_MASK, 59 .smps_cmdra_mask = OMAP3430_CMDRA0_MASK, 60 .cfg_channel_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA0_SHIFT, 61 }; 62 63 struct omap_vc_channel omap3_vc_core = { 64 .common = &omap3_vc_common, 65 .smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET, 66 .smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET, 67 .smps_cmdra_reg = OMAP3_PRM_VC_SMPS_CMD_RA_OFFSET, 68 .cfg_channel_reg = OMAP3_PRM_VC_CH_CONF_OFFSET, 69 .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_1_OFFSET, 70 .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA1_MASK, 71 .smps_volra_mask = OMAP3430_VOLRA1_MASK, 72 .smps_cmdra_mask = OMAP3430_CMDRA1_MASK, 73 .cfg_channel_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA1_SHIFT, 74 }; 75 76 /* 77 * Voltage levels for different operating modes: on, sleep, retention and off 78 */ 79 #define OMAP3_ON_VOLTAGE_UV 1200000 80 #define OMAP3_ONLP_VOLTAGE_UV 1000000 81 #define OMAP3_RET_VOLTAGE_UV 975000 82 #define OMAP3_OFF_VOLTAGE_UV 600000 83 84 struct omap_vc_param omap3_mpu_vc_data = { 85 .on = OMAP3_ON_VOLTAGE_UV, 86 .onlp = OMAP3_ONLP_VOLTAGE_UV, 87 .ret = OMAP3_RET_VOLTAGE_UV, 88 .off = OMAP3_OFF_VOLTAGE_UV, 89 }; 90 91 struct omap_vc_param omap3_core_vc_data = { 92 .on = OMAP3_ON_VOLTAGE_UV, 93 .onlp = OMAP3_ONLP_VOLTAGE_UV, 94 .ret = OMAP3_RET_VOLTAGE_UV, 95 .off = OMAP3_OFF_VOLTAGE_UV, 96 }; 97