1*52e6676eSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 2c49f34bcSTony Lindgren /* 3c49f34bcSTony Lindgren * This file contains the address data for various TI81XX modules. 4c49f34bcSTony Lindgren * 583bf6db0SAlexander A. Klimov * Copyright (C) 2010 Texas Instruments, Inc. - https://www.ti.com/ 6c49f34bcSTony Lindgren */ 7c49f34bcSTony Lindgren 8c49f34bcSTony Lindgren #ifndef __ASM_ARCH_TI81XX_H 9c49f34bcSTony Lindgren #define __ASM_ARCH_TI81XX_H 10c49f34bcSTony Lindgren 11c49f34bcSTony Lindgren #define L4_SLOW_TI81XX_BASE 0x48000000 12c49f34bcSTony Lindgren 13c49f34bcSTony Lindgren #define TI81XX_SCM_BASE 0x48140000 14c49f34bcSTony Lindgren #define TI81XX_CTRL_BASE TI81XX_SCM_BASE 15c49f34bcSTony Lindgren #define TI81XX_PRCM_BASE 0x48180000 16c49f34bcSTony Lindgren 17b6a4226cSPaul Walmsley /* 18b6a4226cSPaul Walmsley * Adjust TAP register base such that omap3_check_revision accesses the correct 19b6a4226cSPaul Walmsley * TI81XX register for checking device ID (it adds 0x204 to tap base while 20b6a4226cSPaul Walmsley * TI81XX DEVICE ID register is at offset 0x600 from control base). 21b6a4226cSPaul Walmsley */ 22b6a4226cSPaul Walmsley #define TI81XX_TAP_BASE (TI81XX_CTRL_BASE + \ 23b6a4226cSPaul Walmsley TI81XX_CONTROL_DEVICE_ID - 0x204) 24b6a4226cSPaul Walmsley 25b6a4226cSPaul Walmsley 26c49f34bcSTony Lindgren #define TI81XX_ARM_INTC_BASE 0x48200000 27c49f34bcSTony Lindgren 28c49f34bcSTony Lindgren #endif /* __ASM_ARCH_TI81XX_H */ 29