xref: /openbmc/linux/arch/arm/mach-omap2/sdrc.c (revision b627b4ed)
1 /*
2  * SMS/SDRC (SDRAM controller) common code for OMAP2/3
3  *
4  * Copyright (C) 2005, 2008 Texas Instruments Inc.
5  * Copyright (C) 2005, 2008 Nokia Corporation
6  *
7  * Tony Lindgren <tony@atomide.com>
8  * Paul Walmsley
9  * Richard Woodruff <r-woodruff2@ti.com>
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License version 2 as
13  * published by the Free Software Foundation.
14  */
15 #undef DEBUG
16 
17 #include <linux/module.h>
18 #include <linux/kernel.h>
19 #include <linux/device.h>
20 #include <linux/list.h>
21 #include <linux/errno.h>
22 #include <linux/delay.h>
23 #include <linux/clk.h>
24 #include <linux/io.h>
25 
26 #include <mach/common.h>
27 #include <mach/clock.h>
28 #include <mach/sram.h>
29 
30 #include "prm.h"
31 
32 #include <mach/sdrc.h>
33 #include "sdrc.h"
34 
35 static struct omap_sdrc_params *sdrc_init_params;
36 
37 void __iomem *omap2_sdrc_base;
38 void __iomem *omap2_sms_base;
39 
40 
41 /**
42  * omap2_sdrc_get_params - return SDRC register values for a given clock rate
43  * @r: SDRC clock rate (in Hz)
44  *
45  * Return pre-calculated values for the SDRC_ACTIM_CTRLA,
46  * SDRC_ACTIM_CTRLB, SDRC_RFR_CTRL, and SDRC_MR registers, for a given
47  * SDRC clock rate 'r'.  These parameters control various timing
48  * delays in the SDRAM controller that are expressed in terms of the
49  * number of SDRC clock cycles to wait; hence the clock rate
50  * dependency. Note that sdrc_init_params must be sorted rate
51  * descending.  Also assumes that both chip-selects use the same
52  * timing parameters.  Returns a struct omap_sdrc_params * upon
53  * success, or NULL upon failure.
54  */
55 struct omap_sdrc_params *omap2_sdrc_get_params(unsigned long r)
56 {
57 	struct omap_sdrc_params *sp;
58 
59 	sp = sdrc_init_params;
60 
61 	while (sp->rate != r)
62 		sp++;
63 
64 	if (!sp->rate)
65 		return NULL;
66 
67 	return sp;
68 }
69 
70 
71 void __init omap2_set_globals_sdrc(struct omap_globals *omap2_globals)
72 {
73 	omap2_sdrc_base = omap2_globals->sdrc;
74 	omap2_sms_base = omap2_globals->sms;
75 }
76 
77 /* turn on smart idle modes for SDRAM scheduler and controller */
78 void __init omap2_sdrc_init(struct omap_sdrc_params *sp)
79 {
80 	u32 l;
81 
82 	l = sms_read_reg(SMS_SYSCONFIG);
83 	l &= ~(0x3 << 3);
84 	l |= (0x2 << 3);
85 	sms_write_reg(l, SMS_SYSCONFIG);
86 
87 	l = sdrc_read_reg(SDRC_SYSCONFIG);
88 	l &= ~(0x3 << 3);
89 	l |= (0x2 << 3);
90 	sdrc_write_reg(l, SDRC_SYSCONFIG);
91 
92 	sdrc_init_params = sp;
93 }
94