xref: /openbmc/linux/arch/arm/mach-omap2/sdrc.c (revision f2ab9977)
1f2ab9977SPaul Walmsley /*
2f2ab9977SPaul Walmsley  * SMS/SDRC (SDRAM controller) common code for OMAP2/3
3f2ab9977SPaul Walmsley  *
4f2ab9977SPaul Walmsley  * Copyright (C) 2005, 2008 Texas Instruments Inc.
5f2ab9977SPaul Walmsley  * Copyright (C) 2005, 2008 Nokia Corporation
6f2ab9977SPaul Walmsley  *
7f2ab9977SPaul Walmsley  * Tony Lindgren <tony@atomide.com>
8f2ab9977SPaul Walmsley  * Paul Walmsley
9f2ab9977SPaul Walmsley  * Richard Woodruff <r-woodruff2@ti.com>
10f2ab9977SPaul Walmsley  *
11f2ab9977SPaul Walmsley  * This program is free software; you can redistribute it and/or modify
12f2ab9977SPaul Walmsley  * it under the terms of the GNU General Public License version 2 as
13f2ab9977SPaul Walmsley  * published by the Free Software Foundation.
14f2ab9977SPaul Walmsley  */
15f2ab9977SPaul Walmsley 
16f2ab9977SPaul Walmsley #include <linux/module.h>
17f2ab9977SPaul Walmsley #include <linux/kernel.h>
18f2ab9977SPaul Walmsley #include <linux/device.h>
19f2ab9977SPaul Walmsley #include <linux/list.h>
20f2ab9977SPaul Walmsley #include <linux/errno.h>
21f2ab9977SPaul Walmsley #include <linux/delay.h>
22f2ab9977SPaul Walmsley #include <linux/clk.h>
23f2ab9977SPaul Walmsley #include <linux/io.h>
24f2ab9977SPaul Walmsley 
25f2ab9977SPaul Walmsley #include <mach/common.h>
26f2ab9977SPaul Walmsley #include <mach/clock.h>
27f2ab9977SPaul Walmsley #include <mach/sram.h>
28f2ab9977SPaul Walmsley 
29f2ab9977SPaul Walmsley #include "prm.h"
30f2ab9977SPaul Walmsley 
31f2ab9977SPaul Walmsley #include <mach/sdrc.h>
32f2ab9977SPaul Walmsley #include "sdrc.h"
33f2ab9977SPaul Walmsley 
34f2ab9977SPaul Walmsley void __iomem *omap2_sdrc_base;
35f2ab9977SPaul Walmsley void __iomem *omap2_sms_base;
36f2ab9977SPaul Walmsley 
37f2ab9977SPaul Walmsley void __init omap2_set_globals_sdrc(struct omap_globals *omap2_globals)
38f2ab9977SPaul Walmsley {
39f2ab9977SPaul Walmsley 	omap2_sdrc_base = omap2_globals->sdrc;
40f2ab9977SPaul Walmsley 	omap2_sms_base = omap2_globals->sms;
41f2ab9977SPaul Walmsley }
42f2ab9977SPaul Walmsley 
43f2ab9977SPaul Walmsley /* turn on smart idle modes for SDRAM scheduler and controller */
44f2ab9977SPaul Walmsley void __init omap2_sdrc_init(void)
45f2ab9977SPaul Walmsley {
46f2ab9977SPaul Walmsley 	u32 l;
47f2ab9977SPaul Walmsley 
48f2ab9977SPaul Walmsley 	l = sms_read_reg(SMS_SYSCONFIG);
49f2ab9977SPaul Walmsley 	l &= ~(0x3 << 3);
50f2ab9977SPaul Walmsley 	l |= (0x2 << 3);
51f2ab9977SPaul Walmsley 	sms_write_reg(l, SMS_SYSCONFIG);
52f2ab9977SPaul Walmsley 
53f2ab9977SPaul Walmsley 	l = sdrc_read_reg(SDRC_SYSCONFIG);
54f2ab9977SPaul Walmsley 	l &= ~(0x3 << 3);
55f2ab9977SPaul Walmsley 	l |= (0x2 << 3);
56f2ab9977SPaul Walmsley 	sdrc_write_reg(l, SDRC_SYSCONFIG);
57f2ab9977SPaul Walmsley }
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