1f2ab9977SPaul Walmsley /* 2f2ab9977SPaul Walmsley * SMS/SDRC (SDRAM controller) common code for OMAP2/3 3f2ab9977SPaul Walmsley * 4f2ab9977SPaul Walmsley * Copyright (C) 2005, 2008 Texas Instruments Inc. 5f2ab9977SPaul Walmsley * Copyright (C) 2005, 2008 Nokia Corporation 6f2ab9977SPaul Walmsley * 7f2ab9977SPaul Walmsley * Tony Lindgren <tony@atomide.com> 8f2ab9977SPaul Walmsley * Paul Walmsley 9f2ab9977SPaul Walmsley * Richard Woodruff <r-woodruff2@ti.com> 10f2ab9977SPaul Walmsley * 11f2ab9977SPaul Walmsley * This program is free software; you can redistribute it and/or modify 12f2ab9977SPaul Walmsley * it under the terms of the GNU General Public License version 2 as 13f2ab9977SPaul Walmsley * published by the Free Software Foundation. 14f2ab9977SPaul Walmsley */ 1587246b75SPaul Walmsley #undef DEBUG 16f2ab9977SPaul Walmsley 17f2ab9977SPaul Walmsley #include <linux/module.h> 18f2ab9977SPaul Walmsley #include <linux/kernel.h> 19f2ab9977SPaul Walmsley #include <linux/device.h> 20f2ab9977SPaul Walmsley #include <linux/list.h> 21f2ab9977SPaul Walmsley #include <linux/errno.h> 22f2ab9977SPaul Walmsley #include <linux/delay.h> 23f2ab9977SPaul Walmsley #include <linux/clk.h> 24f2ab9977SPaul Walmsley #include <linux/io.h> 25f2ab9977SPaul Walmsley 26f2ab9977SPaul Walmsley #include <mach/common.h> 27f2ab9977SPaul Walmsley #include <mach/clock.h> 28f2ab9977SPaul Walmsley #include <mach/sram.h> 29f2ab9977SPaul Walmsley 30f2ab9977SPaul Walmsley #include "prm.h" 31f2ab9977SPaul Walmsley 32f2ab9977SPaul Walmsley #include <mach/sdrc.h> 33f2ab9977SPaul Walmsley #include "sdrc.h" 34f2ab9977SPaul Walmsley 3587246b75SPaul Walmsley static struct omap_sdrc_params *sdrc_init_params; 3687246b75SPaul Walmsley 37f2ab9977SPaul Walmsley void __iomem *omap2_sdrc_base; 38f2ab9977SPaul Walmsley void __iomem *omap2_sms_base; 39f2ab9977SPaul Walmsley 4087246b75SPaul Walmsley 4187246b75SPaul Walmsley /** 4287246b75SPaul Walmsley * omap2_sdrc_get_params - return SDRC register values for a given clock rate 4387246b75SPaul Walmsley * @r: SDRC clock rate (in Hz) 4487246b75SPaul Walmsley * 4587246b75SPaul Walmsley * Return pre-calculated values for the SDRC_ACTIM_CTRLA, 4687246b75SPaul Walmsley * SDRC_ACTIM_CTRLB, SDRC_RFR_CTRL, and SDRC_MR registers, for a given 4787246b75SPaul Walmsley * SDRC clock rate 'r'. These parameters control various timing 4887246b75SPaul Walmsley * delays in the SDRAM controller that are expressed in terms of the 4987246b75SPaul Walmsley * number of SDRC clock cycles to wait; hence the clock rate 5087246b75SPaul Walmsley * dependency. Note that sdrc_init_params must be sorted rate 5187246b75SPaul Walmsley * descending. Also assumes that both chip-selects use the same 5287246b75SPaul Walmsley * timing parameters. Returns a struct omap_sdrc_params * upon 5387246b75SPaul Walmsley * success, or NULL upon failure. 5487246b75SPaul Walmsley */ 5587246b75SPaul Walmsley struct omap_sdrc_params *omap2_sdrc_get_params(unsigned long r) 5687246b75SPaul Walmsley { 5787246b75SPaul Walmsley struct omap_sdrc_params *sp; 5887246b75SPaul Walmsley 5987246b75SPaul Walmsley sp = sdrc_init_params; 6087246b75SPaul Walmsley 6187246b75SPaul Walmsley while (sp->rate != r) 6287246b75SPaul Walmsley sp++; 6387246b75SPaul Walmsley 6487246b75SPaul Walmsley if (!sp->rate) 6587246b75SPaul Walmsley return NULL; 6687246b75SPaul Walmsley 6787246b75SPaul Walmsley return sp; 6887246b75SPaul Walmsley } 6987246b75SPaul Walmsley 7087246b75SPaul Walmsley 71f2ab9977SPaul Walmsley void __init omap2_set_globals_sdrc(struct omap_globals *omap2_globals) 72f2ab9977SPaul Walmsley { 73f2ab9977SPaul Walmsley omap2_sdrc_base = omap2_globals->sdrc; 74f2ab9977SPaul Walmsley omap2_sms_base = omap2_globals->sms; 75f2ab9977SPaul Walmsley } 76f2ab9977SPaul Walmsley 77f2ab9977SPaul Walmsley /* turn on smart idle modes for SDRAM scheduler and controller */ 7887246b75SPaul Walmsley void __init omap2_sdrc_init(struct omap_sdrc_params *sp) 79f2ab9977SPaul Walmsley { 80f2ab9977SPaul Walmsley u32 l; 81f2ab9977SPaul Walmsley 82f2ab9977SPaul Walmsley l = sms_read_reg(SMS_SYSCONFIG); 83f2ab9977SPaul Walmsley l &= ~(0x3 << 3); 84f2ab9977SPaul Walmsley l |= (0x2 << 3); 85f2ab9977SPaul Walmsley sms_write_reg(l, SMS_SYSCONFIG); 86f2ab9977SPaul Walmsley 87f2ab9977SPaul Walmsley l = sdrc_read_reg(SDRC_SYSCONFIG); 88f2ab9977SPaul Walmsley l &= ~(0x3 << 3); 89f2ab9977SPaul Walmsley l |= (0x2 << 3); 90f2ab9977SPaul Walmsley sdrc_write_reg(l, SDRC_SYSCONFIG); 9187246b75SPaul Walmsley 9287246b75SPaul Walmsley sdrc_init_params = sp; 93f2ab9977SPaul Walmsley } 94