1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * OMAP44xx SCRM registers and bitfields 4 * 5 * Copyright (C) 2010 Texas Instruments, Inc. 6 * 7 * Benoit Cousson (b-cousson@ti.com) 8 * 9 * This file is automatically generated from the OMAP hardware databases. 10 * We respectfully ask that any modifications to this file be coordinated 11 * with the public linux-omap@vger.kernel.org mailing list and the 12 * authors above to ensure that the autogeneration scripts are kept 13 * up-to-date with the file contents. 14 */ 15 16 #ifndef __ARCH_ARM_MACH_OMAP2_SCRM_44XX_H 17 #define __ARCH_ARM_MACH_OMAP2_SCRM_44XX_H 18 19 #define OMAP4_SCRM_BASE 0x4a30a000 20 21 #define OMAP44XX_SCRM_REGADDR(reg) \ 22 OMAP2_L4_IO_ADDRESS(OMAP4_SCRM_BASE + (reg)) 23 24 /* Registers offset */ 25 #define OMAP4_SCRM_REVISION_SCRM_OFFSET 0x0000 26 #define OMAP4_SCRM_REVISION_SCRM OMAP44XX_SCRM_REGADDR(0x0000) 27 #define OMAP4_SCRM_CLKSETUPTIME_OFFSET 0x0100 28 #define OMAP4_SCRM_CLKSETUPTIME OMAP44XX_SCRM_REGADDR(0x0100) 29 #define OMAP4_SCRM_PMICSETUPTIME_OFFSET 0x0104 30 #define OMAP4_SCRM_PMICSETUPTIME OMAP44XX_SCRM_REGADDR(0x0104) 31 #define OMAP4_SCRM_ALTCLKSRC_OFFSET 0x0110 32 #define OMAP4_SCRM_ALTCLKSRC OMAP44XX_SCRM_REGADDR(0x0110) 33 #define OMAP4_SCRM_MODEMCLKM_OFFSET 0x0118 34 #define OMAP4_SCRM_MODEMCLKM OMAP44XX_SCRM_REGADDR(0x0118) 35 #define OMAP4_SCRM_D2DCLKM_OFFSET 0x011c 36 #define OMAP4_SCRM_D2DCLKM OMAP44XX_SCRM_REGADDR(0x011c) 37 #define OMAP4_SCRM_EXTCLKREQ_OFFSET 0x0200 38 #define OMAP4_SCRM_EXTCLKREQ OMAP44XX_SCRM_REGADDR(0x0200) 39 #define OMAP4_SCRM_ACCCLKREQ_OFFSET 0x0204 40 #define OMAP4_SCRM_ACCCLKREQ OMAP44XX_SCRM_REGADDR(0x0204) 41 #define OMAP4_SCRM_PWRREQ_OFFSET 0x0208 42 #define OMAP4_SCRM_PWRREQ OMAP44XX_SCRM_REGADDR(0x0208) 43 #define OMAP4_SCRM_AUXCLKREQ0_OFFSET 0x0210 44 #define OMAP4_SCRM_AUXCLKREQ0 OMAP44XX_SCRM_REGADDR(0x0210) 45 #define OMAP4_SCRM_AUXCLKREQ1_OFFSET 0x0214 46 #define OMAP4_SCRM_AUXCLKREQ1 OMAP44XX_SCRM_REGADDR(0x0214) 47 #define OMAP4_SCRM_AUXCLKREQ2_OFFSET 0x0218 48 #define OMAP4_SCRM_AUXCLKREQ2 OMAP44XX_SCRM_REGADDR(0x0218) 49 #define OMAP4_SCRM_AUXCLKREQ3_OFFSET 0x021c 50 #define OMAP4_SCRM_AUXCLKREQ3 OMAP44XX_SCRM_REGADDR(0x021c) 51 #define OMAP4_SCRM_AUXCLKREQ4_OFFSET 0x0220 52 #define OMAP4_SCRM_AUXCLKREQ4 OMAP44XX_SCRM_REGADDR(0x0220) 53 #define OMAP4_SCRM_AUXCLKREQ5_OFFSET 0x0224 54 #define OMAP4_SCRM_AUXCLKREQ5 OMAP44XX_SCRM_REGADDR(0x0224) 55 #define OMAP4_SCRM_D2DCLKREQ_OFFSET 0x0234 56 #define OMAP4_SCRM_D2DCLKREQ OMAP44XX_SCRM_REGADDR(0x0234) 57 #define OMAP4_SCRM_AUXCLK0_OFFSET 0x0310 58 #define OMAP4_SCRM_AUXCLK0 OMAP44XX_SCRM_REGADDR(0x0310) 59 #define OMAP4_SCRM_AUXCLK1_OFFSET 0x0314 60 #define OMAP4_SCRM_AUXCLK1 OMAP44XX_SCRM_REGADDR(0x0314) 61 #define OMAP4_SCRM_AUXCLK2_OFFSET 0x0318 62 #define OMAP4_SCRM_AUXCLK2 OMAP44XX_SCRM_REGADDR(0x0318) 63 #define OMAP4_SCRM_AUXCLK3_OFFSET 0x031c 64 #define OMAP4_SCRM_AUXCLK3 OMAP44XX_SCRM_REGADDR(0x031c) 65 #define OMAP4_SCRM_AUXCLK4_OFFSET 0x0320 66 #define OMAP4_SCRM_AUXCLK4 OMAP44XX_SCRM_REGADDR(0x0320) 67 #define OMAP4_SCRM_AUXCLK5_OFFSET 0x0324 68 #define OMAP4_SCRM_AUXCLK5 OMAP44XX_SCRM_REGADDR(0x0324) 69 #define OMAP4_SCRM_RSTTIME_OFFSET 0x0400 70 #define OMAP4_SCRM_RSTTIME OMAP44XX_SCRM_REGADDR(0x0400) 71 #define OMAP4_SCRM_MODEMRSTCTRL_OFFSET 0x0418 72 #define OMAP4_SCRM_MODEMRSTCTRL OMAP44XX_SCRM_REGADDR(0x0418) 73 #define OMAP4_SCRM_D2DRSTCTRL_OFFSET 0x041c 74 #define OMAP4_SCRM_D2DRSTCTRL OMAP44XX_SCRM_REGADDR(0x041c) 75 #define OMAP4_SCRM_EXTPWRONRSTCTRL_OFFSET 0x0420 76 #define OMAP4_SCRM_EXTPWRONRSTCTRL OMAP44XX_SCRM_REGADDR(0x0420) 77 #define OMAP4_SCRM_EXTWARMRSTST_OFFSET 0x0510 78 #define OMAP4_SCRM_EXTWARMRSTST OMAP44XX_SCRM_REGADDR(0x0510) 79 #define OMAP4_SCRM_APEWARMRSTST_OFFSET 0x0514 80 #define OMAP4_SCRM_APEWARMRSTST OMAP44XX_SCRM_REGADDR(0x0514) 81 #define OMAP4_SCRM_MODEMWARMRSTST_OFFSET 0x0518 82 #define OMAP4_SCRM_MODEMWARMRSTST OMAP44XX_SCRM_REGADDR(0x0518) 83 #define OMAP4_SCRM_D2DWARMRSTST_OFFSET 0x051c 84 #define OMAP4_SCRM_D2DWARMRSTST OMAP44XX_SCRM_REGADDR(0x051c) 85 86 /* Registers shifts and masks */ 87 88 /* REVISION_SCRM */ 89 #define OMAP4_REV_SHIFT 0 90 #define OMAP4_REV_MASK (0xff << 0) 91 92 /* CLKSETUPTIME */ 93 #define OMAP4_DOWNTIME_SHIFT 16 94 #define OMAP4_DOWNTIME_MASK (0x3f << 16) 95 #define OMAP4_SETUPTIME_SHIFT 0 96 #define OMAP4_SETUPTIME_MASK (0xfff << 0) 97 98 /* PMICSETUPTIME */ 99 #define OMAP4_WAKEUPTIME_SHIFT 16 100 #define OMAP4_WAKEUPTIME_MASK (0x3f << 16) 101 #define OMAP4_SLEEPTIME_SHIFT 0 102 #define OMAP4_SLEEPTIME_MASK (0x3f << 0) 103 104 /* ALTCLKSRC */ 105 #define OMAP4_ENABLE_EXT_SHIFT 3 106 #define OMAP4_ENABLE_EXT_MASK (1 << 3) 107 #define OMAP4_ENABLE_INT_SHIFT 2 108 #define OMAP4_ENABLE_INT_MASK (1 << 2) 109 #define OMAP4_ALTCLKSRC_MODE_SHIFT 0 110 #define OMAP4_ALTCLKSRC_MODE_MASK (0x3 << 0) 111 112 /* MODEMCLKM */ 113 #define OMAP4_CLK_32KHZ_SHIFT 0 114 #define OMAP4_CLK_32KHZ_MASK (1 << 0) 115 116 /* D2DCLKM */ 117 #define OMAP4_SYSCLK_SHIFT 1 118 #define OMAP4_SYSCLK_MASK (1 << 1) 119 120 /* EXTCLKREQ */ 121 #define OMAP4_POLARITY_SHIFT 0 122 #define OMAP4_POLARITY_MASK (1 << 0) 123 124 /* AUXCLKREQ0 */ 125 #define OMAP4_MAPPING_SHIFT 2 126 #define OMAP4_MAPPING_MASK (0x7 << 2) 127 #define OMAP4_MAPPING_WIDTH 3 128 #define OMAP4_ACCURACY_SHIFT 1 129 #define OMAP4_ACCURACY_MASK (1 << 1) 130 131 /* AUXCLK0 */ 132 #define OMAP4_CLKDIV_SHIFT 16 133 #define OMAP4_CLKDIV_MASK (0xf << 16) 134 #define OMAP4_CLKDIV_WIDTH 4 135 #define OMAP4_DISABLECLK_SHIFT 9 136 #define OMAP4_DISABLECLK_MASK (1 << 9) 137 #define OMAP4_ENABLE_SHIFT 8 138 #define OMAP4_ENABLE_MASK (1 << 8) 139 #define OMAP4_SRCSELECT_SHIFT 1 140 #define OMAP4_SRCSELECT_MASK (0x3 << 1) 141 142 /* RSTTIME */ 143 #define OMAP4_RSTTIME_SHIFT 0 144 #define OMAP4_RSTTIME_MASK (0xf << 0) 145 146 /* MODEMRSTCTRL */ 147 #define OMAP4_WARMRST_SHIFT 1 148 #define OMAP4_WARMRST_MASK (1 << 1) 149 #define OMAP4_COLDRST_SHIFT 0 150 #define OMAP4_COLDRST_MASK (1 << 0) 151 152 /* EXTPWRONRSTCTRL */ 153 #define OMAP4_PWRONRST_SHIFT 1 154 #define OMAP4_PWRONRST_MASK (1 << 1) 155 #define OMAP4_ENABLE_EXTPWRONRSTCTRL_SHIFT 0 156 #define OMAP4_ENABLE_EXTPWRONRSTCTRL_MASK (1 << 0) 157 158 /* EXTWARMRSTST */ 159 #define OMAP4_EXTWARMRSTST_SHIFT 0 160 #define OMAP4_EXTWARMRSTST_MASK (1 << 0) 161 162 /* APEWARMRSTST */ 163 #define OMAP4_APEWARMRSTST_SHIFT 1 164 #define OMAP4_APEWARMRSTST_MASK (1 << 1) 165 166 /* MODEMWARMRSTST */ 167 #define OMAP4_MODEMWARMRSTST_SHIFT 2 168 #define OMAP4_MODEMWARMRSTST_MASK (1 << 2) 169 170 /* D2DWARMRSTST */ 171 #define OMAP4_D2DWARMRSTST_SHIFT 3 172 #define OMAP4_D2DWARMRSTST_MASK (1 << 3) 173 174 #endif 175