1c1294045SRajendra Nayak /* 2c1294045SRajendra Nayak * OMAP44xx PRM instance offset macros 3c1294045SRajendra Nayak * 426c98c56SPaul Walmsley * Copyright (C) 2009-2011 Texas Instruments, Inc. 579328706SBenoit Cousson * Copyright (C) 2009-2010 Nokia Corporation 6c1294045SRajendra Nayak * 7c1294045SRajendra Nayak * Paul Walmsley (paul@pwsan.com) 8c1294045SRajendra Nayak * Rajendra Nayak (rnayak@ti.com) 9c1294045SRajendra Nayak * Benoit Cousson (b-cousson@ti.com) 10c1294045SRajendra Nayak * 11c1294045SRajendra Nayak * This file is automatically generated from the OMAP hardware databases. 12c1294045SRajendra Nayak * We respectfully ask that any modifications to this file be coordinated 13c1294045SRajendra Nayak * with the public linux-omap@vger.kernel.org mailing list and the 14c1294045SRajendra Nayak * authors above to ensure that the autogeneration scripts are kept 15c1294045SRajendra Nayak * up-to-date with the file contents. 16c1294045SRajendra Nayak * 17c1294045SRajendra Nayak * This program is free software; you can redistribute it and/or modify 18c1294045SRajendra Nayak * it under the terms of the GNU General Public License version 2 as 19c1294045SRajendra Nayak * published by the Free Software Foundation. 20d198b514SPaul Walmsley * 21d198b514SPaul Walmsley * XXX This file needs to be updated to align on one of "OMAP4", "OMAP44XX", 22d198b514SPaul Walmsley * or "OMAP4430". 23c1294045SRajendra Nayak */ 24c1294045SRajendra Nayak 25c1294045SRajendra Nayak #ifndef __ARCH_ARM_MACH_OMAP2_PRM44XX_H 26c1294045SRajendra Nayak #define __ARCH_ARM_MACH_OMAP2_PRM44XX_H 27c1294045SRajendra Nayak 289920eca8SSantosh Shilimkar #include "prm44xx_54xx.h" 29d198b514SPaul Walmsley #include "prcm-common.h" 3059fb659bSPaul Walmsley #include "prm.h" 31d198b514SPaul Walmsley 32d198b514SPaul Walmsley #define OMAP4430_PRM_BASE 0x4a306000 33d198b514SPaul Walmsley 34cdb54c44SPaul Walmsley #define OMAP44XX_PRM_REGADDR(inst, reg) \ 35cdb54c44SPaul Walmsley OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE + (inst) + (reg)) 36d198b514SPaul Walmsley 37d198b514SPaul Walmsley 38d198b514SPaul Walmsley /* PRM instances */ 39cdb54c44SPaul Walmsley #define OMAP4430_PRM_OCP_SOCKET_INST 0x0000 40cdb54c44SPaul Walmsley #define OMAP4430_PRM_CKGEN_INST 0x0100 41cdb54c44SPaul Walmsley #define OMAP4430_PRM_MPU_INST 0x0300 42cdb54c44SPaul Walmsley #define OMAP4430_PRM_TESLA_INST 0x0400 43cdb54c44SPaul Walmsley #define OMAP4430_PRM_ABE_INST 0x0500 44cdb54c44SPaul Walmsley #define OMAP4430_PRM_ALWAYS_ON_INST 0x0600 45cdb54c44SPaul Walmsley #define OMAP4430_PRM_CORE_INST 0x0700 46cdb54c44SPaul Walmsley #define OMAP4430_PRM_IVAHD_INST 0x0f00 47cdb54c44SPaul Walmsley #define OMAP4430_PRM_CAM_INST 0x1000 48cdb54c44SPaul Walmsley #define OMAP4430_PRM_DSS_INST 0x1100 49cdb54c44SPaul Walmsley #define OMAP4430_PRM_GFX_INST 0x1200 50cdb54c44SPaul Walmsley #define OMAP4430_PRM_L3INIT_INST 0x1300 51cdb54c44SPaul Walmsley #define OMAP4430_PRM_L4PER_INST 0x1400 52cdb54c44SPaul Walmsley #define OMAP4430_PRM_CEFUSE_INST 0x1600 53cdb54c44SPaul Walmsley #define OMAP4430_PRM_WKUP_INST 0x1700 54cdb54c44SPaul Walmsley #define OMAP4430_PRM_WKUP_CM_INST 0x1800 55cdb54c44SPaul Walmsley #define OMAP4430_PRM_EMU_INST 0x1900 56cdb54c44SPaul Walmsley #define OMAP4430_PRM_EMU_CM_INST 0x1a00 57cdb54c44SPaul Walmsley #define OMAP4430_PRM_DEVICE_INST 0x1b00 58cdb54c44SPaul Walmsley #define OMAP4430_PRM_INSTR_INST 0x1f00 59d198b514SPaul Walmsley 60e4156ee5SPaul Walmsley /* PRM clockdomain register offsets (from instance start) */ 61e4156ee5SPaul Walmsley #define OMAP4430_PRM_WKUP_CM_WKUP_CDOFFS 0x0000 62e4156ee5SPaul Walmsley #define OMAP4430_PRM_EMU_CM_EMU_CDOFFS 0x0000 63d198b514SPaul Walmsley 64d198b514SPaul Walmsley /* OMAP4 specific register offsets */ 65d198b514SPaul Walmsley #define OMAP4_RM_RSTCTRL 0x0000 665f2596fcSNishanth Menon #define OMAP4_RM_RSTST 0x0004 675f2596fcSNishanth Menon #define OMAP4_RM_RSTTIME 0x0008 68d198b514SPaul Walmsley #define OMAP4_PM_PWSTCTRL 0x0000 69d198b514SPaul Walmsley #define OMAP4_PM_PWSTST 0x0004 70d198b514SPaul Walmsley 71c1294045SRajendra Nayak 72c1294045SRajendra Nayak /* PRM */ 73c1294045SRajendra Nayak 74c1294045SRajendra Nayak /* PRM.OCP_SOCKET_PRM register offsets */ 752339ea99SRajendra Nayak #define OMAP4_REVISION_PRM_OFFSET 0x0000 76cdb54c44SPaul Walmsley #define OMAP4430_REVISION_PRM OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0000) 772339ea99SRajendra Nayak #define OMAP4_PRM_IRQSTATUS_MPU_OFFSET 0x0010 78cdb54c44SPaul Walmsley #define OMAP4430_PRM_IRQSTATUS_MPU OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0010) 792339ea99SRajendra Nayak #define OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET 0x0014 80cdb54c44SPaul Walmsley #define OMAP4430_PRM_IRQSTATUS_MPU_2 OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0014) 812339ea99SRajendra Nayak #define OMAP4_PRM_IRQENABLE_MPU_OFFSET 0x0018 82cdb54c44SPaul Walmsley #define OMAP4430_PRM_IRQENABLE_MPU OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0018) 832339ea99SRajendra Nayak #define OMAP4_PRM_IRQENABLE_MPU_2_OFFSET 0x001c 84cdb54c44SPaul Walmsley #define OMAP4430_PRM_IRQENABLE_MPU_2 OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x001c) 852339ea99SRajendra Nayak #define OMAP4_PRM_IRQSTATUS_DUCATI_OFFSET 0x0020 86cdb54c44SPaul Walmsley #define OMAP4430_PRM_IRQSTATUS_DUCATI OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0020) 872339ea99SRajendra Nayak #define OMAP4_PRM_IRQENABLE_DUCATI_OFFSET 0x0028 88cdb54c44SPaul Walmsley #define OMAP4430_PRM_IRQENABLE_DUCATI OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0028) 892339ea99SRajendra Nayak #define OMAP4_PRM_IRQSTATUS_TESLA_OFFSET 0x0030 90cdb54c44SPaul Walmsley #define OMAP4430_PRM_IRQSTATUS_TESLA OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0030) 912339ea99SRajendra Nayak #define OMAP4_PRM_IRQENABLE_TESLA_OFFSET 0x0038 92cdb54c44SPaul Walmsley #define OMAP4430_PRM_IRQENABLE_TESLA OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0038) 93fdd4f409SRajendra Nayak #define OMAP4_CM_PRM_PROFILING_CLKCTRL_OFFSET 0x0040 94cdb54c44SPaul Walmsley #define OMAP4430_CM_PRM_PROFILING_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_OCP_SOCKET_INST, 0x0040) 95c1294045SRajendra Nayak 96c1294045SRajendra Nayak /* PRM.CKGEN_PRM register offsets */ 972339ea99SRajendra Nayak #define OMAP4_CM_ABE_DSS_SYS_CLKSEL_OFFSET 0x0000 98cdb54c44SPaul Walmsley #define OMAP4430_CM_ABE_DSS_SYS_CLKSEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CKGEN_INST, 0x0000) 992339ea99SRajendra Nayak #define OMAP4_CM_L4_WKUP_CLKSEL_OFFSET 0x0008 100cdb54c44SPaul Walmsley #define OMAP4430_CM_L4_WKUP_CLKSEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CKGEN_INST, 0x0008) 1012339ea99SRajendra Nayak #define OMAP4_CM_ABE_PLL_REF_CLKSEL_OFFSET 0x000c 102cdb54c44SPaul Walmsley #define OMAP4430_CM_ABE_PLL_REF_CLKSEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CKGEN_INST, 0x000c) 1032339ea99SRajendra Nayak #define OMAP4_CM_SYS_CLKSEL_OFFSET 0x0010 104cdb54c44SPaul Walmsley #define OMAP4430_CM_SYS_CLKSEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CKGEN_INST, 0x0010) 105c1294045SRajendra Nayak 106c1294045SRajendra Nayak /* PRM.MPU_PRM register offsets */ 1072339ea99SRajendra Nayak #define OMAP4_PM_MPU_PWRSTCTRL_OFFSET 0x0000 108cdb54c44SPaul Walmsley #define OMAP4430_PM_MPU_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_MPU_INST, 0x0000) 1092339ea99SRajendra Nayak #define OMAP4_PM_MPU_PWRSTST_OFFSET 0x0004 110cdb54c44SPaul Walmsley #define OMAP4430_PM_MPU_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_MPU_INST, 0x0004) 1112339ea99SRajendra Nayak #define OMAP4_RM_MPU_RSTST_OFFSET 0x0014 112cdb54c44SPaul Walmsley #define OMAP4430_RM_MPU_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_MPU_INST, 0x0014) 1132339ea99SRajendra Nayak #define OMAP4_RM_MPU_MPU_CONTEXT_OFFSET 0x0024 114cdb54c44SPaul Walmsley #define OMAP4430_RM_MPU_MPU_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_MPU_INST, 0x0024) 115c1294045SRajendra Nayak 116c1294045SRajendra Nayak /* PRM.TESLA_PRM register offsets */ 1172339ea99SRajendra Nayak #define OMAP4_PM_TESLA_PWRSTCTRL_OFFSET 0x0000 118cdb54c44SPaul Walmsley #define OMAP4430_PM_TESLA_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_TESLA_INST, 0x0000) 1192339ea99SRajendra Nayak #define OMAP4_PM_TESLA_PWRSTST_OFFSET 0x0004 120cdb54c44SPaul Walmsley #define OMAP4430_PM_TESLA_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_TESLA_INST, 0x0004) 1212339ea99SRajendra Nayak #define OMAP4_RM_TESLA_RSTCTRL_OFFSET 0x0010 122cdb54c44SPaul Walmsley #define OMAP4430_RM_TESLA_RSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_TESLA_INST, 0x0010) 1232339ea99SRajendra Nayak #define OMAP4_RM_TESLA_RSTST_OFFSET 0x0014 124cdb54c44SPaul Walmsley #define OMAP4430_RM_TESLA_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_TESLA_INST, 0x0014) 1252339ea99SRajendra Nayak #define OMAP4_RM_TESLA_TESLA_CONTEXT_OFFSET 0x0024 126cdb54c44SPaul Walmsley #define OMAP4430_RM_TESLA_TESLA_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_TESLA_INST, 0x0024) 127c1294045SRajendra Nayak 128c1294045SRajendra Nayak /* PRM.ABE_PRM register offsets */ 1292339ea99SRajendra Nayak #define OMAP4_PM_ABE_PWRSTCTRL_OFFSET 0x0000 130cdb54c44SPaul Walmsley #define OMAP4430_PM_ABE_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0000) 1312339ea99SRajendra Nayak #define OMAP4_PM_ABE_PWRSTST_OFFSET 0x0004 132cdb54c44SPaul Walmsley #define OMAP4430_PM_ABE_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0004) 1332339ea99SRajendra Nayak #define OMAP4_RM_ABE_AESS_CONTEXT_OFFSET 0x002c 134cdb54c44SPaul Walmsley #define OMAP4430_RM_ABE_AESS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x002c) 1352339ea99SRajendra Nayak #define OMAP4_PM_ABE_PDM_WKDEP_OFFSET 0x0030 136cdb54c44SPaul Walmsley #define OMAP4430_PM_ABE_PDM_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0030) 1372339ea99SRajendra Nayak #define OMAP4_RM_ABE_PDM_CONTEXT_OFFSET 0x0034 138cdb54c44SPaul Walmsley #define OMAP4430_RM_ABE_PDM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0034) 1392339ea99SRajendra Nayak #define OMAP4_PM_ABE_DMIC_WKDEP_OFFSET 0x0038 140cdb54c44SPaul Walmsley #define OMAP4430_PM_ABE_DMIC_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0038) 1412339ea99SRajendra Nayak #define OMAP4_RM_ABE_DMIC_CONTEXT_OFFSET 0x003c 142cdb54c44SPaul Walmsley #define OMAP4430_RM_ABE_DMIC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x003c) 1432339ea99SRajendra Nayak #define OMAP4_PM_ABE_MCASP_WKDEP_OFFSET 0x0040 144cdb54c44SPaul Walmsley #define OMAP4430_PM_ABE_MCASP_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0040) 1452339ea99SRajendra Nayak #define OMAP4_RM_ABE_MCASP_CONTEXT_OFFSET 0x0044 146cdb54c44SPaul Walmsley #define OMAP4430_RM_ABE_MCASP_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0044) 1472339ea99SRajendra Nayak #define OMAP4_PM_ABE_MCBSP1_WKDEP_OFFSET 0x0048 148cdb54c44SPaul Walmsley #define OMAP4430_PM_ABE_MCBSP1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0048) 1492339ea99SRajendra Nayak #define OMAP4_RM_ABE_MCBSP1_CONTEXT_OFFSET 0x004c 150cdb54c44SPaul Walmsley #define OMAP4430_RM_ABE_MCBSP1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x004c) 1512339ea99SRajendra Nayak #define OMAP4_PM_ABE_MCBSP2_WKDEP_OFFSET 0x0050 152cdb54c44SPaul Walmsley #define OMAP4430_PM_ABE_MCBSP2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0050) 1532339ea99SRajendra Nayak #define OMAP4_RM_ABE_MCBSP2_CONTEXT_OFFSET 0x0054 154cdb54c44SPaul Walmsley #define OMAP4430_RM_ABE_MCBSP2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0054) 1552339ea99SRajendra Nayak #define OMAP4_PM_ABE_MCBSP3_WKDEP_OFFSET 0x0058 156cdb54c44SPaul Walmsley #define OMAP4430_PM_ABE_MCBSP3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0058) 1572339ea99SRajendra Nayak #define OMAP4_RM_ABE_MCBSP3_CONTEXT_OFFSET 0x005c 158cdb54c44SPaul Walmsley #define OMAP4430_RM_ABE_MCBSP3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x005c) 1592339ea99SRajendra Nayak #define OMAP4_PM_ABE_SLIMBUS_WKDEP_OFFSET 0x0060 160cdb54c44SPaul Walmsley #define OMAP4430_PM_ABE_SLIMBUS_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0060) 1612339ea99SRajendra Nayak #define OMAP4_RM_ABE_SLIMBUS_CONTEXT_OFFSET 0x0064 162cdb54c44SPaul Walmsley #define OMAP4430_RM_ABE_SLIMBUS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0064) 1632339ea99SRajendra Nayak #define OMAP4_PM_ABE_TIMER5_WKDEP_OFFSET 0x0068 164cdb54c44SPaul Walmsley #define OMAP4430_PM_ABE_TIMER5_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0068) 1652339ea99SRajendra Nayak #define OMAP4_RM_ABE_TIMER5_CONTEXT_OFFSET 0x006c 166cdb54c44SPaul Walmsley #define OMAP4430_RM_ABE_TIMER5_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x006c) 1672339ea99SRajendra Nayak #define OMAP4_PM_ABE_TIMER6_WKDEP_OFFSET 0x0070 168cdb54c44SPaul Walmsley #define OMAP4430_PM_ABE_TIMER6_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0070) 1692339ea99SRajendra Nayak #define OMAP4_RM_ABE_TIMER6_CONTEXT_OFFSET 0x0074 170cdb54c44SPaul Walmsley #define OMAP4430_RM_ABE_TIMER6_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0074) 1712339ea99SRajendra Nayak #define OMAP4_PM_ABE_TIMER7_WKDEP_OFFSET 0x0078 172cdb54c44SPaul Walmsley #define OMAP4430_PM_ABE_TIMER7_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0078) 1732339ea99SRajendra Nayak #define OMAP4_RM_ABE_TIMER7_CONTEXT_OFFSET 0x007c 174cdb54c44SPaul Walmsley #define OMAP4430_RM_ABE_TIMER7_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x007c) 1752339ea99SRajendra Nayak #define OMAP4_PM_ABE_TIMER8_WKDEP_OFFSET 0x0080 176cdb54c44SPaul Walmsley #define OMAP4430_PM_ABE_TIMER8_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0080) 1772339ea99SRajendra Nayak #define OMAP4_RM_ABE_TIMER8_CONTEXT_OFFSET 0x0084 178cdb54c44SPaul Walmsley #define OMAP4430_RM_ABE_TIMER8_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0084) 1792339ea99SRajendra Nayak #define OMAP4_PM_ABE_WDT3_WKDEP_OFFSET 0x0088 180cdb54c44SPaul Walmsley #define OMAP4430_PM_ABE_WDT3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x0088) 1812339ea99SRajendra Nayak #define OMAP4_RM_ABE_WDT3_CONTEXT_OFFSET 0x008c 182cdb54c44SPaul Walmsley #define OMAP4430_RM_ABE_WDT3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ABE_INST, 0x008c) 183c1294045SRajendra Nayak 184c1294045SRajendra Nayak /* PRM.ALWAYS_ON_PRM register offsets */ 1852339ea99SRajendra Nayak #define OMAP4_RM_ALWON_MDMINTC_CONTEXT_OFFSET 0x0024 186cdb54c44SPaul Walmsley #define OMAP4430_RM_ALWON_MDMINTC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_INST, 0x0024) 1872339ea99SRajendra Nayak #define OMAP4_PM_ALWON_SR_MPU_WKDEP_OFFSET 0x0028 188cdb54c44SPaul Walmsley #define OMAP4430_PM_ALWON_SR_MPU_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_INST, 0x0028) 1892339ea99SRajendra Nayak #define OMAP4_RM_ALWON_SR_MPU_CONTEXT_OFFSET 0x002c 190cdb54c44SPaul Walmsley #define OMAP4430_RM_ALWON_SR_MPU_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_INST, 0x002c) 1912339ea99SRajendra Nayak #define OMAP4_PM_ALWON_SR_IVA_WKDEP_OFFSET 0x0030 192cdb54c44SPaul Walmsley #define OMAP4430_PM_ALWON_SR_IVA_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_INST, 0x0030) 1932339ea99SRajendra Nayak #define OMAP4_RM_ALWON_SR_IVA_CONTEXT_OFFSET 0x0034 194cdb54c44SPaul Walmsley #define OMAP4430_RM_ALWON_SR_IVA_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_INST, 0x0034) 1952339ea99SRajendra Nayak #define OMAP4_PM_ALWON_SR_CORE_WKDEP_OFFSET 0x0038 196cdb54c44SPaul Walmsley #define OMAP4430_PM_ALWON_SR_CORE_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_INST, 0x0038) 1972339ea99SRajendra Nayak #define OMAP4_RM_ALWON_SR_CORE_CONTEXT_OFFSET 0x003c 198cdb54c44SPaul Walmsley #define OMAP4430_RM_ALWON_SR_CORE_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_ALWAYS_ON_INST, 0x003c) 199c1294045SRajendra Nayak 200c1294045SRajendra Nayak /* PRM.CORE_PRM register offsets */ 2012339ea99SRajendra Nayak #define OMAP4_PM_CORE_PWRSTCTRL_OFFSET 0x0000 202cdb54c44SPaul Walmsley #define OMAP4430_PM_CORE_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0000) 2032339ea99SRajendra Nayak #define OMAP4_PM_CORE_PWRSTST_OFFSET 0x0004 204cdb54c44SPaul Walmsley #define OMAP4430_PM_CORE_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0004) 2052339ea99SRajendra Nayak #define OMAP4_RM_L3_1_L3_1_CONTEXT_OFFSET 0x0024 206cdb54c44SPaul Walmsley #define OMAP4430_RM_L3_1_L3_1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0024) 2072339ea99SRajendra Nayak #define OMAP4_RM_L3_2_L3_2_CONTEXT_OFFSET 0x0124 208cdb54c44SPaul Walmsley #define OMAP4430_RM_L3_2_L3_2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0124) 2092339ea99SRajendra Nayak #define OMAP4_RM_L3_2_GPMC_CONTEXT_OFFSET 0x012c 210cdb54c44SPaul Walmsley #define OMAP4430_RM_L3_2_GPMC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x012c) 2112339ea99SRajendra Nayak #define OMAP4_RM_L3_2_OCMC_RAM_CONTEXT_OFFSET 0x0134 212cdb54c44SPaul Walmsley #define OMAP4430_RM_L3_2_OCMC_RAM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0134) 2132339ea99SRajendra Nayak #define OMAP4_RM_DUCATI_RSTCTRL_OFFSET 0x0210 214cdb54c44SPaul Walmsley #define OMAP4430_RM_DUCATI_RSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0210) 2152339ea99SRajendra Nayak #define OMAP4_RM_DUCATI_RSTST_OFFSET 0x0214 216cdb54c44SPaul Walmsley #define OMAP4430_RM_DUCATI_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0214) 2172339ea99SRajendra Nayak #define OMAP4_RM_DUCATI_DUCATI_CONTEXT_OFFSET 0x0224 218cdb54c44SPaul Walmsley #define OMAP4430_RM_DUCATI_DUCATI_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0224) 2192339ea99SRajendra Nayak #define OMAP4_RM_SDMA_SDMA_CONTEXT_OFFSET 0x0324 220cdb54c44SPaul Walmsley #define OMAP4430_RM_SDMA_SDMA_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0324) 2212339ea99SRajendra Nayak #define OMAP4_RM_MEMIF_DMM_CONTEXT_OFFSET 0x0424 222cdb54c44SPaul Walmsley #define OMAP4430_RM_MEMIF_DMM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0424) 2232339ea99SRajendra Nayak #define OMAP4_RM_MEMIF_EMIF_FW_CONTEXT_OFFSET 0x042c 224cdb54c44SPaul Walmsley #define OMAP4430_RM_MEMIF_EMIF_FW_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x042c) 2252339ea99SRajendra Nayak #define OMAP4_RM_MEMIF_EMIF_1_CONTEXT_OFFSET 0x0434 226cdb54c44SPaul Walmsley #define OMAP4430_RM_MEMIF_EMIF_1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0434) 2272339ea99SRajendra Nayak #define OMAP4_RM_MEMIF_EMIF_2_CONTEXT_OFFSET 0x043c 228cdb54c44SPaul Walmsley #define OMAP4430_RM_MEMIF_EMIF_2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x043c) 2292339ea99SRajendra Nayak #define OMAP4_RM_MEMIF_DLL_CONTEXT_OFFSET 0x0444 230cdb54c44SPaul Walmsley #define OMAP4430_RM_MEMIF_DLL_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0444) 2312339ea99SRajendra Nayak #define OMAP4_RM_MEMIF_EMIF_H1_CONTEXT_OFFSET 0x0454 232cdb54c44SPaul Walmsley #define OMAP4430_RM_MEMIF_EMIF_H1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0454) 2332339ea99SRajendra Nayak #define OMAP4_RM_MEMIF_EMIF_H2_CONTEXT_OFFSET 0x045c 234cdb54c44SPaul Walmsley #define OMAP4430_RM_MEMIF_EMIF_H2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x045c) 2352339ea99SRajendra Nayak #define OMAP4_RM_MEMIF_DLL_H_CONTEXT_OFFSET 0x0464 236cdb54c44SPaul Walmsley #define OMAP4430_RM_MEMIF_DLL_H_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0464) 2372339ea99SRajendra Nayak #define OMAP4_RM_D2D_SAD2D_CONTEXT_OFFSET 0x0524 238cdb54c44SPaul Walmsley #define OMAP4430_RM_D2D_SAD2D_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0524) 239ad98a18bSBenoit Cousson #define OMAP4_RM_D2D_MODEM_ICR_CONTEXT_OFFSET 0x052c 240ad98a18bSBenoit Cousson #define OMAP4430_RM_D2D_MODEM_ICR_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x052c) 2412339ea99SRajendra Nayak #define OMAP4_RM_D2D_SAD2D_FW_CONTEXT_OFFSET 0x0534 242cdb54c44SPaul Walmsley #define OMAP4430_RM_D2D_SAD2D_FW_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0534) 2432339ea99SRajendra Nayak #define OMAP4_RM_L4CFG_L4_CFG_CONTEXT_OFFSET 0x0624 244cdb54c44SPaul Walmsley #define OMAP4430_RM_L4CFG_L4_CFG_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0624) 2452339ea99SRajendra Nayak #define OMAP4_RM_L4CFG_HW_SEM_CONTEXT_OFFSET 0x062c 246cdb54c44SPaul Walmsley #define OMAP4430_RM_L4CFG_HW_SEM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x062c) 2472339ea99SRajendra Nayak #define OMAP4_RM_L4CFG_MAILBOX_CONTEXT_OFFSET 0x0634 248cdb54c44SPaul Walmsley #define OMAP4430_RM_L4CFG_MAILBOX_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0634) 2492339ea99SRajendra Nayak #define OMAP4_RM_L4CFG_SAR_ROM_CONTEXT_OFFSET 0x063c 250cdb54c44SPaul Walmsley #define OMAP4430_RM_L4CFG_SAR_ROM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x063c) 2512339ea99SRajendra Nayak #define OMAP4_RM_L3INSTR_L3_3_CONTEXT_OFFSET 0x0724 252cdb54c44SPaul Walmsley #define OMAP4430_RM_L3INSTR_L3_3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0724) 2532339ea99SRajendra Nayak #define OMAP4_RM_L3INSTR_L3_INSTR_CONTEXT_OFFSET 0x072c 254cdb54c44SPaul Walmsley #define OMAP4430_RM_L3INSTR_L3_INSTR_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x072c) 2552339ea99SRajendra Nayak #define OMAP4_RM_L3INSTR_OCP_WP1_CONTEXT_OFFSET 0x0744 256cdb54c44SPaul Walmsley #define OMAP4430_RM_L3INSTR_OCP_WP1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0744) 257c1294045SRajendra Nayak 258c1294045SRajendra Nayak /* PRM.IVAHD_PRM register offsets */ 2592339ea99SRajendra Nayak #define OMAP4_PM_IVAHD_PWRSTCTRL_OFFSET 0x0000 260cdb54c44SPaul Walmsley #define OMAP4430_PM_IVAHD_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_INST, 0x0000) 2612339ea99SRajendra Nayak #define OMAP4_PM_IVAHD_PWRSTST_OFFSET 0x0004 262cdb54c44SPaul Walmsley #define OMAP4430_PM_IVAHD_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_INST, 0x0004) 2632339ea99SRajendra Nayak #define OMAP4_RM_IVAHD_RSTCTRL_OFFSET 0x0010 264cdb54c44SPaul Walmsley #define OMAP4430_RM_IVAHD_RSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_INST, 0x0010) 2652339ea99SRajendra Nayak #define OMAP4_RM_IVAHD_RSTST_OFFSET 0x0014 266cdb54c44SPaul Walmsley #define OMAP4430_RM_IVAHD_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_INST, 0x0014) 2672339ea99SRajendra Nayak #define OMAP4_RM_IVAHD_IVAHD_CONTEXT_OFFSET 0x0024 268cdb54c44SPaul Walmsley #define OMAP4430_RM_IVAHD_IVAHD_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_INST, 0x0024) 2692339ea99SRajendra Nayak #define OMAP4_RM_IVAHD_SL2_CONTEXT_OFFSET 0x002c 270cdb54c44SPaul Walmsley #define OMAP4430_RM_IVAHD_SL2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_IVAHD_INST, 0x002c) 271c1294045SRajendra Nayak 272c1294045SRajendra Nayak /* PRM.CAM_PRM register offsets */ 2732339ea99SRajendra Nayak #define OMAP4_PM_CAM_PWRSTCTRL_OFFSET 0x0000 274cdb54c44SPaul Walmsley #define OMAP4430_PM_CAM_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CAM_INST, 0x0000) 2752339ea99SRajendra Nayak #define OMAP4_PM_CAM_PWRSTST_OFFSET 0x0004 276cdb54c44SPaul Walmsley #define OMAP4430_PM_CAM_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CAM_INST, 0x0004) 2772339ea99SRajendra Nayak #define OMAP4_RM_CAM_ISS_CONTEXT_OFFSET 0x0024 278cdb54c44SPaul Walmsley #define OMAP4430_RM_CAM_ISS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CAM_INST, 0x0024) 2792339ea99SRajendra Nayak #define OMAP4_RM_CAM_FDIF_CONTEXT_OFFSET 0x002c 280cdb54c44SPaul Walmsley #define OMAP4430_RM_CAM_FDIF_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CAM_INST, 0x002c) 281c1294045SRajendra Nayak 282c1294045SRajendra Nayak /* PRM.DSS_PRM register offsets */ 2832339ea99SRajendra Nayak #define OMAP4_PM_DSS_PWRSTCTRL_OFFSET 0x0000 284cdb54c44SPaul Walmsley #define OMAP4430_PM_DSS_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DSS_INST, 0x0000) 2852339ea99SRajendra Nayak #define OMAP4_PM_DSS_PWRSTST_OFFSET 0x0004 286cdb54c44SPaul Walmsley #define OMAP4430_PM_DSS_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DSS_INST, 0x0004) 2872339ea99SRajendra Nayak #define OMAP4_PM_DSS_DSS_WKDEP_OFFSET 0x0020 288cdb54c44SPaul Walmsley #define OMAP4430_PM_DSS_DSS_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DSS_INST, 0x0020) 2892339ea99SRajendra Nayak #define OMAP4_RM_DSS_DSS_CONTEXT_OFFSET 0x0024 290cdb54c44SPaul Walmsley #define OMAP4430_RM_DSS_DSS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DSS_INST, 0x0024) 2912339ea99SRajendra Nayak #define OMAP4_RM_DSS_DEISS_CONTEXT_OFFSET 0x002c 292cdb54c44SPaul Walmsley #define OMAP4430_RM_DSS_DEISS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DSS_INST, 0x002c) 293c1294045SRajendra Nayak 294c1294045SRajendra Nayak /* PRM.GFX_PRM register offsets */ 2952339ea99SRajendra Nayak #define OMAP4_PM_GFX_PWRSTCTRL_OFFSET 0x0000 296cdb54c44SPaul Walmsley #define OMAP4430_PM_GFX_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_GFX_INST, 0x0000) 2972339ea99SRajendra Nayak #define OMAP4_PM_GFX_PWRSTST_OFFSET 0x0004 298cdb54c44SPaul Walmsley #define OMAP4430_PM_GFX_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_GFX_INST, 0x0004) 2992339ea99SRajendra Nayak #define OMAP4_RM_GFX_GFX_CONTEXT_OFFSET 0x0024 300cdb54c44SPaul Walmsley #define OMAP4430_RM_GFX_GFX_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_GFX_INST, 0x0024) 301c1294045SRajendra Nayak 302c1294045SRajendra Nayak /* PRM.L3INIT_PRM register offsets */ 3032339ea99SRajendra Nayak #define OMAP4_PM_L3INIT_PWRSTCTRL_OFFSET 0x0000 304cdb54c44SPaul Walmsley #define OMAP4430_PM_L3INIT_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0000) 3052339ea99SRajendra Nayak #define OMAP4_PM_L3INIT_PWRSTST_OFFSET 0x0004 306cdb54c44SPaul Walmsley #define OMAP4430_PM_L3INIT_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0004) 3072339ea99SRajendra Nayak #define OMAP4_PM_L3INIT_MMC1_WKDEP_OFFSET 0x0028 308cdb54c44SPaul Walmsley #define OMAP4430_PM_L3INIT_MMC1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0028) 3092339ea99SRajendra Nayak #define OMAP4_RM_L3INIT_MMC1_CONTEXT_OFFSET 0x002c 310cdb54c44SPaul Walmsley #define OMAP4430_RM_L3INIT_MMC1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x002c) 3112339ea99SRajendra Nayak #define OMAP4_PM_L3INIT_MMC2_WKDEP_OFFSET 0x0030 312cdb54c44SPaul Walmsley #define OMAP4430_PM_L3INIT_MMC2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0030) 3132339ea99SRajendra Nayak #define OMAP4_RM_L3INIT_MMC2_CONTEXT_OFFSET 0x0034 314cdb54c44SPaul Walmsley #define OMAP4430_RM_L3INIT_MMC2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0034) 3152339ea99SRajendra Nayak #define OMAP4_PM_L3INIT_HSI_WKDEP_OFFSET 0x0038 316cdb54c44SPaul Walmsley #define OMAP4430_PM_L3INIT_HSI_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0038) 3172339ea99SRajendra Nayak #define OMAP4_RM_L3INIT_HSI_CONTEXT_OFFSET 0x003c 318cdb54c44SPaul Walmsley #define OMAP4430_RM_L3INIT_HSI_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x003c) 3192339ea99SRajendra Nayak #define OMAP4_PM_L3INIT_UNIPRO1_WKDEP_OFFSET 0x0040 320cdb54c44SPaul Walmsley #define OMAP4430_PM_L3INIT_UNIPRO1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0040) 3212339ea99SRajendra Nayak #define OMAP4_RM_L3INIT_UNIPRO1_CONTEXT_OFFSET 0x0044 322cdb54c44SPaul Walmsley #define OMAP4430_RM_L3INIT_UNIPRO1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0044) 3232339ea99SRajendra Nayak #define OMAP4_PM_L3INIT_USB_HOST_WKDEP_OFFSET 0x0058 324cdb54c44SPaul Walmsley #define OMAP4430_PM_L3INIT_USB_HOST_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0058) 3252339ea99SRajendra Nayak #define OMAP4_RM_L3INIT_USB_HOST_CONTEXT_OFFSET 0x005c 326cdb54c44SPaul Walmsley #define OMAP4430_RM_L3INIT_USB_HOST_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x005c) 3272339ea99SRajendra Nayak #define OMAP4_PM_L3INIT_USB_OTG_WKDEP_OFFSET 0x0060 328cdb54c44SPaul Walmsley #define OMAP4430_PM_L3INIT_USB_OTG_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0060) 3292339ea99SRajendra Nayak #define OMAP4_RM_L3INIT_USB_OTG_CONTEXT_OFFSET 0x0064 330cdb54c44SPaul Walmsley #define OMAP4430_RM_L3INIT_USB_OTG_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0064) 3312339ea99SRajendra Nayak #define OMAP4_PM_L3INIT_USB_TLL_WKDEP_OFFSET 0x0068 332cdb54c44SPaul Walmsley #define OMAP4430_PM_L3INIT_USB_TLL_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0068) 3332339ea99SRajendra Nayak #define OMAP4_RM_L3INIT_USB_TLL_CONTEXT_OFFSET 0x006c 334cdb54c44SPaul Walmsley #define OMAP4430_RM_L3INIT_USB_TLL_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x006c) 3352339ea99SRajendra Nayak #define OMAP4_RM_L3INIT_P1500_CONTEXT_OFFSET 0x007c 336cdb54c44SPaul Walmsley #define OMAP4430_RM_L3INIT_P1500_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x007c) 3372339ea99SRajendra Nayak #define OMAP4_RM_L3INIT_EMAC_CONTEXT_OFFSET 0x0084 338cdb54c44SPaul Walmsley #define OMAP4430_RM_L3INIT_EMAC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0084) 3392339ea99SRajendra Nayak #define OMAP4_PM_L3INIT_SATA_WKDEP_OFFSET 0x0088 340cdb54c44SPaul Walmsley #define OMAP4430_PM_L3INIT_SATA_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0088) 3412339ea99SRajendra Nayak #define OMAP4_RM_L3INIT_SATA_CONTEXT_OFFSET 0x008c 342cdb54c44SPaul Walmsley #define OMAP4430_RM_L3INIT_SATA_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x008c) 3432339ea99SRajendra Nayak #define OMAP4_RM_L3INIT_TPPSS_CONTEXT_OFFSET 0x0094 344cdb54c44SPaul Walmsley #define OMAP4430_RM_L3INIT_TPPSS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0094) 3452339ea99SRajendra Nayak #define OMAP4_PM_L3INIT_PCIESS_WKDEP_OFFSET 0x0098 346cdb54c44SPaul Walmsley #define OMAP4430_PM_L3INIT_PCIESS_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x0098) 3472339ea99SRajendra Nayak #define OMAP4_RM_L3INIT_PCIESS_CONTEXT_OFFSET 0x009c 348cdb54c44SPaul Walmsley #define OMAP4430_RM_L3INIT_PCIESS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x009c) 3492339ea99SRajendra Nayak #define OMAP4_RM_L3INIT_CCPTX_CONTEXT_OFFSET 0x00ac 350cdb54c44SPaul Walmsley #define OMAP4430_RM_L3INIT_CCPTX_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00ac) 3512339ea99SRajendra Nayak #define OMAP4_PM_L3INIT_XHPI_WKDEP_OFFSET 0x00c0 352cdb54c44SPaul Walmsley #define OMAP4430_PM_L3INIT_XHPI_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00c0) 3532339ea99SRajendra Nayak #define OMAP4_RM_L3INIT_XHPI_CONTEXT_OFFSET 0x00c4 354cdb54c44SPaul Walmsley #define OMAP4430_RM_L3INIT_XHPI_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00c4) 3552339ea99SRajendra Nayak #define OMAP4_PM_L3INIT_MMC6_WKDEP_OFFSET 0x00c8 356cdb54c44SPaul Walmsley #define OMAP4430_PM_L3INIT_MMC6_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00c8) 3572339ea99SRajendra Nayak #define OMAP4_RM_L3INIT_MMC6_CONTEXT_OFFSET 0x00cc 358cdb54c44SPaul Walmsley #define OMAP4430_RM_L3INIT_MMC6_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00cc) 3592339ea99SRajendra Nayak #define OMAP4_PM_L3INIT_USB_HOST_FS_WKDEP_OFFSET 0x00d0 360cdb54c44SPaul Walmsley #define OMAP4430_PM_L3INIT_USB_HOST_FS_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00d0) 3612339ea99SRajendra Nayak #define OMAP4_RM_L3INIT_USB_HOST_FS_CONTEXT_OFFSET 0x00d4 362cdb54c44SPaul Walmsley #define OMAP4430_RM_L3INIT_USB_HOST_FS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00d4) 3632339ea99SRajendra Nayak #define OMAP4_RM_L3INIT_USBPHYOCP2SCP_CONTEXT_OFFSET 0x00e4 364cdb54c44SPaul Walmsley #define OMAP4430_RM_L3INIT_USBPHYOCP2SCP_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L3INIT_INST, 0x00e4) 365c1294045SRajendra Nayak 366c1294045SRajendra Nayak /* PRM.L4PER_PRM register offsets */ 3672339ea99SRajendra Nayak #define OMAP4_PM_L4PER_PWRSTCTRL_OFFSET 0x0000 368cdb54c44SPaul Walmsley #define OMAP4430_PM_L4PER_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0000) 3692339ea99SRajendra Nayak #define OMAP4_PM_L4PER_PWRSTST_OFFSET 0x0004 370cdb54c44SPaul Walmsley #define OMAP4430_PM_L4PER_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0004) 3712339ea99SRajendra Nayak #define OMAP4_RM_L4PER_ADC_CONTEXT_OFFSET 0x0024 372cdb54c44SPaul Walmsley #define OMAP4430_RM_L4PER_ADC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0024) 3732339ea99SRajendra Nayak #define OMAP4_PM_L4PER_DMTIMER10_WKDEP_OFFSET 0x0028 374cdb54c44SPaul Walmsley #define OMAP4430_PM_L4PER_DMTIMER10_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0028) 3752339ea99SRajendra Nayak #define OMAP4_RM_L4PER_DMTIMER10_CONTEXT_OFFSET 0x002c 376cdb54c44SPaul Walmsley #define OMAP4430_RM_L4PER_DMTIMER10_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x002c) 3772339ea99SRajendra Nayak #define OMAP4_PM_L4PER_DMTIMER11_WKDEP_OFFSET 0x0030 378cdb54c44SPaul Walmsley #define OMAP4430_PM_L4PER_DMTIMER11_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0030) 3792339ea99SRajendra Nayak #define OMAP4_RM_L4PER_DMTIMER11_CONTEXT_OFFSET 0x0034 380cdb54c44SPaul Walmsley #define OMAP4430_RM_L4PER_DMTIMER11_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0034) 3812339ea99SRajendra Nayak #define OMAP4_PM_L4PER_DMTIMER2_WKDEP_OFFSET 0x0038 382cdb54c44SPaul Walmsley #define OMAP4430_PM_L4PER_DMTIMER2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0038) 3832339ea99SRajendra Nayak #define OMAP4_RM_L4PER_DMTIMER2_CONTEXT_OFFSET 0x003c 384cdb54c44SPaul Walmsley #define OMAP4430_RM_L4PER_DMTIMER2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x003c) 3852339ea99SRajendra Nayak #define OMAP4_PM_L4PER_DMTIMER3_WKDEP_OFFSET 0x0040 386cdb54c44SPaul Walmsley #define OMAP4430_PM_L4PER_DMTIMER3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0040) 3872339ea99SRajendra Nayak #define OMAP4_RM_L4PER_DMTIMER3_CONTEXT_OFFSET 0x0044 388cdb54c44SPaul Walmsley #define OMAP4430_RM_L4PER_DMTIMER3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0044) 3892339ea99SRajendra Nayak #define OMAP4_PM_L4PER_DMTIMER4_WKDEP_OFFSET 0x0048 390cdb54c44SPaul Walmsley #define OMAP4430_PM_L4PER_DMTIMER4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0048) 3912339ea99SRajendra Nayak #define OMAP4_RM_L4PER_DMTIMER4_CONTEXT_OFFSET 0x004c 392cdb54c44SPaul Walmsley #define OMAP4430_RM_L4PER_DMTIMER4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x004c) 3932339ea99SRajendra Nayak #define OMAP4_PM_L4PER_DMTIMER9_WKDEP_OFFSET 0x0050 394cdb54c44SPaul Walmsley #define OMAP4430_PM_L4PER_DMTIMER9_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0050) 3952339ea99SRajendra Nayak #define OMAP4_RM_L4PER_DMTIMER9_CONTEXT_OFFSET 0x0054 396cdb54c44SPaul Walmsley #define OMAP4430_RM_L4PER_DMTIMER9_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0054) 3972339ea99SRajendra Nayak #define OMAP4_RM_L4PER_ELM_CONTEXT_OFFSET 0x005c 398cdb54c44SPaul Walmsley #define OMAP4430_RM_L4PER_ELM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x005c) 3992339ea99SRajendra Nayak #define OMAP4_PM_L4PER_GPIO2_WKDEP_OFFSET 0x0060 400cdb54c44SPaul Walmsley #define OMAP4430_PM_L4PER_GPIO2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0060) 4012339ea99SRajendra Nayak #define OMAP4_RM_L4PER_GPIO2_CONTEXT_OFFSET 0x0064 402cdb54c44SPaul Walmsley #define OMAP4430_RM_L4PER_GPIO2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0064) 4032339ea99SRajendra Nayak #define OMAP4_PM_L4PER_GPIO3_WKDEP_OFFSET 0x0068 404cdb54c44SPaul Walmsley #define OMAP4430_PM_L4PER_GPIO3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0068) 4052339ea99SRajendra Nayak #define OMAP4_RM_L4PER_GPIO3_CONTEXT_OFFSET 0x006c 406cdb54c44SPaul Walmsley #define OMAP4430_RM_L4PER_GPIO3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x006c) 4072339ea99SRajendra Nayak #define OMAP4_PM_L4PER_GPIO4_WKDEP_OFFSET 0x0070 408cdb54c44SPaul Walmsley #define OMAP4430_PM_L4PER_GPIO4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0070) 4092339ea99SRajendra Nayak #define OMAP4_RM_L4PER_GPIO4_CONTEXT_OFFSET 0x0074 410cdb54c44SPaul Walmsley #define OMAP4430_RM_L4PER_GPIO4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0074) 4112339ea99SRajendra Nayak #define OMAP4_PM_L4PER_GPIO5_WKDEP_OFFSET 0x0078 412cdb54c44SPaul Walmsley #define OMAP4430_PM_L4PER_GPIO5_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0078) 4132339ea99SRajendra Nayak #define OMAP4_RM_L4PER_GPIO5_CONTEXT_OFFSET 0x007c 414cdb54c44SPaul Walmsley #define OMAP4430_RM_L4PER_GPIO5_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x007c) 4152339ea99SRajendra Nayak #define OMAP4_PM_L4PER_GPIO6_WKDEP_OFFSET 0x0080 416cdb54c44SPaul Walmsley #define OMAP4430_PM_L4PER_GPIO6_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0080) 4172339ea99SRajendra Nayak #define OMAP4_RM_L4PER_GPIO6_CONTEXT_OFFSET 0x0084 418cdb54c44SPaul Walmsley #define OMAP4430_RM_L4PER_GPIO6_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0084) 4192339ea99SRajendra Nayak #define OMAP4_RM_L4PER_HDQ1W_CONTEXT_OFFSET 0x008c 420cdb54c44SPaul Walmsley #define OMAP4430_RM_L4PER_HDQ1W_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x008c) 4212339ea99SRajendra Nayak #define OMAP4_PM_L4PER_HECC1_WKDEP_OFFSET 0x0090 422cdb54c44SPaul Walmsley #define OMAP4430_PM_L4PER_HECC1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0090) 4232339ea99SRajendra Nayak #define OMAP4_RM_L4PER_HECC1_CONTEXT_OFFSET 0x0094 424cdb54c44SPaul Walmsley #define OMAP4430_RM_L4PER_HECC1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0094) 4252339ea99SRajendra Nayak #define OMAP4_PM_L4PER_HECC2_WKDEP_OFFSET 0x0098 426cdb54c44SPaul Walmsley #define OMAP4430_PM_L4PER_HECC2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0098) 4272339ea99SRajendra Nayak #define OMAP4_RM_L4PER_HECC2_CONTEXT_OFFSET 0x009c 428cdb54c44SPaul Walmsley #define OMAP4430_RM_L4PER_HECC2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x009c) 4292339ea99SRajendra Nayak #define OMAP4_PM_L4PER_I2C1_WKDEP_OFFSET 0x00a0 430cdb54c44SPaul Walmsley #define OMAP4430_PM_L4PER_I2C1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00a0) 4312339ea99SRajendra Nayak #define OMAP4_RM_L4PER_I2C1_CONTEXT_OFFSET 0x00a4 432cdb54c44SPaul Walmsley #define OMAP4430_RM_L4PER_I2C1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00a4) 4332339ea99SRajendra Nayak #define OMAP4_PM_L4PER_I2C2_WKDEP_OFFSET 0x00a8 434cdb54c44SPaul Walmsley #define OMAP4430_PM_L4PER_I2C2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00a8) 4352339ea99SRajendra Nayak #define OMAP4_RM_L4PER_I2C2_CONTEXT_OFFSET 0x00ac 436cdb54c44SPaul Walmsley #define OMAP4430_RM_L4PER_I2C2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00ac) 4372339ea99SRajendra Nayak #define OMAP4_PM_L4PER_I2C3_WKDEP_OFFSET 0x00b0 438cdb54c44SPaul Walmsley #define OMAP4430_PM_L4PER_I2C3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00b0) 4392339ea99SRajendra Nayak #define OMAP4_RM_L4PER_I2C3_CONTEXT_OFFSET 0x00b4 440cdb54c44SPaul Walmsley #define OMAP4430_RM_L4PER_I2C3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00b4) 4412339ea99SRajendra Nayak #define OMAP4_PM_L4PER_I2C4_WKDEP_OFFSET 0x00b8 442cdb54c44SPaul Walmsley #define OMAP4430_PM_L4PER_I2C4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00b8) 4432339ea99SRajendra Nayak #define OMAP4_RM_L4PER_I2C4_CONTEXT_OFFSET 0x00bc 444cdb54c44SPaul Walmsley #define OMAP4430_RM_L4PER_I2C4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00bc) 4452339ea99SRajendra Nayak #define OMAP4_RM_L4PER_L4_PER_CONTEXT_OFFSET 0x00c0 446cdb54c44SPaul Walmsley #define OMAP4430_RM_L4PER_L4_PER_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00c0) 4472339ea99SRajendra Nayak #define OMAP4_PM_L4PER_MCASP2_WKDEP_OFFSET 0x00d0 448cdb54c44SPaul Walmsley #define OMAP4430_PM_L4PER_MCASP2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00d0) 4492339ea99SRajendra Nayak #define OMAP4_RM_L4PER_MCASP2_CONTEXT_OFFSET 0x00d4 450cdb54c44SPaul Walmsley #define OMAP4430_RM_L4PER_MCASP2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00d4) 4512339ea99SRajendra Nayak #define OMAP4_PM_L4PER_MCASP3_WKDEP_OFFSET 0x00d8 452cdb54c44SPaul Walmsley #define OMAP4430_PM_L4PER_MCASP3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00d8) 4532339ea99SRajendra Nayak #define OMAP4_RM_L4PER_MCASP3_CONTEXT_OFFSET 0x00dc 454cdb54c44SPaul Walmsley #define OMAP4430_RM_L4PER_MCASP3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00dc) 4552339ea99SRajendra Nayak #define OMAP4_PM_L4PER_MCBSP4_WKDEP_OFFSET 0x00e0 456cdb54c44SPaul Walmsley #define OMAP4430_PM_L4PER_MCBSP4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00e0) 4572339ea99SRajendra Nayak #define OMAP4_RM_L4PER_MCBSP4_CONTEXT_OFFSET 0x00e4 458cdb54c44SPaul Walmsley #define OMAP4430_RM_L4PER_MCBSP4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00e4) 4592339ea99SRajendra Nayak #define OMAP4_RM_L4PER_MGATE_CONTEXT_OFFSET 0x00ec 460cdb54c44SPaul Walmsley #define OMAP4430_RM_L4PER_MGATE_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00ec) 4612339ea99SRajendra Nayak #define OMAP4_PM_L4PER_MCSPI1_WKDEP_OFFSET 0x00f0 462cdb54c44SPaul Walmsley #define OMAP4430_PM_L4PER_MCSPI1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00f0) 4632339ea99SRajendra Nayak #define OMAP4_RM_L4PER_MCSPI1_CONTEXT_OFFSET 0x00f4 464cdb54c44SPaul Walmsley #define OMAP4430_RM_L4PER_MCSPI1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00f4) 4652339ea99SRajendra Nayak #define OMAP4_PM_L4PER_MCSPI2_WKDEP_OFFSET 0x00f8 466cdb54c44SPaul Walmsley #define OMAP4430_PM_L4PER_MCSPI2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00f8) 4672339ea99SRajendra Nayak #define OMAP4_RM_L4PER_MCSPI2_CONTEXT_OFFSET 0x00fc 468cdb54c44SPaul Walmsley #define OMAP4430_RM_L4PER_MCSPI2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x00fc) 4692339ea99SRajendra Nayak #define OMAP4_PM_L4PER_MCSPI3_WKDEP_OFFSET 0x0100 470cdb54c44SPaul Walmsley #define OMAP4430_PM_L4PER_MCSPI3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0100) 4712339ea99SRajendra Nayak #define OMAP4_RM_L4PER_MCSPI3_CONTEXT_OFFSET 0x0104 472cdb54c44SPaul Walmsley #define OMAP4430_RM_L4PER_MCSPI3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0104) 4732339ea99SRajendra Nayak #define OMAP4_PM_L4PER_MCSPI4_WKDEP_OFFSET 0x0108 474cdb54c44SPaul Walmsley #define OMAP4430_PM_L4PER_MCSPI4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0108) 4752339ea99SRajendra Nayak #define OMAP4_RM_L4PER_MCSPI4_CONTEXT_OFFSET 0x010c 476cdb54c44SPaul Walmsley #define OMAP4430_RM_L4PER_MCSPI4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x010c) 4772339ea99SRajendra Nayak #define OMAP4_PM_L4PER_MMCSD3_WKDEP_OFFSET 0x0120 478cdb54c44SPaul Walmsley #define OMAP4430_PM_L4PER_MMCSD3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0120) 4792339ea99SRajendra Nayak #define OMAP4_RM_L4PER_MMCSD3_CONTEXT_OFFSET 0x0124 480cdb54c44SPaul Walmsley #define OMAP4430_RM_L4PER_MMCSD3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0124) 4812339ea99SRajendra Nayak #define OMAP4_PM_L4PER_MMCSD4_WKDEP_OFFSET 0x0128 482cdb54c44SPaul Walmsley #define OMAP4430_PM_L4PER_MMCSD4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0128) 4832339ea99SRajendra Nayak #define OMAP4_RM_L4PER_MMCSD4_CONTEXT_OFFSET 0x012c 484cdb54c44SPaul Walmsley #define OMAP4430_RM_L4PER_MMCSD4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x012c) 4852339ea99SRajendra Nayak #define OMAP4_RM_L4PER_MSPROHG_CONTEXT_OFFSET 0x0134 486cdb54c44SPaul Walmsley #define OMAP4430_RM_L4PER_MSPROHG_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0134) 4872339ea99SRajendra Nayak #define OMAP4_PM_L4PER_SLIMBUS2_WKDEP_OFFSET 0x0138 488cdb54c44SPaul Walmsley #define OMAP4430_PM_L4PER_SLIMBUS2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0138) 4892339ea99SRajendra Nayak #define OMAP4_RM_L4PER_SLIMBUS2_CONTEXT_OFFSET 0x013c 490cdb54c44SPaul Walmsley #define OMAP4430_RM_L4PER_SLIMBUS2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x013c) 4912339ea99SRajendra Nayak #define OMAP4_PM_L4PER_UART1_WKDEP_OFFSET 0x0140 492cdb54c44SPaul Walmsley #define OMAP4430_PM_L4PER_UART1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0140) 4932339ea99SRajendra Nayak #define OMAP4_RM_L4PER_UART1_CONTEXT_OFFSET 0x0144 494cdb54c44SPaul Walmsley #define OMAP4430_RM_L4PER_UART1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0144) 4952339ea99SRajendra Nayak #define OMAP4_PM_L4PER_UART2_WKDEP_OFFSET 0x0148 496cdb54c44SPaul Walmsley #define OMAP4430_PM_L4PER_UART2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0148) 4972339ea99SRajendra Nayak #define OMAP4_RM_L4PER_UART2_CONTEXT_OFFSET 0x014c 498cdb54c44SPaul Walmsley #define OMAP4430_RM_L4PER_UART2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x014c) 4992339ea99SRajendra Nayak #define OMAP4_PM_L4PER_UART3_WKDEP_OFFSET 0x0150 500cdb54c44SPaul Walmsley #define OMAP4430_PM_L4PER_UART3_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0150) 5012339ea99SRajendra Nayak #define OMAP4_RM_L4PER_UART3_CONTEXT_OFFSET 0x0154 502cdb54c44SPaul Walmsley #define OMAP4430_RM_L4PER_UART3_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0154) 5032339ea99SRajendra Nayak #define OMAP4_PM_L4PER_UART4_WKDEP_OFFSET 0x0158 504cdb54c44SPaul Walmsley #define OMAP4430_PM_L4PER_UART4_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0158) 5052339ea99SRajendra Nayak #define OMAP4_RM_L4PER_UART4_CONTEXT_OFFSET 0x015c 506cdb54c44SPaul Walmsley #define OMAP4430_RM_L4PER_UART4_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x015c) 5072339ea99SRajendra Nayak #define OMAP4_PM_L4PER_MMCSD5_WKDEP_OFFSET 0x0160 508cdb54c44SPaul Walmsley #define OMAP4430_PM_L4PER_MMCSD5_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0160) 5092339ea99SRajendra Nayak #define OMAP4_RM_L4PER_MMCSD5_CONTEXT_OFFSET 0x0164 510cdb54c44SPaul Walmsley #define OMAP4430_RM_L4PER_MMCSD5_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0164) 5112339ea99SRajendra Nayak #define OMAP4_PM_L4PER_I2C5_WKDEP_OFFSET 0x0168 512cdb54c44SPaul Walmsley #define OMAP4430_PM_L4PER_I2C5_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x0168) 5132339ea99SRajendra Nayak #define OMAP4_RM_L4PER_I2C5_CONTEXT_OFFSET 0x016c 514cdb54c44SPaul Walmsley #define OMAP4430_RM_L4PER_I2C5_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x016c) 5152339ea99SRajendra Nayak #define OMAP4_RM_L4SEC_AES1_CONTEXT_OFFSET 0x01a4 516cdb54c44SPaul Walmsley #define OMAP4430_RM_L4SEC_AES1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x01a4) 5172339ea99SRajendra Nayak #define OMAP4_RM_L4SEC_AES2_CONTEXT_OFFSET 0x01ac 518cdb54c44SPaul Walmsley #define OMAP4430_RM_L4SEC_AES2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x01ac) 5192339ea99SRajendra Nayak #define OMAP4_RM_L4SEC_DES3DES_CONTEXT_OFFSET 0x01b4 520cdb54c44SPaul Walmsley #define OMAP4430_RM_L4SEC_DES3DES_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x01b4) 5212339ea99SRajendra Nayak #define OMAP4_RM_L4SEC_PKAEIP29_CONTEXT_OFFSET 0x01bc 522cdb54c44SPaul Walmsley #define OMAP4430_RM_L4SEC_PKAEIP29_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x01bc) 5232339ea99SRajendra Nayak #define OMAP4_RM_L4SEC_RNG_CONTEXT_OFFSET 0x01c4 524cdb54c44SPaul Walmsley #define OMAP4430_RM_L4SEC_RNG_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x01c4) 5252339ea99SRajendra Nayak #define OMAP4_RM_L4SEC_SHA2MD51_CONTEXT_OFFSET 0x01cc 526cdb54c44SPaul Walmsley #define OMAP4430_RM_L4SEC_SHA2MD51_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x01cc) 5272339ea99SRajendra Nayak #define OMAP4_RM_L4SEC_CRYPTODMA_CONTEXT_OFFSET 0x01dc 528cdb54c44SPaul Walmsley #define OMAP4430_RM_L4SEC_CRYPTODMA_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_L4PER_INST, 0x01dc) 529c1294045SRajendra Nayak 530c1294045SRajendra Nayak /* PRM.CEFUSE_PRM register offsets */ 5312339ea99SRajendra Nayak #define OMAP4_PM_CEFUSE_PWRSTCTRL_OFFSET 0x0000 532cdb54c44SPaul Walmsley #define OMAP4430_PM_CEFUSE_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CEFUSE_INST, 0x0000) 5332339ea99SRajendra Nayak #define OMAP4_PM_CEFUSE_PWRSTST_OFFSET 0x0004 534cdb54c44SPaul Walmsley #define OMAP4430_PM_CEFUSE_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CEFUSE_INST, 0x0004) 5352339ea99SRajendra Nayak #define OMAP4_RM_CEFUSE_CEFUSE_CONTEXT_OFFSET 0x0024 536cdb54c44SPaul Walmsley #define OMAP4430_RM_CEFUSE_CEFUSE_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CEFUSE_INST, 0x0024) 537c1294045SRajendra Nayak 538c1294045SRajendra Nayak /* PRM.WKUP_PRM register offsets */ 5392339ea99SRajendra Nayak #define OMAP4_RM_WKUP_L4WKUP_CONTEXT_OFFSET 0x0024 540cdb54c44SPaul Walmsley #define OMAP4430_RM_WKUP_L4WKUP_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0024) 5412339ea99SRajendra Nayak #define OMAP4_RM_WKUP_WDT1_CONTEXT_OFFSET 0x002c 542cdb54c44SPaul Walmsley #define OMAP4430_RM_WKUP_WDT1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x002c) 5432339ea99SRajendra Nayak #define OMAP4_PM_WKUP_WDT2_WKDEP_OFFSET 0x0030 544cdb54c44SPaul Walmsley #define OMAP4430_PM_WKUP_WDT2_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0030) 5452339ea99SRajendra Nayak #define OMAP4_RM_WKUP_WDT2_CONTEXT_OFFSET 0x0034 546cdb54c44SPaul Walmsley #define OMAP4430_RM_WKUP_WDT2_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0034) 5472339ea99SRajendra Nayak #define OMAP4_PM_WKUP_GPIO1_WKDEP_OFFSET 0x0038 548cdb54c44SPaul Walmsley #define OMAP4430_PM_WKUP_GPIO1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0038) 5492339ea99SRajendra Nayak #define OMAP4_RM_WKUP_GPIO1_CONTEXT_OFFSET 0x003c 550cdb54c44SPaul Walmsley #define OMAP4430_RM_WKUP_GPIO1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x003c) 5512339ea99SRajendra Nayak #define OMAP4_PM_WKUP_TIMER1_WKDEP_OFFSET 0x0040 552cdb54c44SPaul Walmsley #define OMAP4430_PM_WKUP_TIMER1_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0040) 5532339ea99SRajendra Nayak #define OMAP4_RM_WKUP_TIMER1_CONTEXT_OFFSET 0x0044 554cdb54c44SPaul Walmsley #define OMAP4430_RM_WKUP_TIMER1_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0044) 5552339ea99SRajendra Nayak #define OMAP4_PM_WKUP_TIMER12_WKDEP_OFFSET 0x0048 556cdb54c44SPaul Walmsley #define OMAP4430_PM_WKUP_TIMER12_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0048) 5572339ea99SRajendra Nayak #define OMAP4_RM_WKUP_TIMER12_CONTEXT_OFFSET 0x004c 558cdb54c44SPaul Walmsley #define OMAP4430_RM_WKUP_TIMER12_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x004c) 5592339ea99SRajendra Nayak #define OMAP4_RM_WKUP_SYNCTIMER_CONTEXT_OFFSET 0x0054 560cdb54c44SPaul Walmsley #define OMAP4430_RM_WKUP_SYNCTIMER_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0054) 5612339ea99SRajendra Nayak #define OMAP4_PM_WKUP_USIM_WKDEP_OFFSET 0x0058 562cdb54c44SPaul Walmsley #define OMAP4430_PM_WKUP_USIM_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0058) 5632339ea99SRajendra Nayak #define OMAP4_RM_WKUP_USIM_CONTEXT_OFFSET 0x005c 564cdb54c44SPaul Walmsley #define OMAP4430_RM_WKUP_USIM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x005c) 5652339ea99SRajendra Nayak #define OMAP4_RM_WKUP_SARRAM_CONTEXT_OFFSET 0x0064 566cdb54c44SPaul Walmsley #define OMAP4430_RM_WKUP_SARRAM_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0064) 5672339ea99SRajendra Nayak #define OMAP4_PM_WKUP_KEYBOARD_WKDEP_OFFSET 0x0078 568cdb54c44SPaul Walmsley #define OMAP4430_PM_WKUP_KEYBOARD_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0078) 5692339ea99SRajendra Nayak #define OMAP4_RM_WKUP_KEYBOARD_CONTEXT_OFFSET 0x007c 570cdb54c44SPaul Walmsley #define OMAP4430_RM_WKUP_KEYBOARD_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x007c) 5712339ea99SRajendra Nayak #define OMAP4_PM_WKUP_RTC_WKDEP_OFFSET 0x0080 572cdb54c44SPaul Walmsley #define OMAP4430_PM_WKUP_RTC_WKDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0080) 5732339ea99SRajendra Nayak #define OMAP4_RM_WKUP_RTC_CONTEXT_OFFSET 0x0084 574cdb54c44SPaul Walmsley #define OMAP4430_RM_WKUP_RTC_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_INST, 0x0084) 575c1294045SRajendra Nayak 576c1294045SRajendra Nayak /* PRM.WKUP_CM register offsets */ 5772339ea99SRajendra Nayak #define OMAP4_CM_WKUP_CLKSTCTRL_OFFSET 0x0000 578cdb54c44SPaul Walmsley #define OMAP4430_CM_WKUP_CLKSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0000) 5792339ea99SRajendra Nayak #define OMAP4_CM_WKUP_L4WKUP_CLKCTRL_OFFSET 0x0020 580cdb54c44SPaul Walmsley #define OMAP4430_CM_WKUP_L4WKUP_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0020) 5812339ea99SRajendra Nayak #define OMAP4_CM_WKUP_WDT1_CLKCTRL_OFFSET 0x0028 582cdb54c44SPaul Walmsley #define OMAP4430_CM_WKUP_WDT1_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0028) 5832339ea99SRajendra Nayak #define OMAP4_CM_WKUP_WDT2_CLKCTRL_OFFSET 0x0030 584cdb54c44SPaul Walmsley #define OMAP4430_CM_WKUP_WDT2_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0030) 5852339ea99SRajendra Nayak #define OMAP4_CM_WKUP_GPIO1_CLKCTRL_OFFSET 0x0038 586cdb54c44SPaul Walmsley #define OMAP4430_CM_WKUP_GPIO1_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0038) 5872339ea99SRajendra Nayak #define OMAP4_CM_WKUP_TIMER1_CLKCTRL_OFFSET 0x0040 588cdb54c44SPaul Walmsley #define OMAP4430_CM_WKUP_TIMER1_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0040) 5892339ea99SRajendra Nayak #define OMAP4_CM_WKUP_TIMER12_CLKCTRL_OFFSET 0x0048 590cdb54c44SPaul Walmsley #define OMAP4430_CM_WKUP_TIMER12_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0048) 5912339ea99SRajendra Nayak #define OMAP4_CM_WKUP_SYNCTIMER_CLKCTRL_OFFSET 0x0050 592cdb54c44SPaul Walmsley #define OMAP4430_CM_WKUP_SYNCTIMER_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0050) 5932339ea99SRajendra Nayak #define OMAP4_CM_WKUP_USIM_CLKCTRL_OFFSET 0x0058 594cdb54c44SPaul Walmsley #define OMAP4430_CM_WKUP_USIM_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0058) 5952339ea99SRajendra Nayak #define OMAP4_CM_WKUP_SARRAM_CLKCTRL_OFFSET 0x0060 596cdb54c44SPaul Walmsley #define OMAP4430_CM_WKUP_SARRAM_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0060) 5972339ea99SRajendra Nayak #define OMAP4_CM_WKUP_KEYBOARD_CLKCTRL_OFFSET 0x0078 598cdb54c44SPaul Walmsley #define OMAP4430_CM_WKUP_KEYBOARD_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0078) 5992339ea99SRajendra Nayak #define OMAP4_CM_WKUP_RTC_CLKCTRL_OFFSET 0x0080 600cdb54c44SPaul Walmsley #define OMAP4430_CM_WKUP_RTC_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0080) 6012339ea99SRajendra Nayak #define OMAP4_CM_WKUP_BANDGAP_CLKCTRL_OFFSET 0x0088 602cdb54c44SPaul Walmsley #define OMAP4430_CM_WKUP_BANDGAP_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_WKUP_CM_INST, 0x0088) 603c1294045SRajendra Nayak 604c1294045SRajendra Nayak /* PRM.EMU_PRM register offsets */ 6052339ea99SRajendra Nayak #define OMAP4_PM_EMU_PWRSTCTRL_OFFSET 0x0000 606cdb54c44SPaul Walmsley #define OMAP4430_PM_EMU_PWRSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_INST, 0x0000) 6072339ea99SRajendra Nayak #define OMAP4_PM_EMU_PWRSTST_OFFSET 0x0004 608cdb54c44SPaul Walmsley #define OMAP4430_PM_EMU_PWRSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_INST, 0x0004) 6092339ea99SRajendra Nayak #define OMAP4_RM_EMU_DEBUGSS_CONTEXT_OFFSET 0x0024 610cdb54c44SPaul Walmsley #define OMAP4430_RM_EMU_DEBUGSS_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_INST, 0x0024) 611c1294045SRajendra Nayak 612c1294045SRajendra Nayak /* PRM.EMU_CM register offsets */ 6132339ea99SRajendra Nayak #define OMAP4_CM_EMU_CLKSTCTRL_OFFSET 0x0000 614cdb54c44SPaul Walmsley #define OMAP4430_CM_EMU_CLKSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_CM_INST, 0x0000) 6152339ea99SRajendra Nayak #define OMAP4_CM_EMU_DYNAMICDEP_OFFSET 0x0008 616cdb54c44SPaul Walmsley #define OMAP4430_CM_EMU_DYNAMICDEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_CM_INST, 0x0008) 6172339ea99SRajendra Nayak #define OMAP4_CM_EMU_DEBUGSS_CLKCTRL_OFFSET 0x0020 618cdb54c44SPaul Walmsley #define OMAP4430_CM_EMU_DEBUGSS_CLKCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_EMU_CM_INST, 0x0020) 619c1294045SRajendra Nayak 620c1294045SRajendra Nayak /* PRM.DEVICE_PRM register offsets */ 6212339ea99SRajendra Nayak #define OMAP4_PRM_RSTCTRL_OFFSET 0x0000 622cdb54c44SPaul Walmsley #define OMAP4430_PRM_RSTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0000) 6232339ea99SRajendra Nayak #define OMAP4_PRM_RSTST_OFFSET 0x0004 624cdb54c44SPaul Walmsley #define OMAP4430_PRM_RSTST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0004) 6252339ea99SRajendra Nayak #define OMAP4_PRM_RSTTIME_OFFSET 0x0008 626cdb54c44SPaul Walmsley #define OMAP4430_PRM_RSTTIME OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0008) 6272339ea99SRajendra Nayak #define OMAP4_PRM_CLKREQCTRL_OFFSET 0x000c 628cdb54c44SPaul Walmsley #define OMAP4430_PRM_CLKREQCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x000c) 6292339ea99SRajendra Nayak #define OMAP4_PRM_VOLTCTRL_OFFSET 0x0010 630cdb54c44SPaul Walmsley #define OMAP4430_PRM_VOLTCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0010) 6312339ea99SRajendra Nayak #define OMAP4_PRM_PWRREQCTRL_OFFSET 0x0014 632cdb54c44SPaul Walmsley #define OMAP4430_PRM_PWRREQCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0014) 6332339ea99SRajendra Nayak #define OMAP4_PRM_PSCON_COUNT_OFFSET 0x0018 634cdb54c44SPaul Walmsley #define OMAP4430_PRM_PSCON_COUNT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0018) 6352339ea99SRajendra Nayak #define OMAP4_PRM_IO_COUNT_OFFSET 0x001c 636cdb54c44SPaul Walmsley #define OMAP4430_PRM_IO_COUNT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x001c) 6372339ea99SRajendra Nayak #define OMAP4_PRM_IO_PMCTRL_OFFSET 0x0020 638cdb54c44SPaul Walmsley #define OMAP4430_PRM_IO_PMCTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0020) 6392339ea99SRajendra Nayak #define OMAP4_PRM_VOLTSETUP_WARMRESET_OFFSET 0x0024 640cdb54c44SPaul Walmsley #define OMAP4430_PRM_VOLTSETUP_WARMRESET OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0024) 6412339ea99SRajendra Nayak #define OMAP4_PRM_VOLTSETUP_CORE_OFF_OFFSET 0x0028 642cdb54c44SPaul Walmsley #define OMAP4430_PRM_VOLTSETUP_CORE_OFF OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0028) 6432339ea99SRajendra Nayak #define OMAP4_PRM_VOLTSETUP_MPU_OFF_OFFSET 0x002c 644cdb54c44SPaul Walmsley #define OMAP4430_PRM_VOLTSETUP_MPU_OFF OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x002c) 6452339ea99SRajendra Nayak #define OMAP4_PRM_VOLTSETUP_IVA_OFF_OFFSET 0x0030 646cdb54c44SPaul Walmsley #define OMAP4430_PRM_VOLTSETUP_IVA_OFF OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0030) 6472339ea99SRajendra Nayak #define OMAP4_PRM_VOLTSETUP_CORE_RET_SLEEP_OFFSET 0x0034 648cdb54c44SPaul Walmsley #define OMAP4430_PRM_VOLTSETUP_CORE_RET_SLEEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0034) 6492339ea99SRajendra Nayak #define OMAP4_PRM_VOLTSETUP_MPU_RET_SLEEP_OFFSET 0x0038 650cdb54c44SPaul Walmsley #define OMAP4430_PRM_VOLTSETUP_MPU_RET_SLEEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0038) 6512339ea99SRajendra Nayak #define OMAP4_PRM_VOLTSETUP_IVA_RET_SLEEP_OFFSET 0x003c 652cdb54c44SPaul Walmsley #define OMAP4430_PRM_VOLTSETUP_IVA_RET_SLEEP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x003c) 6532339ea99SRajendra Nayak #define OMAP4_PRM_VP_CORE_CONFIG_OFFSET 0x0040 654cdb54c44SPaul Walmsley #define OMAP4430_PRM_VP_CORE_CONFIG OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0040) 6552339ea99SRajendra Nayak #define OMAP4_PRM_VP_CORE_STATUS_OFFSET 0x0044 656cdb54c44SPaul Walmsley #define OMAP4430_PRM_VP_CORE_STATUS OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0044) 6572339ea99SRajendra Nayak #define OMAP4_PRM_VP_CORE_VLIMITTO_OFFSET 0x0048 658cdb54c44SPaul Walmsley #define OMAP4430_PRM_VP_CORE_VLIMITTO OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0048) 6592339ea99SRajendra Nayak #define OMAP4_PRM_VP_CORE_VOLTAGE_OFFSET 0x004c 660cdb54c44SPaul Walmsley #define OMAP4430_PRM_VP_CORE_VOLTAGE OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x004c) 6612339ea99SRajendra Nayak #define OMAP4_PRM_VP_CORE_VSTEPMAX_OFFSET 0x0050 662cdb54c44SPaul Walmsley #define OMAP4430_PRM_VP_CORE_VSTEPMAX OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0050) 6632339ea99SRajendra Nayak #define OMAP4_PRM_VP_CORE_VSTEPMIN_OFFSET 0x0054 664cdb54c44SPaul Walmsley #define OMAP4430_PRM_VP_CORE_VSTEPMIN OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0054) 6652339ea99SRajendra Nayak #define OMAP4_PRM_VP_MPU_CONFIG_OFFSET 0x0058 666cdb54c44SPaul Walmsley #define OMAP4430_PRM_VP_MPU_CONFIG OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0058) 6672339ea99SRajendra Nayak #define OMAP4_PRM_VP_MPU_STATUS_OFFSET 0x005c 668cdb54c44SPaul Walmsley #define OMAP4430_PRM_VP_MPU_STATUS OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x005c) 6692339ea99SRajendra Nayak #define OMAP4_PRM_VP_MPU_VLIMITTO_OFFSET 0x0060 670cdb54c44SPaul Walmsley #define OMAP4430_PRM_VP_MPU_VLIMITTO OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0060) 6712339ea99SRajendra Nayak #define OMAP4_PRM_VP_MPU_VOLTAGE_OFFSET 0x0064 672cdb54c44SPaul Walmsley #define OMAP4430_PRM_VP_MPU_VOLTAGE OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0064) 6732339ea99SRajendra Nayak #define OMAP4_PRM_VP_MPU_VSTEPMAX_OFFSET 0x0068 674cdb54c44SPaul Walmsley #define OMAP4430_PRM_VP_MPU_VSTEPMAX OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0068) 6752339ea99SRajendra Nayak #define OMAP4_PRM_VP_MPU_VSTEPMIN_OFFSET 0x006c 676cdb54c44SPaul Walmsley #define OMAP4430_PRM_VP_MPU_VSTEPMIN OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x006c) 6772339ea99SRajendra Nayak #define OMAP4_PRM_VP_IVA_CONFIG_OFFSET 0x0070 678cdb54c44SPaul Walmsley #define OMAP4430_PRM_VP_IVA_CONFIG OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0070) 6792339ea99SRajendra Nayak #define OMAP4_PRM_VP_IVA_STATUS_OFFSET 0x0074 680cdb54c44SPaul Walmsley #define OMAP4430_PRM_VP_IVA_STATUS OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0074) 6812339ea99SRajendra Nayak #define OMAP4_PRM_VP_IVA_VLIMITTO_OFFSET 0x0078 682cdb54c44SPaul Walmsley #define OMAP4430_PRM_VP_IVA_VLIMITTO OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0078) 6832339ea99SRajendra Nayak #define OMAP4_PRM_VP_IVA_VOLTAGE_OFFSET 0x007c 684cdb54c44SPaul Walmsley #define OMAP4430_PRM_VP_IVA_VOLTAGE OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x007c) 6852339ea99SRajendra Nayak #define OMAP4_PRM_VP_IVA_VSTEPMAX_OFFSET 0x0080 686cdb54c44SPaul Walmsley #define OMAP4430_PRM_VP_IVA_VSTEPMAX OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0080) 6872339ea99SRajendra Nayak #define OMAP4_PRM_VP_IVA_VSTEPMIN_OFFSET 0x0084 688cdb54c44SPaul Walmsley #define OMAP4430_PRM_VP_IVA_VSTEPMIN OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0084) 6892339ea99SRajendra Nayak #define OMAP4_PRM_VC_SMPS_SA_OFFSET 0x0088 690cdb54c44SPaul Walmsley #define OMAP4430_PRM_VC_SMPS_SA OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0088) 6912339ea99SRajendra Nayak #define OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET 0x008c 692cdb54c44SPaul Walmsley #define OMAP4430_PRM_VC_VAL_SMPS_RA_VOL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x008c) 6932339ea99SRajendra Nayak #define OMAP4_PRM_VC_VAL_SMPS_RA_CMD_OFFSET 0x0090 694cdb54c44SPaul Walmsley #define OMAP4430_PRM_VC_VAL_SMPS_RA_CMD OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0090) 6952339ea99SRajendra Nayak #define OMAP4_PRM_VC_VAL_CMD_VDD_CORE_L_OFFSET 0x0094 696cdb54c44SPaul Walmsley #define OMAP4430_PRM_VC_VAL_CMD_VDD_CORE_L OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0094) 6972339ea99SRajendra Nayak #define OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET 0x0098 698cdb54c44SPaul Walmsley #define OMAP4430_PRM_VC_VAL_CMD_VDD_MPU_L OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x0098) 6992339ea99SRajendra Nayak #define OMAP4_PRM_VC_VAL_CMD_VDD_IVA_L_OFFSET 0x009c 700cdb54c44SPaul Walmsley #define OMAP4430_PRM_VC_VAL_CMD_VDD_IVA_L OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x009c) 7012339ea99SRajendra Nayak #define OMAP4_PRM_VC_VAL_BYPASS_OFFSET 0x00a0 702cdb54c44SPaul Walmsley #define OMAP4430_PRM_VC_VAL_BYPASS OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a0) 7032339ea99SRajendra Nayak #define OMAP4_PRM_VC_CFG_CHANNEL_OFFSET 0x00a4 704cdb54c44SPaul Walmsley #define OMAP4430_PRM_VC_CFG_CHANNEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a4) 705ad98a18bSBenoit Cousson #define OMAP4_PRM_VC_CFG_I2C_MODE_OFFSET 0x00a8 706ad98a18bSBenoit Cousson #define OMAP4430_PRM_VC_CFG_I2C_MODE OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a8) 7072339ea99SRajendra Nayak #define OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET 0x00ac 708cdb54c44SPaul Walmsley #define OMAP4430_PRM_VC_CFG_I2C_CLK OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00ac) 7092339ea99SRajendra Nayak #define OMAP4_PRM_SRAM_COUNT_OFFSET 0x00b0 710cdb54c44SPaul Walmsley #define OMAP4430_PRM_SRAM_COUNT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00b0) 7112339ea99SRajendra Nayak #define OMAP4_PRM_SRAM_WKUP_SETUP_OFFSET 0x00b4 712cdb54c44SPaul Walmsley #define OMAP4430_PRM_SRAM_WKUP_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00b4) 7132339ea99SRajendra Nayak #define OMAP4_PRM_LDO_SRAM_CORE_SETUP_OFFSET 0x00b8 714cdb54c44SPaul Walmsley #define OMAP4430_PRM_LDO_SRAM_CORE_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00b8) 7152339ea99SRajendra Nayak #define OMAP4_PRM_LDO_SRAM_CORE_CTRL_OFFSET 0x00bc 716cdb54c44SPaul Walmsley #define OMAP4430_PRM_LDO_SRAM_CORE_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00bc) 7172339ea99SRajendra Nayak #define OMAP4_PRM_LDO_SRAM_MPU_SETUP_OFFSET 0x00c0 718cdb54c44SPaul Walmsley #define OMAP4430_PRM_LDO_SRAM_MPU_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00c0) 7192339ea99SRajendra Nayak #define OMAP4_PRM_LDO_SRAM_MPU_CTRL_OFFSET 0x00c4 720cdb54c44SPaul Walmsley #define OMAP4430_PRM_LDO_SRAM_MPU_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00c4) 7212339ea99SRajendra Nayak #define OMAP4_PRM_LDO_SRAM_IVA_SETUP_OFFSET 0x00c8 722cdb54c44SPaul Walmsley #define OMAP4430_PRM_LDO_SRAM_IVA_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00c8) 7232339ea99SRajendra Nayak #define OMAP4_PRM_LDO_SRAM_IVA_CTRL_OFFSET 0x00cc 724cdb54c44SPaul Walmsley #define OMAP4430_PRM_LDO_SRAM_IVA_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00cc) 7252339ea99SRajendra Nayak #define OMAP4_PRM_LDO_ABB_MPU_SETUP_OFFSET 0x00d0 726cdb54c44SPaul Walmsley #define OMAP4430_PRM_LDO_ABB_MPU_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00d0) 7272339ea99SRajendra Nayak #define OMAP4_PRM_LDO_ABB_MPU_CTRL_OFFSET 0x00d4 728cdb54c44SPaul Walmsley #define OMAP4430_PRM_LDO_ABB_MPU_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00d4) 7292339ea99SRajendra Nayak #define OMAP4_PRM_LDO_ABB_IVA_SETUP_OFFSET 0x00d8 730cdb54c44SPaul Walmsley #define OMAP4430_PRM_LDO_ABB_IVA_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00d8) 7312339ea99SRajendra Nayak #define OMAP4_PRM_LDO_ABB_IVA_CTRL_OFFSET 0x00dc 732cdb54c44SPaul Walmsley #define OMAP4430_PRM_LDO_ABB_IVA_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00dc) 733fdd4f409SRajendra Nayak #define OMAP4_PRM_LDO_BANDGAP_SETUP_OFFSET 0x00e0 734cdb54c44SPaul Walmsley #define OMAP4430_PRM_LDO_BANDGAP_SETUP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00e0) 7352339ea99SRajendra Nayak #define OMAP4_PRM_DEVICE_OFF_CTRL_OFFSET 0x00e4 736cdb54c44SPaul Walmsley #define OMAP4430_PRM_DEVICE_OFF_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00e4) 7372339ea99SRajendra Nayak #define OMAP4_PRM_PHASE1_CNDP_OFFSET 0x00e8 738cdb54c44SPaul Walmsley #define OMAP4430_PRM_PHASE1_CNDP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00e8) 7392339ea99SRajendra Nayak #define OMAP4_PRM_PHASE2A_CNDP_OFFSET 0x00ec 740cdb54c44SPaul Walmsley #define OMAP4430_PRM_PHASE2A_CNDP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00ec) 7412339ea99SRajendra Nayak #define OMAP4_PRM_PHASE2B_CNDP_OFFSET 0x00f0 742cdb54c44SPaul Walmsley #define OMAP4430_PRM_PHASE2B_CNDP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f0) 743ad98a18bSBenoit Cousson #define OMAP4_PRM_MODEM_IF_CTRL_OFFSET 0x00f4 744ad98a18bSBenoit Cousson #define OMAP4430_PRM_MODEM_IF_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f4) 745fdd4f409SRajendra Nayak #define OMAP4_PRM_VC_ERRST_OFFSET 0x00f8 746cdb54c44SPaul Walmsley #define OMAP4430_PRM_VC_ERRST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f8) 747c1294045SRajendra Nayak 748c1294045SRajendra Nayak #endif 749