1ddd04b98SVaibhav Hiremath /* 2ddd04b98SVaibhav Hiremath * AM33XX PRM functions 3ddd04b98SVaibhav Hiremath * 4ddd04b98SVaibhav Hiremath * Copyright (C) 2011-2012 Texas Instruments Incorporated - http://www.ti.com/ 5ddd04b98SVaibhav Hiremath * 6ddd04b98SVaibhav Hiremath * This program is free software; you can redistribute it and/or 7ddd04b98SVaibhav Hiremath * modify it under the terms of the GNU General Public License as 8ddd04b98SVaibhav Hiremath * published by the Free Software Foundation version 2. 9ddd04b98SVaibhav Hiremath * 10ddd04b98SVaibhav Hiremath * This program is distributed "as is" WITHOUT ANY WARRANTY of any 11ddd04b98SVaibhav Hiremath * kind, whether express or implied; without even the implied warranty 12ddd04b98SVaibhav Hiremath * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13ddd04b98SVaibhav Hiremath * GNU General Public License for more details. 14ddd04b98SVaibhav Hiremath */ 15ddd04b98SVaibhav Hiremath 16ddd04b98SVaibhav Hiremath #include <linux/kernel.h> 17ddd04b98SVaibhav Hiremath #include <linux/types.h> 18ddd04b98SVaibhav Hiremath #include <linux/errno.h> 19ddd04b98SVaibhav Hiremath #include <linux/err.h> 20ddd04b98SVaibhav Hiremath #include <linux/io.h> 21ddd04b98SVaibhav Hiremath 22ddd04b98SVaibhav Hiremath #include <plat/common.h> 23ddd04b98SVaibhav Hiremath 24ddd04b98SVaibhav Hiremath #include "common.h" 25ddd04b98SVaibhav Hiremath #include "prm33xx.h" 26ddd04b98SVaibhav Hiremath #include "prm-regbits-33xx.h" 27ddd04b98SVaibhav Hiremath 28ddd04b98SVaibhav Hiremath /* Read a register in a PRM instance */ 29ddd04b98SVaibhav Hiremath u32 am33xx_prm_read_reg(s16 inst, u16 idx) 30ddd04b98SVaibhav Hiremath { 31ddd04b98SVaibhav Hiremath return __raw_readl(prm_base + inst + idx); 32ddd04b98SVaibhav Hiremath } 33ddd04b98SVaibhav Hiremath 34ddd04b98SVaibhav Hiremath /* Write into a register in a PRM instance */ 35ddd04b98SVaibhav Hiremath void am33xx_prm_write_reg(u32 val, s16 inst, u16 idx) 36ddd04b98SVaibhav Hiremath { 37ddd04b98SVaibhav Hiremath __raw_writel(val, prm_base + inst + idx); 38ddd04b98SVaibhav Hiremath } 39ddd04b98SVaibhav Hiremath 40ddd04b98SVaibhav Hiremath /* Read-modify-write a register in PRM. Caller must lock */ 41ddd04b98SVaibhav Hiremath u32 am33xx_prm_rmw_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx) 42ddd04b98SVaibhav Hiremath { 43ddd04b98SVaibhav Hiremath u32 v; 44ddd04b98SVaibhav Hiremath 45ddd04b98SVaibhav Hiremath v = am33xx_prm_read_reg(inst, idx); 46ddd04b98SVaibhav Hiremath v &= ~mask; 47ddd04b98SVaibhav Hiremath v |= bits; 48ddd04b98SVaibhav Hiremath am33xx_prm_write_reg(v, inst, idx); 49ddd04b98SVaibhav Hiremath 50ddd04b98SVaibhav Hiremath return v; 51ddd04b98SVaibhav Hiremath } 52ddd04b98SVaibhav Hiremath 53ddd04b98SVaibhav Hiremath /** 54ddd04b98SVaibhav Hiremath * am33xx_prm_is_hardreset_asserted - read the HW reset line state of 55ddd04b98SVaibhav Hiremath * submodules contained in the hwmod module 56ddd04b98SVaibhav Hiremath * @shift: register bit shift corresponding to the reset line to check 57ddd04b98SVaibhav Hiremath * @inst: CM instance register offset (*_INST macro) 58ddd04b98SVaibhav Hiremath * @rstctrl_offs: RM_RSTCTRL register address offset for this module 59ddd04b98SVaibhav Hiremath * 60ddd04b98SVaibhav Hiremath * Returns 1 if the (sub)module hardreset line is currently asserted, 61ddd04b98SVaibhav Hiremath * 0 if the (sub)module hardreset line is not currently asserted, or 62ddd04b98SVaibhav Hiremath * -EINVAL upon parameter error. 63ddd04b98SVaibhav Hiremath */ 64ddd04b98SVaibhav Hiremath int am33xx_prm_is_hardreset_asserted(u8 shift, s16 inst, u16 rstctrl_offs) 65ddd04b98SVaibhav Hiremath { 66ddd04b98SVaibhav Hiremath u32 v; 67ddd04b98SVaibhav Hiremath 68ddd04b98SVaibhav Hiremath v = am33xx_prm_read_reg(inst, rstctrl_offs); 69ddd04b98SVaibhav Hiremath v &= 1 << shift; 70ddd04b98SVaibhav Hiremath v >>= shift; 71ddd04b98SVaibhav Hiremath 72ddd04b98SVaibhav Hiremath return v; 73ddd04b98SVaibhav Hiremath } 74ddd04b98SVaibhav Hiremath 75ddd04b98SVaibhav Hiremath /** 76ddd04b98SVaibhav Hiremath * am33xx_prm_assert_hardreset - assert the HW reset line of a submodule 77ddd04b98SVaibhav Hiremath * @shift: register bit shift corresponding to the reset line to assert 78ddd04b98SVaibhav Hiremath * @inst: CM instance register offset (*_INST macro) 79ddd04b98SVaibhav Hiremath * @rstctrl_reg: RM_RSTCTRL register address for this module 80ddd04b98SVaibhav Hiremath * 81ddd04b98SVaibhav Hiremath * Some IPs like dsp, ipu or iva contain processors that require an HW 82ddd04b98SVaibhav Hiremath * reset line to be asserted / deasserted in order to fully enable the 83ddd04b98SVaibhav Hiremath * IP. These modules may have multiple hard-reset lines that reset 84ddd04b98SVaibhav Hiremath * different 'submodules' inside the IP block. This function will 85ddd04b98SVaibhav Hiremath * place the submodule into reset. Returns 0 upon success or -EINVAL 86ddd04b98SVaibhav Hiremath * upon an argument error. 87ddd04b98SVaibhav Hiremath */ 88ddd04b98SVaibhav Hiremath int am33xx_prm_assert_hardreset(u8 shift, s16 inst, u16 rstctrl_offs) 89ddd04b98SVaibhav Hiremath { 90ddd04b98SVaibhav Hiremath u32 mask = 1 << shift; 91ddd04b98SVaibhav Hiremath 92ddd04b98SVaibhav Hiremath am33xx_prm_rmw_reg_bits(mask, mask, inst, rstctrl_offs); 93ddd04b98SVaibhav Hiremath 94ddd04b98SVaibhav Hiremath return 0; 95ddd04b98SVaibhav Hiremath } 96ddd04b98SVaibhav Hiremath 97ddd04b98SVaibhav Hiremath /** 98ddd04b98SVaibhav Hiremath * am33xx_prm_deassert_hardreset - deassert a submodule hardreset line and 99ddd04b98SVaibhav Hiremath * wait 100ddd04b98SVaibhav Hiremath * @shift: register bit shift corresponding to the reset line to deassert 101ddd04b98SVaibhav Hiremath * @inst: CM instance register offset (*_INST macro) 102ddd04b98SVaibhav Hiremath * @rstctrl_reg: RM_RSTCTRL register address for this module 103ddd04b98SVaibhav Hiremath * @rstst_reg: RM_RSTST register address for this module 104ddd04b98SVaibhav Hiremath * 105ddd04b98SVaibhav Hiremath * Some IPs like dsp, ipu or iva contain processors that require an HW 106ddd04b98SVaibhav Hiremath * reset line to be asserted / deasserted in order to fully enable the 107ddd04b98SVaibhav Hiremath * IP. These modules may have multiple hard-reset lines that reset 108ddd04b98SVaibhav Hiremath * different 'submodules' inside the IP block. This function will 109ddd04b98SVaibhav Hiremath * take the submodule out of reset and wait until the PRCM indicates 110ddd04b98SVaibhav Hiremath * that the reset has completed before returning. Returns 0 upon success or 111ddd04b98SVaibhav Hiremath * -EINVAL upon an argument error, -EEXIST if the submodule was already out 112ddd04b98SVaibhav Hiremath * of reset, or -EBUSY if the submodule did not exit reset promptly. 113ddd04b98SVaibhav Hiremath */ 114ddd04b98SVaibhav Hiremath int am33xx_prm_deassert_hardreset(u8 shift, s16 inst, 115ddd04b98SVaibhav Hiremath u16 rstctrl_offs, u16 rstst_offs) 116ddd04b98SVaibhav Hiremath { 117ddd04b98SVaibhav Hiremath int c; 118ddd04b98SVaibhav Hiremath u32 mask = 1 << shift; 119ddd04b98SVaibhav Hiremath 120ddd04b98SVaibhav Hiremath /* Check the current status to avoid de-asserting the line twice */ 121ddd04b98SVaibhav Hiremath if (am33xx_prm_is_hardreset_asserted(shift, inst, rstctrl_offs) == 0) 122ddd04b98SVaibhav Hiremath return -EEXIST; 123ddd04b98SVaibhav Hiremath 124ddd04b98SVaibhav Hiremath /* Clear the reset status by writing 1 to the status bit */ 125ddd04b98SVaibhav Hiremath am33xx_prm_rmw_reg_bits(0xffffffff, mask, inst, rstst_offs); 126ddd04b98SVaibhav Hiremath /* de-assert the reset control line */ 127ddd04b98SVaibhav Hiremath am33xx_prm_rmw_reg_bits(mask, 0, inst, rstctrl_offs); 128ddd04b98SVaibhav Hiremath /* wait the status to be set */ 129ddd04b98SVaibhav Hiremath 130ddd04b98SVaibhav Hiremath omap_test_timeout(am33xx_prm_is_hardreset_asserted(shift, inst, 131ddd04b98SVaibhav Hiremath rstst_offs), 132ddd04b98SVaibhav Hiremath MAX_MODULE_HARDRESET_WAIT, c); 133ddd04b98SVaibhav Hiremath 134ddd04b98SVaibhav Hiremath return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0; 135ddd04b98SVaibhav Hiremath } 136