1 /* 2 * OMAP2/3 PRM module functions 3 * 4 * Copyright (C) 2010 Texas Instruments, Inc. 5 * Copyright (C) 2010 Nokia Corporation 6 * Benoît Cousson 7 * Paul Walmsley 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 */ 13 14 #include <linux/kernel.h> 15 #include <linux/delay.h> 16 #include <linux/errno.h> 17 #include <linux/err.h> 18 19 #include <plat/common.h> 20 #include <plat/cpu.h> 21 #include <plat/prcm.h> 22 23 #include "prm.h" 24 #include "prm-regbits-24xx.h" 25 #include "prm-regbits-34xx.h" 26 27 /** 28 * omap2_prm_is_hardreset_asserted - read the HW reset line state of 29 * submodules contained in the hwmod module 30 * @prm_mod: PRM submodule base (e.g. CORE_MOD) 31 * @shift: register bit shift corresponding to the reset line to check 32 * 33 * Returns 1 if the (sub)module hardreset line is currently asserted, 34 * 0 if the (sub)module hardreset line is not currently asserted, or 35 * -EINVAL if called while running on a non-OMAP2/3 chip. 36 */ 37 int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift) 38 { 39 if (!(cpu_is_omap24xx() || cpu_is_omap34xx())) 40 return -EINVAL; 41 42 return prm_read_mod_bits_shift(prm_mod, OMAP2_RM_RSTCTRL, 43 (1 << shift)); 44 } 45 46 /** 47 * omap2_prm_assert_hardreset - assert the HW reset line of a submodule 48 * @prm_mod: PRM submodule base (e.g. CORE_MOD) 49 * @shift: register bit shift corresponding to the reset line to assert 50 * 51 * Some IPs like dsp or iva contain processors that require an HW 52 * reset line to be asserted / deasserted in order to fully enable the 53 * IP. These modules may have multiple hard-reset lines that reset 54 * different 'submodules' inside the IP block. This function will 55 * place the submodule into reset. Returns 0 upon success or -EINVAL 56 * upon an argument error. 57 */ 58 int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift) 59 { 60 u32 mask; 61 62 if (!(cpu_is_omap24xx() || cpu_is_omap34xx())) 63 return -EINVAL; 64 65 mask = 1 << shift; 66 prm_rmw_mod_reg_bits(mask, mask, prm_mod, OMAP2_RM_RSTCTRL); 67 68 return 0; 69 } 70 71 /** 72 * omap2_prm_deassert_hardreset - deassert a submodule hardreset line and wait 73 * @prm_mod: PRM submodule base (e.g. CORE_MOD) 74 * @shift: register bit shift corresponding to the reset line to deassert 75 * 76 * Some IPs like dsp or iva contain processors that require an HW 77 * reset line to be asserted / deasserted in order to fully enable the 78 * IP. These modules may have multiple hard-reset lines that reset 79 * different 'submodules' inside the IP block. This function will 80 * take the submodule out of reset and wait until the PRCM indicates 81 * that the reset has completed before returning. Returns 0 upon success or 82 * -EINVAL upon an argument error, -EEXIST if the submodule was already out 83 * of reset, or -EBUSY if the submodule did not exit reset promptly. 84 */ 85 int omap2_prm_deassert_hardreset(s16 prm_mod, u8 shift) 86 { 87 u32 mask; 88 int c; 89 90 if (!(cpu_is_omap24xx() || cpu_is_omap34xx())) 91 return -EINVAL; 92 93 mask = 1 << shift; 94 95 /* Check the current status to avoid de-asserting the line twice */ 96 if (prm_read_mod_bits_shift(prm_mod, OMAP2_RM_RSTCTRL, mask) == 0) 97 return -EEXIST; 98 99 /* Clear the reset status by writing 1 to the status bit */ 100 prm_rmw_mod_reg_bits(0xffffffff, mask, prm_mod, OMAP2_RM_RSTST); 101 /* de-assert the reset control line */ 102 prm_rmw_mod_reg_bits(mask, 0, prm_mod, OMAP2_RM_RSTCTRL); 103 /* wait the status to be set */ 104 omap_test_timeout(prm_read_mod_bits_shift(prm_mod, OMAP2_RM_RSTST, 105 mask), 106 MAX_MODULE_HARDRESET_WAIT, c); 107 108 return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0; 109 } 110 111