1 /* 2 * OMAP2/3/4 Power/Reset Management (PRM) bitfield definitions 3 * 4 * Copyright (C) 2007-2009, 2012 Texas Instruments, Inc. 5 * Copyright (C) 2010 Nokia Corporation 6 * 7 * Paul Walmsley 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 */ 13 #ifndef __ARCH_ARM_MACH_OMAP2_PRM_H 14 #define __ARCH_ARM_MACH_OMAP2_PRM_H 15 16 #include "prcm-common.h" 17 18 # ifndef __ASSEMBLER__ 19 extern void __iomem *prm_base; 20 extern void omap2_set_globals_prm(void __iomem *prm); 21 # endif 22 23 /* 24 * 24XX: PM_PWSTST_CORE, PM_PWSTST_GFX, PM_PWSTST_MPU, PM_PWSTST_DSP 25 * 26 * 2430: PM_PWSTST_MDM 27 * 28 * 3430: PM_PWSTST_IVA2, PM_PWSTST_MPU, PM_PWSTST_CORE, PM_PWSTST_GFX, 29 * PM_PWSTST_DSS, PM_PWSTST_CAM, PM_PWSTST_PER, PM_PWSTST_EMU, 30 * PM_PWSTST_NEON 31 */ 32 #define OMAP_INTRANSITION_MASK (1 << 20) 33 34 35 /* 36 * 24XX: PM_PWSTST_GFX, PM_PWSTST_DSP 37 * 38 * 2430: PM_PWSTST_MDM 39 * 40 * 3430: PM_PWSTST_IVA2, PM_PWSTST_MPU, PM_PWSTST_CORE, PM_PWSTST_GFX, 41 * PM_PWSTST_DSS, PM_PWSTST_CAM, PM_PWSTST_PER, PM_PWSTST_EMU, 42 * PM_PWSTST_NEON 43 */ 44 #define OMAP_POWERSTATEST_SHIFT 0 45 #define OMAP_POWERSTATEST_MASK (0x3 << 0) 46 47 /* 48 * 24XX: PM_PWSTCTRL_MPU, PM_PWSTCTRL_CORE, PM_PWSTCTRL_GFX, 49 * PM_PWSTCTRL_DSP, PM_PWSTST_MPU 50 * 51 * 2430: PM_PWSTCTRL_MDM shared bits 52 * 53 * 3430: PM_PWSTCTRL_IVA2, PM_PWSTCTRL_MPU, PM_PWSTCTRL_CORE, 54 * PM_PWSTCTRL_GFX, PM_PWSTCTRL_DSS, PM_PWSTCTRL_CAM, PM_PWSTCTRL_PER, 55 * PM_PWSTCTRL_NEON shared bits 56 */ 57 #define OMAP_POWERSTATE_SHIFT 0 58 #define OMAP_POWERSTATE_MASK (0x3 << 0) 59 60 /* 61 * Standardized OMAP reset source bits 62 * 63 * To the extent these happen to match the hardware register bit 64 * shifts, it's purely coincidental. Used by omap-wdt.c. 65 * OMAP_UNKNOWN_RST_SRC_ID_SHIFT is a special value, used whenever 66 * there are any bits remaining in the global PRM_RSTST register that 67 * haven't been identified, or when the PRM code for the current SoC 68 * doesn't know how to interpret the register. 69 */ 70 #define OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT 0 71 #define OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT 1 72 #define OMAP_SECU_VIOL_RST_SRC_ID_SHIFT 2 73 #define OMAP_MPU_WD_RST_SRC_ID_SHIFT 3 74 #define OMAP_SECU_WD_RST_SRC_ID_SHIFT 4 75 #define OMAP_EXTWARM_RST_SRC_ID_SHIFT 5 76 #define OMAP_VDD_MPU_VM_RST_SRC_ID_SHIFT 6 77 #define OMAP_VDD_IVA_VM_RST_SRC_ID_SHIFT 7 78 #define OMAP_VDD_CORE_VM_RST_SRC_ID_SHIFT 8 79 #define OMAP_ICEPICK_RST_SRC_ID_SHIFT 9 80 #define OMAP_ICECRUSHER_RST_SRC_ID_SHIFT 10 81 #define OMAP_C2C_RST_SRC_ID_SHIFT 11 82 #define OMAP_UNKNOWN_RST_SRC_ID_SHIFT 12 83 84 #ifndef __ASSEMBLER__ 85 86 /** 87 * struct prm_reset_src_map - map register bitshifts to standard bitshifts 88 * @reg_shift: bitshift in the PRM reset source register 89 * @std_shift: bitshift equivalent in the standard reset source list 90 * 91 * The fields are signed because -1 is used as a terminator. 92 */ 93 struct prm_reset_src_map { 94 s8 reg_shift; 95 s8 std_shift; 96 }; 97 98 /** 99 * struct prm_ll_data - fn ptrs to per-SoC PRM function implementations 100 * @read_reset_sources: ptr to the Soc PRM-specific get_reset_source impl 101 */ 102 struct prm_ll_data { 103 u32 (*read_reset_sources)(void); 104 }; 105 106 extern int prm_register(struct prm_ll_data *pld); 107 extern int prm_unregister(struct prm_ll_data *pld); 108 109 extern u32 prm_read_reset_sources(void); 110 111 #endif 112 113 114 #endif 115