1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * OMAP2/3/4 Power/Reset Management (PRM) bitfield definitions 4 * 5 * Copyright (C) 2007-2009, 2012 Texas Instruments, Inc. 6 * Copyright (C) 2010 Nokia Corporation 7 * 8 * Paul Walmsley 9 */ 10 #ifndef __ARCH_ARM_MACH_OMAP2_PRM_H 11 #define __ARCH_ARM_MACH_OMAP2_PRM_H 12 13 #include "prcm-common.h" 14 15 # ifndef __ASSEMBLER__ 16 extern struct omap_domain_base prm_base; 17 extern u16 prm_features; 18 extern void omap2_set_globals_prm(void __iomem *prm); 19 int omap_prcm_init(void); 20 int omap2_prm_base_init(void); 21 int omap2_prcm_base_init(void); 22 # endif 23 24 /* 25 * prm_features flag values 26 * 27 * PRM_HAS_IO_WAKEUP: has IO wakeup capability 28 * PRM_HAS_VOLTAGE: has voltage domains 29 */ 30 #define PRM_HAS_IO_WAKEUP BIT(0) 31 #define PRM_HAS_VOLTAGE BIT(1) 32 33 /* 34 * MAX_MODULE_SOFTRESET_WAIT: Maximum microseconds to wait for OMAP 35 * module to softreset 36 */ 37 #define MAX_MODULE_SOFTRESET_WAIT 10000 38 39 /* 40 * MAX_MODULE_HARDRESET_WAIT: Maximum microseconds to wait for an OMAP 41 * submodule to exit hardreset 42 */ 43 #define MAX_MODULE_HARDRESET_WAIT 10000 44 45 /* 46 * Register bitfields 47 */ 48 49 /* 50 * 24XX: PM_PWSTST_CORE, PM_PWSTST_GFX, PM_PWSTST_MPU, PM_PWSTST_DSP 51 * 52 * 2430: PM_PWSTST_MDM 53 * 54 * 3430: PM_PWSTST_IVA2, PM_PWSTST_MPU, PM_PWSTST_CORE, PM_PWSTST_GFX, 55 * PM_PWSTST_DSS, PM_PWSTST_CAM, PM_PWSTST_PER, PM_PWSTST_EMU, 56 * PM_PWSTST_NEON 57 */ 58 #define OMAP_INTRANSITION_MASK (1 << 20) 59 60 61 /* 62 * 24XX: PM_PWSTST_GFX, PM_PWSTST_DSP 63 * 64 * 2430: PM_PWSTST_MDM 65 * 66 * 3430: PM_PWSTST_IVA2, PM_PWSTST_MPU, PM_PWSTST_CORE, PM_PWSTST_GFX, 67 * PM_PWSTST_DSS, PM_PWSTST_CAM, PM_PWSTST_PER, PM_PWSTST_EMU, 68 * PM_PWSTST_NEON 69 */ 70 #define OMAP_POWERSTATEST_SHIFT 0 71 #define OMAP_POWERSTATEST_MASK (0x3 << 0) 72 73 /* 74 * 24XX: PM_PWSTCTRL_MPU, PM_PWSTCTRL_CORE, PM_PWSTCTRL_GFX, 75 * PM_PWSTCTRL_DSP, PM_PWSTST_MPU 76 * 77 * 2430: PM_PWSTCTRL_MDM shared bits 78 * 79 * 3430: PM_PWSTCTRL_IVA2, PM_PWSTCTRL_MPU, PM_PWSTCTRL_CORE, 80 * PM_PWSTCTRL_GFX, PM_PWSTCTRL_DSS, PM_PWSTCTRL_CAM, PM_PWSTCTRL_PER, 81 * PM_PWSTCTRL_NEON shared bits 82 */ 83 #define OMAP_POWERSTATE_SHIFT 0 84 #define OMAP_POWERSTATE_MASK (0x3 << 0) 85 86 /* 87 * Standardized OMAP reset source bits 88 * 89 * To the extent these happen to match the hardware register bit 90 * shifts, it's purely coincidental. Used by omap-wdt.c. 91 * OMAP_UNKNOWN_RST_SRC_ID_SHIFT is a special value, used whenever 92 * there are any bits remaining in the global PRM_RSTST register that 93 * haven't been identified, or when the PRM code for the current SoC 94 * doesn't know how to interpret the register. 95 */ 96 #define OMAP_GLOBAL_COLD_RST_SRC_ID_SHIFT 0 97 #define OMAP_GLOBAL_WARM_RST_SRC_ID_SHIFT 1 98 #define OMAP_SECU_VIOL_RST_SRC_ID_SHIFT 2 99 #define OMAP_MPU_WD_RST_SRC_ID_SHIFT 3 100 #define OMAP_SECU_WD_RST_SRC_ID_SHIFT 4 101 #define OMAP_EXTWARM_RST_SRC_ID_SHIFT 5 102 #define OMAP_VDD_MPU_VM_RST_SRC_ID_SHIFT 6 103 #define OMAP_VDD_IVA_VM_RST_SRC_ID_SHIFT 7 104 #define OMAP_VDD_CORE_VM_RST_SRC_ID_SHIFT 8 105 #define OMAP_ICEPICK_RST_SRC_ID_SHIFT 9 106 #define OMAP_ICECRUSHER_RST_SRC_ID_SHIFT 10 107 #define OMAP_C2C_RST_SRC_ID_SHIFT 11 108 #define OMAP_UNKNOWN_RST_SRC_ID_SHIFT 12 109 110 #ifndef __ASSEMBLER__ 111 112 /** 113 * struct prm_reset_src_map - map register bitshifts to standard bitshifts 114 * @reg_shift: bitshift in the PRM reset source register 115 * @std_shift: bitshift equivalent in the standard reset source list 116 * 117 * The fields are signed because -1 is used as a terminator. 118 */ 119 struct prm_reset_src_map { 120 s8 reg_shift; 121 s8 std_shift; 122 }; 123 124 /** 125 * struct prm_ll_data - fn ptrs to per-SoC PRM function implementations 126 * @read_reset_sources: ptr to the SoC PRM-specific get_reset_source impl 127 * @was_any_context_lost_old: ptr to the SoC PRM context loss test fn 128 * @clear_context_loss_flags_old: ptr to the SoC PRM context loss flag clear fn 129 * @late_init: ptr to the late init function 130 * @assert_hardreset: ptr to the SoC PRM hardreset assert impl 131 * @deassert_hardreset: ptr to the SoC PRM hardreset deassert impl 132 * 133 * XXX @was_any_context_lost_old and @clear_context_loss_flags_old are 134 * deprecated. 135 */ 136 struct prm_ll_data { 137 u32 (*read_reset_sources)(void); 138 bool (*was_any_context_lost_old)(u8 part, s16 inst, u16 idx); 139 void (*clear_context_loss_flags_old)(u8 part, s16 inst, u16 idx); 140 int (*late_init)(void); 141 int (*assert_hardreset)(u8 shift, u8 part, s16 prm_mod, u16 offset); 142 int (*deassert_hardreset)(u8 shift, u8 st_shift, u8 part, s16 prm_mod, 143 u16 offset, u16 st_offset); 144 int (*is_hardreset_asserted)(u8 shift, u8 part, s16 prm_mod, 145 u16 offset); 146 void (*reset_system)(void); 147 int (*clear_mod_irqs)(s16 module, u8 regs, u32 wkst_mask); 148 u32 (*vp_check_txdone)(u8 vp_id); 149 void (*vp_clear_txdone)(u8 vp_id); 150 }; 151 152 extern int prm_register(struct prm_ll_data *pld); 153 extern int prm_unregister(struct prm_ll_data *pld); 154 155 int omap_prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod, u16 offset); 156 int omap_prm_deassert_hardreset(u8 shift, u8 st_shift, u8 part, s16 prm_mod, 157 u16 offset, u16 st_offset); 158 int omap_prm_is_hardreset_asserted(u8 shift, u8 part, s16 prm_mod, u16 offset); 159 extern u32 prm_read_reset_sources(void); 160 extern bool prm_was_any_context_lost_old(u8 part, s16 inst, u16 idx); 161 extern void prm_clear_context_loss_flags_old(u8 part, s16 inst, u16 idx); 162 void omap_prm_reset_system(void); 163 164 void omap_prm_reconfigure_io_chain(void); 165 int omap_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask); 166 167 /* 168 * Voltage Processor (VP) identifiers 169 */ 170 #define OMAP3_VP_VDD_MPU_ID 0 171 #define OMAP3_VP_VDD_CORE_ID 1 172 #define OMAP4_VP_VDD_CORE_ID 0 173 #define OMAP4_VP_VDD_IVA_ID 1 174 #define OMAP4_VP_VDD_MPU_ID 2 175 176 u32 omap_prm_vp_check_txdone(u8 vp_id); 177 void omap_prm_vp_clear_txdone(u8 vp_id); 178 179 #endif 180 181 182 #endif 183