16e01478aSPaul Walmsley /* 26e01478aSPaul Walmsley * OMAP4 Power domains framework 36e01478aSPaul Walmsley * 46e01478aSPaul Walmsley * Copyright (C) 2009-2010 Texas Instruments, Inc. 56e01478aSPaul Walmsley * Copyright (C) 2009-2010 Nokia Corporation 66e01478aSPaul Walmsley * 76e01478aSPaul Walmsley * Abhijit Pagare (abhijitpagare@ti.com) 86e01478aSPaul Walmsley * Benoit Cousson (b-cousson@ti.com) 96e01478aSPaul Walmsley * Paul Walmsley (paul@pwsan.com) 106e01478aSPaul Walmsley * 116e01478aSPaul Walmsley * This file is automatically generated from the OMAP hardware databases. 126e01478aSPaul Walmsley * We respectfully ask that any modifications to this file be coordinated 136e01478aSPaul Walmsley * with the public linux-omap@vger.kernel.org mailing list and the 146e01478aSPaul Walmsley * authors above to ensure that the autogeneration scripts are kept 156e01478aSPaul Walmsley * up-to-date with the file contents. 166e01478aSPaul Walmsley * 176e01478aSPaul Walmsley * This program is free software; you can redistribute it and/or modify 186e01478aSPaul Walmsley * it under the terms of the GNU General Public License version 2 as 196e01478aSPaul Walmsley * published by the Free Software Foundation. 206e01478aSPaul Walmsley */ 216e01478aSPaul Walmsley 226e01478aSPaul Walmsley #include <linux/kernel.h> 236e01478aSPaul Walmsley #include <linux/init.h> 246e01478aSPaul Walmsley 256e01478aSPaul Walmsley #include <plat/powerdomain.h> 266e01478aSPaul Walmsley #include "powerdomains.h" 276e01478aSPaul Walmsley 286e01478aSPaul Walmsley #include "prcm-common.h" 29a64bb9cdSPaul Walmsley #include "prcm44xx.h" 306e01478aSPaul Walmsley #include "prm-regbits-44xx.h" 31d198b514SPaul Walmsley #include "prm44xx.h" 32d198b514SPaul Walmsley #include "prcm_mpu44xx.h" 336e01478aSPaul Walmsley 346e01478aSPaul Walmsley /* core_44xx_pwrdm: CORE power domain */ 356e01478aSPaul Walmsley static struct powerdomain core_44xx_pwrdm = { 366e01478aSPaul Walmsley .name = "core_pwrdm", 37cdb54c44SPaul Walmsley .prcm_offs = OMAP4430_PRM_CORE_INST, 38a64bb9cdSPaul Walmsley .prcm_partition = OMAP4430_PRM_PARTITION, 396e01478aSPaul Walmsley .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 406e01478aSPaul Walmsley .pwrsts = PWRSTS_RET_ON, 416e01478aSPaul Walmsley .pwrsts_logic_ret = PWRSTS_OFF_RET, 426e01478aSPaul Walmsley .banks = 5, 436e01478aSPaul Walmsley .pwrsts_mem_ret = { 446e01478aSPaul Walmsley [0] = PWRDM_POWER_OFF, /* core_nret_bank */ 456e01478aSPaul Walmsley [1] = PWRSTS_OFF_RET, /* core_ocmram */ 466e01478aSPaul Walmsley [2] = PWRDM_POWER_RET, /* core_other_bank */ 476e01478aSPaul Walmsley [3] = PWRSTS_OFF_RET, /* ducati_l2ram */ 486e01478aSPaul Walmsley [4] = PWRSTS_OFF_RET, /* ducati_unicache */ 496e01478aSPaul Walmsley }, 506e01478aSPaul Walmsley .pwrsts_mem_on = { 516e01478aSPaul Walmsley [0] = PWRDM_POWER_ON, /* core_nret_bank */ 526e01478aSPaul Walmsley [1] = PWRSTS_OFF_RET, /* core_ocmram */ 536e01478aSPaul Walmsley [2] = PWRDM_POWER_ON, /* core_other_bank */ 546e01478aSPaul Walmsley [3] = PWRDM_POWER_ON, /* ducati_l2ram */ 556e01478aSPaul Walmsley [4] = PWRDM_POWER_ON, /* ducati_unicache */ 566e01478aSPaul Walmsley }, 576e01478aSPaul Walmsley .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, 586e01478aSPaul Walmsley }; 596e01478aSPaul Walmsley 606e01478aSPaul Walmsley /* gfx_44xx_pwrdm: 3D accelerator power domain */ 616e01478aSPaul Walmsley static struct powerdomain gfx_44xx_pwrdm = { 626e01478aSPaul Walmsley .name = "gfx_pwrdm", 63cdb54c44SPaul Walmsley .prcm_offs = OMAP4430_PRM_GFX_INST, 64a64bb9cdSPaul Walmsley .prcm_partition = OMAP4430_PRM_PARTITION, 656e01478aSPaul Walmsley .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 666e01478aSPaul Walmsley .pwrsts = PWRSTS_OFF_ON, 676e01478aSPaul Walmsley .banks = 1, 686e01478aSPaul Walmsley .pwrsts_mem_ret = { 696e01478aSPaul Walmsley [0] = PWRDM_POWER_OFF, /* gfx_mem */ 706e01478aSPaul Walmsley }, 716e01478aSPaul Walmsley .pwrsts_mem_on = { 726e01478aSPaul Walmsley [0] = PWRDM_POWER_ON, /* gfx_mem */ 736e01478aSPaul Walmsley }, 746e01478aSPaul Walmsley .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, 756e01478aSPaul Walmsley }; 766e01478aSPaul Walmsley 776e01478aSPaul Walmsley /* abe_44xx_pwrdm: Audio back end power domain */ 786e01478aSPaul Walmsley static struct powerdomain abe_44xx_pwrdm = { 796e01478aSPaul Walmsley .name = "abe_pwrdm", 80cdb54c44SPaul Walmsley .prcm_offs = OMAP4430_PRM_ABE_INST, 81a64bb9cdSPaul Walmsley .prcm_partition = OMAP4430_PRM_PARTITION, 826e01478aSPaul Walmsley .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 836e01478aSPaul Walmsley .pwrsts = PWRSTS_OFF_RET_ON, 846e01478aSPaul Walmsley .pwrsts_logic_ret = PWRDM_POWER_OFF, 856e01478aSPaul Walmsley .banks = 2, 866e01478aSPaul Walmsley .pwrsts_mem_ret = { 876e01478aSPaul Walmsley [0] = PWRDM_POWER_RET, /* aessmem */ 886e01478aSPaul Walmsley [1] = PWRDM_POWER_OFF, /* periphmem */ 896e01478aSPaul Walmsley }, 906e01478aSPaul Walmsley .pwrsts_mem_on = { 916e01478aSPaul Walmsley [0] = PWRDM_POWER_ON, /* aessmem */ 926e01478aSPaul Walmsley [1] = PWRDM_POWER_ON, /* periphmem */ 936e01478aSPaul Walmsley }, 946e01478aSPaul Walmsley .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, 956e01478aSPaul Walmsley }; 966e01478aSPaul Walmsley 976e01478aSPaul Walmsley /* dss_44xx_pwrdm: Display subsystem power domain */ 986e01478aSPaul Walmsley static struct powerdomain dss_44xx_pwrdm = { 996e01478aSPaul Walmsley .name = "dss_pwrdm", 100cdb54c44SPaul Walmsley .prcm_offs = OMAP4430_PRM_DSS_INST, 101a64bb9cdSPaul Walmsley .prcm_partition = OMAP4430_PRM_PARTITION, 1026e01478aSPaul Walmsley .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 1036e01478aSPaul Walmsley .pwrsts = PWRSTS_OFF_RET_ON, 1046e01478aSPaul Walmsley .pwrsts_logic_ret = PWRSTS_OFF, 1056e01478aSPaul Walmsley .banks = 1, 1066e01478aSPaul Walmsley .pwrsts_mem_ret = { 1076e01478aSPaul Walmsley [0] = PWRDM_POWER_OFF, /* dss_mem */ 1086e01478aSPaul Walmsley }, 1096e01478aSPaul Walmsley .pwrsts_mem_on = { 1106e01478aSPaul Walmsley [0] = PWRDM_POWER_ON, /* dss_mem */ 1116e01478aSPaul Walmsley }, 1126e01478aSPaul Walmsley .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, 1136e01478aSPaul Walmsley }; 1146e01478aSPaul Walmsley 1156e01478aSPaul Walmsley /* tesla_44xx_pwrdm: Tesla processor power domain */ 1166e01478aSPaul Walmsley static struct powerdomain tesla_44xx_pwrdm = { 1176e01478aSPaul Walmsley .name = "tesla_pwrdm", 118cdb54c44SPaul Walmsley .prcm_offs = OMAP4430_PRM_TESLA_INST, 119a64bb9cdSPaul Walmsley .prcm_partition = OMAP4430_PRM_PARTITION, 1206e01478aSPaul Walmsley .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 1216e01478aSPaul Walmsley .pwrsts = PWRSTS_OFF_RET_ON, 1226e01478aSPaul Walmsley .pwrsts_logic_ret = PWRSTS_OFF_RET, 1236e01478aSPaul Walmsley .banks = 3, 1246e01478aSPaul Walmsley .pwrsts_mem_ret = { 1256e01478aSPaul Walmsley [0] = PWRDM_POWER_RET, /* tesla_edma */ 1266e01478aSPaul Walmsley [1] = PWRSTS_OFF_RET, /* tesla_l1 */ 1276e01478aSPaul Walmsley [2] = PWRSTS_OFF_RET, /* tesla_l2 */ 1286e01478aSPaul Walmsley }, 1296e01478aSPaul Walmsley .pwrsts_mem_on = { 1306e01478aSPaul Walmsley [0] = PWRDM_POWER_ON, /* tesla_edma */ 1316e01478aSPaul Walmsley [1] = PWRDM_POWER_ON, /* tesla_l1 */ 1326e01478aSPaul Walmsley [2] = PWRDM_POWER_ON, /* tesla_l2 */ 1336e01478aSPaul Walmsley }, 1346e01478aSPaul Walmsley .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, 1356e01478aSPaul Walmsley }; 1366e01478aSPaul Walmsley 1376e01478aSPaul Walmsley /* wkup_44xx_pwrdm: Wake-up power domain */ 1386e01478aSPaul Walmsley static struct powerdomain wkup_44xx_pwrdm = { 1396e01478aSPaul Walmsley .name = "wkup_pwrdm", 140cdb54c44SPaul Walmsley .prcm_offs = OMAP4430_PRM_WKUP_INST, 141a64bb9cdSPaul Walmsley .prcm_partition = OMAP4430_PRM_PARTITION, 1426e01478aSPaul Walmsley .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 1436e01478aSPaul Walmsley .pwrsts = PWRSTS_ON, 1446e01478aSPaul Walmsley .banks = 1, 1456e01478aSPaul Walmsley .pwrsts_mem_ret = { 1466e01478aSPaul Walmsley [0] = PWRDM_POWER_OFF, /* wkup_bank */ 1476e01478aSPaul Walmsley }, 1486e01478aSPaul Walmsley .pwrsts_mem_on = { 1496e01478aSPaul Walmsley [0] = PWRDM_POWER_ON, /* wkup_bank */ 1506e01478aSPaul Walmsley }, 1516e01478aSPaul Walmsley }; 1526e01478aSPaul Walmsley 1536e01478aSPaul Walmsley /* cpu0_44xx_pwrdm: MPU0 processor and Neon coprocessor power domain */ 1546e01478aSPaul Walmsley static struct powerdomain cpu0_44xx_pwrdm = { 1556e01478aSPaul Walmsley .name = "cpu0_pwrdm", 156cdb54c44SPaul Walmsley .prcm_offs = OMAP4430_PRCM_MPU_CPU0_INST, 157a64bb9cdSPaul Walmsley .prcm_partition = OMAP4430_PRCM_MPU_PARTITION, 1586e01478aSPaul Walmsley .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 1596e01478aSPaul Walmsley .pwrsts = PWRSTS_OFF_RET_ON, 1606e01478aSPaul Walmsley .pwrsts_logic_ret = PWRSTS_OFF_RET, 1616e01478aSPaul Walmsley .banks = 1, 1626e01478aSPaul Walmsley .pwrsts_mem_ret = { 1636e01478aSPaul Walmsley [0] = PWRSTS_OFF_RET, /* cpu0_l1 */ 1646e01478aSPaul Walmsley }, 1656e01478aSPaul Walmsley .pwrsts_mem_on = { 1666e01478aSPaul Walmsley [0] = PWRDM_POWER_ON, /* cpu0_l1 */ 1676e01478aSPaul Walmsley }, 1686e01478aSPaul Walmsley }; 1696e01478aSPaul Walmsley 1706e01478aSPaul Walmsley /* cpu1_44xx_pwrdm: MPU1 processor and Neon coprocessor power domain */ 1716e01478aSPaul Walmsley static struct powerdomain cpu1_44xx_pwrdm = { 1726e01478aSPaul Walmsley .name = "cpu1_pwrdm", 173cdb54c44SPaul Walmsley .prcm_offs = OMAP4430_PRCM_MPU_CPU1_INST, 174a64bb9cdSPaul Walmsley .prcm_partition = OMAP4430_PRCM_MPU_PARTITION, 1756e01478aSPaul Walmsley .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 1766e01478aSPaul Walmsley .pwrsts = PWRSTS_OFF_RET_ON, 1776e01478aSPaul Walmsley .pwrsts_logic_ret = PWRSTS_OFF_RET, 1786e01478aSPaul Walmsley .banks = 1, 1796e01478aSPaul Walmsley .pwrsts_mem_ret = { 1806e01478aSPaul Walmsley [0] = PWRSTS_OFF_RET, /* cpu1_l1 */ 1816e01478aSPaul Walmsley }, 1826e01478aSPaul Walmsley .pwrsts_mem_on = { 1836e01478aSPaul Walmsley [0] = PWRDM_POWER_ON, /* cpu1_l1 */ 1846e01478aSPaul Walmsley }, 1856e01478aSPaul Walmsley }; 1866e01478aSPaul Walmsley 1876e01478aSPaul Walmsley /* emu_44xx_pwrdm: Emulation power domain */ 1886e01478aSPaul Walmsley static struct powerdomain emu_44xx_pwrdm = { 1896e01478aSPaul Walmsley .name = "emu_pwrdm", 190cdb54c44SPaul Walmsley .prcm_offs = OMAP4430_PRM_EMU_INST, 191a64bb9cdSPaul Walmsley .prcm_partition = OMAP4430_PRM_PARTITION, 1926e01478aSPaul Walmsley .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 1936e01478aSPaul Walmsley .pwrsts = PWRSTS_OFF_ON, 1946e01478aSPaul Walmsley .banks = 1, 1956e01478aSPaul Walmsley .pwrsts_mem_ret = { 1966e01478aSPaul Walmsley [0] = PWRDM_POWER_OFF, /* emu_bank */ 1976e01478aSPaul Walmsley }, 1986e01478aSPaul Walmsley .pwrsts_mem_on = { 1996e01478aSPaul Walmsley [0] = PWRDM_POWER_ON, /* emu_bank */ 2006e01478aSPaul Walmsley }, 2016e01478aSPaul Walmsley }; 2026e01478aSPaul Walmsley 2036e01478aSPaul Walmsley /* mpu_44xx_pwrdm: Modena processor and the Neon coprocessor power domain */ 2046e01478aSPaul Walmsley static struct powerdomain mpu_44xx_pwrdm = { 2056e01478aSPaul Walmsley .name = "mpu_pwrdm", 206cdb54c44SPaul Walmsley .prcm_offs = OMAP4430_PRM_MPU_INST, 207a64bb9cdSPaul Walmsley .prcm_partition = OMAP4430_PRM_PARTITION, 2086e01478aSPaul Walmsley .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 2096e01478aSPaul Walmsley .pwrsts = PWRSTS_OFF_RET_ON, 2106e01478aSPaul Walmsley .pwrsts_logic_ret = PWRSTS_OFF_RET, 2116e01478aSPaul Walmsley .banks = 3, 2126e01478aSPaul Walmsley .pwrsts_mem_ret = { 2136e01478aSPaul Walmsley [0] = PWRSTS_OFF_RET, /* mpu_l1 */ 2146e01478aSPaul Walmsley [1] = PWRSTS_OFF_RET, /* mpu_l2 */ 2156e01478aSPaul Walmsley [2] = PWRDM_POWER_RET, /* mpu_ram */ 2166e01478aSPaul Walmsley }, 2176e01478aSPaul Walmsley .pwrsts_mem_on = { 2186e01478aSPaul Walmsley [0] = PWRDM_POWER_ON, /* mpu_l1 */ 2196e01478aSPaul Walmsley [1] = PWRDM_POWER_ON, /* mpu_l2 */ 2206e01478aSPaul Walmsley [2] = PWRDM_POWER_ON, /* mpu_ram */ 2216e01478aSPaul Walmsley }, 2226e01478aSPaul Walmsley }; 2236e01478aSPaul Walmsley 2246e01478aSPaul Walmsley /* ivahd_44xx_pwrdm: IVA-HD power domain */ 2256e01478aSPaul Walmsley static struct powerdomain ivahd_44xx_pwrdm = { 2266e01478aSPaul Walmsley .name = "ivahd_pwrdm", 227cdb54c44SPaul Walmsley .prcm_offs = OMAP4430_PRM_IVAHD_INST, 228a64bb9cdSPaul Walmsley .prcm_partition = OMAP4430_PRM_PARTITION, 2296e01478aSPaul Walmsley .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 2306e01478aSPaul Walmsley .pwrsts = PWRSTS_OFF_RET_ON, 2316e01478aSPaul Walmsley .pwrsts_logic_ret = PWRDM_POWER_OFF, 2326e01478aSPaul Walmsley .banks = 4, 2336e01478aSPaul Walmsley .pwrsts_mem_ret = { 2346e01478aSPaul Walmsley [0] = PWRDM_POWER_OFF, /* hwa_mem */ 2356e01478aSPaul Walmsley [1] = PWRSTS_OFF_RET, /* sl2_mem */ 2366e01478aSPaul Walmsley [2] = PWRSTS_OFF_RET, /* tcm1_mem */ 2376e01478aSPaul Walmsley [3] = PWRSTS_OFF_RET, /* tcm2_mem */ 2386e01478aSPaul Walmsley }, 2396e01478aSPaul Walmsley .pwrsts_mem_on = { 2406e01478aSPaul Walmsley [0] = PWRDM_POWER_ON, /* hwa_mem */ 2416e01478aSPaul Walmsley [1] = PWRDM_POWER_ON, /* sl2_mem */ 2426e01478aSPaul Walmsley [2] = PWRDM_POWER_ON, /* tcm1_mem */ 2436e01478aSPaul Walmsley [3] = PWRDM_POWER_ON, /* tcm2_mem */ 2446e01478aSPaul Walmsley }, 2456e01478aSPaul Walmsley .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, 2466e01478aSPaul Walmsley }; 2476e01478aSPaul Walmsley 2486e01478aSPaul Walmsley /* cam_44xx_pwrdm: Camera subsystem power domain */ 2496e01478aSPaul Walmsley static struct powerdomain cam_44xx_pwrdm = { 2506e01478aSPaul Walmsley .name = "cam_pwrdm", 251cdb54c44SPaul Walmsley .prcm_offs = OMAP4430_PRM_CAM_INST, 252a64bb9cdSPaul Walmsley .prcm_partition = OMAP4430_PRM_PARTITION, 2536e01478aSPaul Walmsley .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 2546e01478aSPaul Walmsley .pwrsts = PWRSTS_OFF_ON, 2556e01478aSPaul Walmsley .banks = 1, 2566e01478aSPaul Walmsley .pwrsts_mem_ret = { 2576e01478aSPaul Walmsley [0] = PWRDM_POWER_OFF, /* cam_mem */ 2586e01478aSPaul Walmsley }, 2596e01478aSPaul Walmsley .pwrsts_mem_on = { 2606e01478aSPaul Walmsley [0] = PWRDM_POWER_ON, /* cam_mem */ 2616e01478aSPaul Walmsley }, 2626e01478aSPaul Walmsley .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, 2636e01478aSPaul Walmsley }; 2646e01478aSPaul Walmsley 2656e01478aSPaul Walmsley /* l3init_44xx_pwrdm: L3 initators pheripherals power domain */ 2666e01478aSPaul Walmsley static struct powerdomain l3init_44xx_pwrdm = { 2676e01478aSPaul Walmsley .name = "l3init_pwrdm", 268cdb54c44SPaul Walmsley .prcm_offs = OMAP4430_PRM_L3INIT_INST, 269a64bb9cdSPaul Walmsley .prcm_partition = OMAP4430_PRM_PARTITION, 2706e01478aSPaul Walmsley .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 2716e01478aSPaul Walmsley .pwrsts = PWRSTS_OFF_RET_ON, 2726e01478aSPaul Walmsley .pwrsts_logic_ret = PWRSTS_OFF_RET, 2736e01478aSPaul Walmsley .banks = 1, 2746e01478aSPaul Walmsley .pwrsts_mem_ret = { 2756e01478aSPaul Walmsley [0] = PWRDM_POWER_OFF, /* l3init_bank1 */ 2766e01478aSPaul Walmsley }, 2776e01478aSPaul Walmsley .pwrsts_mem_on = { 2786e01478aSPaul Walmsley [0] = PWRDM_POWER_ON, /* l3init_bank1 */ 2796e01478aSPaul Walmsley }, 2806e01478aSPaul Walmsley .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, 2816e01478aSPaul Walmsley }; 2826e01478aSPaul Walmsley 2836e01478aSPaul Walmsley /* l4per_44xx_pwrdm: Target peripherals power domain */ 2846e01478aSPaul Walmsley static struct powerdomain l4per_44xx_pwrdm = { 2856e01478aSPaul Walmsley .name = "l4per_pwrdm", 286cdb54c44SPaul Walmsley .prcm_offs = OMAP4430_PRM_L4PER_INST, 287a64bb9cdSPaul Walmsley .prcm_partition = OMAP4430_PRM_PARTITION, 2886e01478aSPaul Walmsley .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 2896e01478aSPaul Walmsley .pwrsts = PWRSTS_OFF_RET_ON, 2906e01478aSPaul Walmsley .pwrsts_logic_ret = PWRSTS_OFF_RET, 2916e01478aSPaul Walmsley .banks = 2, 2926e01478aSPaul Walmsley .pwrsts_mem_ret = { 2936e01478aSPaul Walmsley [0] = PWRDM_POWER_OFF, /* nonretained_bank */ 2946e01478aSPaul Walmsley [1] = PWRDM_POWER_RET, /* retained_bank */ 2956e01478aSPaul Walmsley }, 2966e01478aSPaul Walmsley .pwrsts_mem_on = { 2976e01478aSPaul Walmsley [0] = PWRDM_POWER_ON, /* nonretained_bank */ 2986e01478aSPaul Walmsley [1] = PWRDM_POWER_ON, /* retained_bank */ 2996e01478aSPaul Walmsley }, 3006e01478aSPaul Walmsley .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, 3016e01478aSPaul Walmsley }; 3026e01478aSPaul Walmsley 3036e01478aSPaul Walmsley /* 3046e01478aSPaul Walmsley * always_on_core_44xx_pwrdm: Always ON logic that sits in VDD_CORE voltage 3056e01478aSPaul Walmsley * domain 3066e01478aSPaul Walmsley */ 3076e01478aSPaul Walmsley static struct powerdomain always_on_core_44xx_pwrdm = { 3086e01478aSPaul Walmsley .name = "always_on_core_pwrdm", 309cdb54c44SPaul Walmsley .prcm_offs = OMAP4430_PRM_ALWAYS_ON_INST, 310a64bb9cdSPaul Walmsley .prcm_partition = OMAP4430_PRM_PARTITION, 3116e01478aSPaul Walmsley .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 3126e01478aSPaul Walmsley .pwrsts = PWRSTS_ON, 3136e01478aSPaul Walmsley }; 3146e01478aSPaul Walmsley 3156e01478aSPaul Walmsley /* cefuse_44xx_pwrdm: Customer efuse controller power domain */ 3166e01478aSPaul Walmsley static struct powerdomain cefuse_44xx_pwrdm = { 3176e01478aSPaul Walmsley .name = "cefuse_pwrdm", 318cdb54c44SPaul Walmsley .prcm_offs = OMAP4430_PRM_CEFUSE_INST, 319a64bb9cdSPaul Walmsley .prcm_partition = OMAP4430_PRM_PARTITION, 3206e01478aSPaul Walmsley .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), 3216e01478aSPaul Walmsley .pwrsts = PWRSTS_OFF_ON, 3226e01478aSPaul Walmsley }; 3236e01478aSPaul Walmsley 3246e01478aSPaul Walmsley /* 3256e01478aSPaul Walmsley * The following power domains are not under SW control 3266e01478aSPaul Walmsley * 3276e01478aSPaul Walmsley * always_on_iva 3286e01478aSPaul Walmsley * always_on_mpu 3296e01478aSPaul Walmsley * stdefuse 3306e01478aSPaul Walmsley */ 3316e01478aSPaul Walmsley 3326e01478aSPaul Walmsley /* As powerdomains are added or removed above, this list must also be changed */ 3336e01478aSPaul Walmsley static struct powerdomain *powerdomains_omap44xx[] __initdata = { 3346e01478aSPaul Walmsley &core_44xx_pwrdm, 3356e01478aSPaul Walmsley &gfx_44xx_pwrdm, 3366e01478aSPaul Walmsley &abe_44xx_pwrdm, 3376e01478aSPaul Walmsley &dss_44xx_pwrdm, 3386e01478aSPaul Walmsley &tesla_44xx_pwrdm, 3396e01478aSPaul Walmsley &wkup_44xx_pwrdm, 3406e01478aSPaul Walmsley &cpu0_44xx_pwrdm, 3416e01478aSPaul Walmsley &cpu1_44xx_pwrdm, 3426e01478aSPaul Walmsley &emu_44xx_pwrdm, 3436e01478aSPaul Walmsley &mpu_44xx_pwrdm, 3446e01478aSPaul Walmsley &ivahd_44xx_pwrdm, 3456e01478aSPaul Walmsley &cam_44xx_pwrdm, 3466e01478aSPaul Walmsley &l3init_44xx_pwrdm, 3476e01478aSPaul Walmsley &l4per_44xx_pwrdm, 3486e01478aSPaul Walmsley &always_on_core_44xx_pwrdm, 3496e01478aSPaul Walmsley &cefuse_44xx_pwrdm, 3506e01478aSPaul Walmsley NULL 3516e01478aSPaul Walmsley }; 3526e01478aSPaul Walmsley 3536e01478aSPaul Walmsley void __init omap44xx_powerdomains_init(void) 3546e01478aSPaul Walmsley { 3556e01478aSPaul Walmsley pwrdm_init(powerdomains_omap44xx, &omap4_pwrdm_operations); 3566e01478aSPaul Walmsley } 357