1 /* 2 * OMAP2/3 Power Management Routines 3 * 4 * Copyright (C) 2008 Nokia Corporation 5 * Jouni Hogander 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 */ 11 #ifndef __ARCH_ARM_MACH_OMAP2_PM_H 12 #define __ARCH_ARM_MACH_OMAP2_PM_H 13 14 #include <linux/err.h> 15 16 #include "powerdomain.h" 17 18 extern void *omap3_secure_ram_storage; 19 extern void omap3_pm_off_mode_enable(int); 20 extern void omap_sram_idle(void); 21 extern int omap3_can_sleep(void); 22 extern int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state); 23 extern int omap3_idle_init(void); 24 25 #if defined(CONFIG_PM_OPP) 26 extern int omap3_opp_init(void); 27 extern int omap4_opp_init(void); 28 #else 29 static inline int omap3_opp_init(void) 30 { 31 return -EINVAL; 32 } 33 static inline int omap4_opp_init(void) 34 { 35 return -EINVAL; 36 } 37 #endif 38 39 /* 40 * cpuidle mach specific parameters 41 * 42 * The board code can override the default C-states definition using 43 * omap3_pm_init_cpuidle 44 */ 45 struct cpuidle_params { 46 u32 exit_latency; /* exit_latency = sleep + wake-up latencies */ 47 u32 target_residency; 48 u8 valid; /* validates the C-state */ 49 }; 50 51 #if defined(CONFIG_PM) && defined(CONFIG_CPU_IDLE) 52 extern void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params); 53 #else 54 static 55 inline void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params) 56 { 57 } 58 #endif 59 60 extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm); 61 extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state); 62 63 #ifdef CONFIG_PM_DEBUG 64 extern u32 enable_off_mode; 65 #else 66 #define enable_off_mode 0 67 #endif 68 69 #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) 70 extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev); 71 #else 72 #define pm_dbg_update_time(pwrdm, prev) do {} while (0); 73 #endif /* CONFIG_PM_DEBUG */ 74 75 /* 24xx */ 76 extern void omap24xx_idle_loop_suspend(void); 77 extern unsigned int omap24xx_idle_loop_suspend_sz; 78 79 extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem *sdrc_dlla_ctrl, 80 void __iomem *sdrc_power); 81 extern unsigned int omap24xx_cpu_suspend_sz; 82 83 /* 3xxx */ 84 extern void omap34xx_cpu_suspend(int save_state); 85 86 /* omap3_do_wfi function pointer and size, for copy to SRAM */ 87 extern void omap3_do_wfi(void); 88 extern unsigned int omap3_do_wfi_sz; 89 /* ... and its pointer from SRAM after copy */ 90 extern void (*omap3_do_wfi_sram)(void); 91 92 /* save_secure_ram_context function pointer and size, for copy to SRAM */ 93 extern int save_secure_ram_context(u32 *addr); 94 extern unsigned int save_secure_ram_context_sz; 95 96 extern void omap3_save_scratchpad_contents(void); 97 98 #define PM_RTA_ERRATUM_i608 (1 << 0) 99 #define PM_SDRC_WAKEUP_ERRATUM_i583 (1 << 1) 100 101 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) 102 extern u16 pm34xx_errata; 103 #define IS_PM34XX_ERRATUM(id) (pm34xx_errata & (id)) 104 extern void enable_omap3630_toggle_l2_on_restore(void); 105 #else 106 #define IS_PM34XX_ERRATUM(id) 0 107 static inline void enable_omap3630_toggle_l2_on_restore(void) { } 108 #endif /* defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) */ 109 110 #ifdef CONFIG_OMAP_SMARTREFLEX 111 extern int omap_devinit_smartreflex(void); 112 extern void omap_enable_smartreflex_on_init(void); 113 #else 114 static inline int omap_devinit_smartreflex(void) 115 { 116 return -EINVAL; 117 } 118 119 static inline void omap_enable_smartreflex_on_init(void) {} 120 #endif 121 122 #ifdef CONFIG_TWL4030_CORE 123 extern int omap3_twl_init(void); 124 extern int omap4_twl_init(void); 125 extern int omap3_twl_set_sr_bit(bool enable); 126 #else 127 static inline int omap3_twl_init(void) 128 { 129 return -EINVAL; 130 } 131 static inline int omap4_twl_init(void) 132 { 133 return -EINVAL; 134 } 135 #endif 136 137 #endif 138