xref: /openbmc/linux/arch/arm/mach-omap2/pm.h (revision 3e30a927)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * OMAP2/3 Power Management Routines
4  *
5  * Copyright (C) 2008 Nokia Corporation
6  * Jouni Hogander
7  */
8 #ifndef __ARCH_ARM_MACH_OMAP2_PM_H
9 #define __ARCH_ARM_MACH_OMAP2_PM_H
10 
11 #include <linux/err.h>
12 
13 #include "powerdomain.h"
14 
15 #ifdef CONFIG_CPU_IDLE
16 extern int __init omap3_idle_init(void);
17 extern int __init omap4_idle_init(void);
18 #else
19 static inline int omap3_idle_init(void)
20 {
21 	return 0;
22 }
23 
24 static inline int omap4_idle_init(void)
25 {
26 	return 0;
27 }
28 #endif
29 
30 extern void *omap3_secure_ram_storage;
31 extern void omap3_pm_off_mode_enable(int);
32 extern void omap_sram_idle(void);
33 extern int omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused);
34 
35 #if defined(CONFIG_PM_OPP)
36 extern int omap3_opp_init(void);
37 extern int omap4_opp_init(void);
38 #else
39 static inline int omap3_opp_init(void)
40 {
41 	return -EINVAL;
42 }
43 static inline int omap4_opp_init(void)
44 {
45 	return -EINVAL;
46 }
47 #endif
48 
49 extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm);
50 extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state);
51 
52 #ifdef CONFIG_PM_DEBUG
53 extern u32 enable_off_mode;
54 #else
55 #define enable_off_mode 0
56 #endif
57 
58 #if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
59 extern void pm_dbg_update_time(struct powerdomain *pwrdm, int prev);
60 #else
61 #define pm_dbg_update_time(pwrdm, prev) do {} while (0);
62 #endif /* CONFIG_PM_DEBUG */
63 
64 /* 24xx */
65 extern void omap24xx_idle_loop_suspend(void);
66 extern unsigned int omap24xx_idle_loop_suspend_sz;
67 
68 extern void omap24xx_cpu_suspend(u32 dll_ctrl, void __iomem *sdrc_dlla_ctrl,
69 					void __iomem *sdrc_power);
70 extern unsigned int omap24xx_cpu_suspend_sz;
71 
72 /* 3xxx */
73 extern void omap34xx_cpu_suspend(int save_state);
74 
75 /* omap3_do_wfi function pointer and size, for copy to SRAM */
76 extern void omap3_do_wfi(void);
77 extern unsigned int omap3_do_wfi_sz;
78 /* ... and its pointer from SRAM after copy */
79 extern void (*omap3_do_wfi_sram)(void);
80 
81 extern struct am33xx_pm_sram_addr am33xx_pm_sram;
82 extern struct am33xx_pm_sram_addr am43xx_pm_sram;
83 
84 extern void omap3_save_scratchpad_contents(void);
85 
86 #define PM_RTA_ERRATUM_i608		(1 << 0)
87 #define PM_SDRC_WAKEUP_ERRATUM_i583	(1 << 1)
88 #define PM_PER_MEMORIES_ERRATUM_i582	(1 << 2)
89 
90 #if defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3)
91 extern u16 pm34xx_errata;
92 #define IS_PM34XX_ERRATUM(id)		(pm34xx_errata & (id))
93 extern void enable_omap3630_toggle_l2_on_restore(void);
94 #else
95 #define IS_PM34XX_ERRATUM(id)		0
96 static inline void enable_omap3630_toggle_l2_on_restore(void) { }
97 #endif		/* defined(CONFIG_PM) && defined(CONFIG_ARCH_OMAP3) */
98 
99 #define PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD	(1 << 0)
100 #define PM_OMAP4_CPU_OSWR_DISABLE		(1 << 1)
101 
102 #if defined(CONFIG_PM) && (defined(CONFIG_ARCH_OMAP4) ||\
103 	   defined(CONFIG_SOC_OMAP5) || defined(CONFIG_SOC_DRA7XX))
104 extern u16 pm44xx_errata;
105 #define IS_PM44XX_ERRATUM(id)		(pm44xx_errata & (id))
106 #else
107 #define IS_PM44XX_ERRATUM(id)		0
108 #endif
109 
110 #define OMAP4_VP_CONFIG_ERROROFFSET	0x00
111 #define OMAP4_VP_VSTEPMIN_VSTEPMIN	0x01
112 #define OMAP4_VP_VSTEPMAX_VSTEPMAX	0x04
113 #define OMAP4_VP_VLIMITTO_TIMEOUT_US	200
114 
115 #ifdef CONFIG_POWER_AVS_OMAP
116 extern int omap_devinit_smartreflex(void);
117 extern void omap_enable_smartreflex_on_init(void);
118 #else
119 static inline int omap_devinit_smartreflex(void)
120 {
121 	return -EINVAL;
122 }
123 
124 static inline void omap_enable_smartreflex_on_init(void) {}
125 #endif
126 
127 #ifdef CONFIG_TWL4030_CORE
128 extern int omap3_twl_init(void);
129 extern int omap4_twl_init(void);
130 extern int omap3_twl_set_sr_bit(bool enable);
131 #else
132 static inline int omap3_twl_init(void)
133 {
134 	return -EINVAL;
135 }
136 static inline int omap4_twl_init(void)
137 {
138 	return -EINVAL;
139 }
140 #endif
141 
142 #if IS_ENABLED(CONFIG_MFD_CPCAP)
143 extern int omap4_cpcap_init(void);
144 #else
145 static inline int omap4_cpcap_init(void)
146 {
147 	return -EINVAL;
148 }
149 #endif
150 
151 #ifdef CONFIG_PM
152 extern void omap_pm_setup_oscillator(u32 tstart, u32 tshut);
153 extern void omap_pm_get_oscillator(u32 *tstart, u32 *tshut);
154 extern void omap_pm_setup_sr_i2c_pcb_length(u32 mm);
155 #else
156 static inline void omap_pm_setup_oscillator(u32 tstart, u32 tshut) { }
157 static inline void omap_pm_get_oscillator(u32 *tstart, u32 *tshut) { *tstart = *tshut = 0; }
158 static inline void omap_pm_setup_sr_i2c_pcb_length(u32 mm) { }
159 #endif
160 
161 #ifdef CONFIG_SUSPEND
162 void omap_common_suspend_init(void *pm_suspend);
163 #else
164 static inline void omap_common_suspend_init(void *pm_suspend)
165 {
166 }
167 #endif /* CONFIG_SUSPEND */
168 #endif
169