1 /* 2 * OMAP Power Management debug routines 3 * 4 * Copyright (C) 2005 Texas Instruments, Inc. 5 * Copyright (C) 2006-2008 Nokia Corporation 6 * 7 * Written by: 8 * Richard Woodruff <r-woodruff2@ti.com> 9 * Tony Lindgren 10 * Juha Yrjola 11 * Amit Kucheria <amit.kucheria@nokia.com> 12 * Igor Stoppa <igor.stoppa@nokia.com> 13 * Jouni Hogander 14 * 15 * Based on pm.c for omap2 16 * 17 * This program is free software; you can redistribute it and/or modify 18 * it under the terms of the GNU General Public License version 2 as 19 * published by the Free Software Foundation. 20 */ 21 22 #include <linux/kernel.h> 23 #include <linux/sched.h> 24 #include <linux/clk.h> 25 #include <linux/err.h> 26 #include <linux/io.h> 27 #include <linux/module.h> 28 29 #include <plat/clock.h> 30 #include <plat/board.h> 31 #include <plat/powerdomain.h> 32 #include <plat/clockdomain.h> 33 34 #include "prm.h" 35 #include "cm.h" 36 #include "pm.h" 37 38 int omap2_pm_debug; 39 40 #define DUMP_PRM_MOD_REG(mod, reg) \ 41 regs[reg_count].name = #mod "." #reg; \ 42 regs[reg_count++].val = prm_read_mod_reg(mod, reg) 43 #define DUMP_CM_MOD_REG(mod, reg) \ 44 regs[reg_count].name = #mod "." #reg; \ 45 regs[reg_count++].val = cm_read_mod_reg(mod, reg) 46 #define DUMP_PRM_REG(reg) \ 47 regs[reg_count].name = #reg; \ 48 regs[reg_count++].val = __raw_readl(reg) 49 #define DUMP_CM_REG(reg) \ 50 regs[reg_count].name = #reg; \ 51 regs[reg_count++].val = __raw_readl(reg) 52 #define DUMP_INTC_REG(reg, off) \ 53 regs[reg_count].name = #reg; \ 54 regs[reg_count++].val = \ 55 __raw_readl(OMAP2_L4_IO_ADDRESS(0x480fe000 + (off))) 56 57 void omap2_pm_dump(int mode, int resume, unsigned int us) 58 { 59 struct reg { 60 const char *name; 61 u32 val; 62 } regs[32]; 63 int reg_count = 0, i; 64 const char *s1 = NULL, *s2 = NULL; 65 66 if (!resume) { 67 #if 0 68 /* MPU */ 69 DUMP_PRM_MOD_REG(OCP_MOD, OMAP2_PRM_IRQENABLE_MPU_OFFSET); 70 DUMP_CM_MOD_REG(MPU_MOD, CM_CLKSTCTRL); 71 DUMP_PRM_MOD_REG(MPU_MOD, PM_PWSTCTRL); 72 DUMP_PRM_MOD_REG(MPU_MOD, PM_PWSTST); 73 DUMP_PRM_MOD_REG(MPU_MOD, PM_WKDEP); 74 #endif 75 #if 0 76 /* INTC */ 77 DUMP_INTC_REG(INTC_MIR0, 0x0084); 78 DUMP_INTC_REG(INTC_MIR1, 0x00a4); 79 DUMP_INTC_REG(INTC_MIR2, 0x00c4); 80 #endif 81 #if 0 82 DUMP_CM_MOD_REG(CORE_MOD, CM_FCLKEN1); 83 if (cpu_is_omap24xx()) { 84 DUMP_CM_MOD_REG(CORE_MOD, OMAP24XX_CM_FCLKEN2); 85 DUMP_PRM_MOD_REG(OMAP24XX_GR_MOD, 86 OMAP2_PRCM_CLKEMUL_CTRL_OFFSET); 87 DUMP_PRM_MOD_REG(OMAP24XX_GR_MOD, 88 OMAP2_PRCM_CLKSRC_CTRL_OFFSET); 89 } 90 DUMP_CM_MOD_REG(WKUP_MOD, CM_FCLKEN); 91 DUMP_CM_MOD_REG(CORE_MOD, CM_ICLKEN1); 92 DUMP_CM_MOD_REG(CORE_MOD, CM_ICLKEN2); 93 DUMP_CM_MOD_REG(WKUP_MOD, CM_ICLKEN); 94 DUMP_CM_MOD_REG(PLL_MOD, CM_CLKEN); 95 DUMP_CM_MOD_REG(PLL_MOD, CM_AUTOIDLE); 96 DUMP_PRM_MOD_REG(CORE_MOD, PM_PWSTST); 97 #endif 98 #if 0 99 /* DSP */ 100 if (cpu_is_omap24xx()) { 101 DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_FCLKEN); 102 DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_ICLKEN); 103 DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_IDLEST); 104 DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_AUTOIDLE); 105 DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_CLKSEL); 106 DUMP_CM_MOD_REG(OMAP24XX_DSP_MOD, CM_CLKSTCTRL); 107 DUMP_PRM_MOD_REG(OMAP24XX_DSP_MOD, RM_RSTCTRL); 108 DUMP_PRM_MOD_REG(OMAP24XX_DSP_MOD, RM_RSTST); 109 DUMP_PRM_MOD_REG(OMAP24XX_DSP_MOD, PM_PWSTCTRL); 110 DUMP_PRM_MOD_REG(OMAP24XX_DSP_MOD, PM_PWSTST); 111 } 112 #endif 113 } else { 114 DUMP_PRM_MOD_REG(CORE_MOD, PM_WKST1); 115 if (cpu_is_omap24xx()) 116 DUMP_PRM_MOD_REG(CORE_MOD, OMAP24XX_PM_WKST2); 117 DUMP_PRM_MOD_REG(WKUP_MOD, PM_WKST); 118 DUMP_PRM_MOD_REG(OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET); 119 #if 1 120 DUMP_INTC_REG(INTC_PENDING_IRQ0, 0x0098); 121 DUMP_INTC_REG(INTC_PENDING_IRQ1, 0x00b8); 122 DUMP_INTC_REG(INTC_PENDING_IRQ2, 0x00d8); 123 #endif 124 } 125 126 switch (mode) { 127 case 0: 128 s1 = "full"; 129 s2 = "retention"; 130 break; 131 case 1: 132 s1 = "MPU"; 133 s2 = "retention"; 134 break; 135 case 2: 136 s1 = "MPU"; 137 s2 = "idle"; 138 break; 139 } 140 141 if (!resume) 142 #ifdef CONFIG_NO_HZ 143 printk(KERN_INFO 144 "--- Going to %s %s (next timer after %u ms)\n", s1, s2, 145 jiffies_to_msecs(get_next_timer_interrupt(jiffies) - 146 jiffies)); 147 #else 148 printk(KERN_INFO "--- Going to %s %s\n", s1, s2); 149 #endif 150 else 151 printk(KERN_INFO "--- Woke up (slept for %u.%03u ms)\n", 152 us / 1000, us % 1000); 153 154 for (i = 0; i < reg_count; i++) 155 printk(KERN_INFO "%-20s: 0x%08x\n", regs[i].name, regs[i].val); 156 } 157 158 #ifdef CONFIG_DEBUG_FS 159 #include <linux/debugfs.h> 160 #include <linux/seq_file.h> 161 162 static void pm_dbg_regset_store(u32 *ptr); 163 164 struct dentry *pm_dbg_dir; 165 166 static int pm_dbg_init_done; 167 168 static int __init pm_dbg_init(void); 169 170 enum { 171 DEBUG_FILE_COUNTERS = 0, 172 DEBUG_FILE_TIMERS, 173 }; 174 175 struct pm_module_def { 176 char name[8]; /* Name of the module */ 177 short type; /* CM or PRM */ 178 unsigned short offset; 179 int low; /* First register address on this module */ 180 int high; /* Last register address on this module */ 181 }; 182 183 #define MOD_CM 0 184 #define MOD_PRM 1 185 186 static const struct pm_module_def *pm_dbg_reg_modules; 187 static const struct pm_module_def omap3_pm_reg_modules[] = { 188 { "IVA2", MOD_CM, OMAP3430_IVA2_MOD, 0, 0x4c }, 189 { "OCP", MOD_CM, OCP_MOD, 0, 0x10 }, 190 { "MPU", MOD_CM, MPU_MOD, 4, 0x4c }, 191 { "CORE", MOD_CM, CORE_MOD, 0, 0x4c }, 192 { "SGX", MOD_CM, OMAP3430ES2_SGX_MOD, 0, 0x4c }, 193 { "WKUP", MOD_CM, WKUP_MOD, 0, 0x40 }, 194 { "CCR", MOD_CM, PLL_MOD, 0, 0x70 }, 195 { "DSS", MOD_CM, OMAP3430_DSS_MOD, 0, 0x4c }, 196 { "CAM", MOD_CM, OMAP3430_CAM_MOD, 0, 0x4c }, 197 { "PER", MOD_CM, OMAP3430_PER_MOD, 0, 0x4c }, 198 { "EMU", MOD_CM, OMAP3430_EMU_MOD, 0x40, 0x54 }, 199 { "NEON", MOD_CM, OMAP3430_NEON_MOD, 0x20, 0x48 }, 200 { "USB", MOD_CM, OMAP3430ES2_USBHOST_MOD, 0, 0x4c }, 201 202 { "IVA2", MOD_PRM, OMAP3430_IVA2_MOD, 0x50, 0xfc }, 203 { "OCP", MOD_PRM, OCP_MOD, 4, 0x1c }, 204 { "MPU", MOD_PRM, MPU_MOD, 0x58, 0xe8 }, 205 { "CORE", MOD_PRM, CORE_MOD, 0x58, 0xf8 }, 206 { "SGX", MOD_PRM, OMAP3430ES2_SGX_MOD, 0x58, 0xe8 }, 207 { "WKUP", MOD_PRM, WKUP_MOD, 0xa0, 0xb0 }, 208 { "CCR", MOD_PRM, PLL_MOD, 0x40, 0x70 }, 209 { "DSS", MOD_PRM, OMAP3430_DSS_MOD, 0x58, 0xe8 }, 210 { "CAM", MOD_PRM, OMAP3430_CAM_MOD, 0x58, 0xe8 }, 211 { "PER", MOD_PRM, OMAP3430_PER_MOD, 0x58, 0xe8 }, 212 { "EMU", MOD_PRM, OMAP3430_EMU_MOD, 0x58, 0xe4 }, 213 { "GLBL", MOD_PRM, OMAP3430_GR_MOD, 0x20, 0xe4 }, 214 { "NEON", MOD_PRM, OMAP3430_NEON_MOD, 0x58, 0xe8 }, 215 { "USB", MOD_PRM, OMAP3430ES2_USBHOST_MOD, 0x58, 0xe8 }, 216 { "", 0, 0, 0, 0 }, 217 }; 218 219 #define PM_DBG_MAX_REG_SETS 4 220 221 static void *pm_dbg_reg_set[PM_DBG_MAX_REG_SETS]; 222 223 static int pm_dbg_get_regset_size(void) 224 { 225 static int regset_size; 226 227 if (regset_size == 0) { 228 int i = 0; 229 230 while (pm_dbg_reg_modules[i].name[0] != 0) { 231 regset_size += pm_dbg_reg_modules[i].high + 232 4 - pm_dbg_reg_modules[i].low; 233 i++; 234 } 235 } 236 return regset_size; 237 } 238 239 static int pm_dbg_show_regs(struct seq_file *s, void *unused) 240 { 241 int i, j; 242 unsigned long val; 243 int reg_set = (int)s->private; 244 u32 *ptr; 245 void *store = NULL; 246 int regs; 247 int linefeed; 248 249 if (reg_set == 0) { 250 store = kmalloc(pm_dbg_get_regset_size(), GFP_KERNEL); 251 ptr = store; 252 pm_dbg_regset_store(ptr); 253 } else { 254 ptr = pm_dbg_reg_set[reg_set - 1]; 255 } 256 257 i = 0; 258 259 while (pm_dbg_reg_modules[i].name[0] != 0) { 260 regs = 0; 261 linefeed = 0; 262 if (pm_dbg_reg_modules[i].type == MOD_CM) 263 seq_printf(s, "MOD: CM_%s (%08x)\n", 264 pm_dbg_reg_modules[i].name, 265 (u32)(OMAP3430_CM_BASE + 266 pm_dbg_reg_modules[i].offset)); 267 else 268 seq_printf(s, "MOD: PRM_%s (%08x)\n", 269 pm_dbg_reg_modules[i].name, 270 (u32)(OMAP3430_PRM_BASE + 271 pm_dbg_reg_modules[i].offset)); 272 273 for (j = pm_dbg_reg_modules[i].low; 274 j <= pm_dbg_reg_modules[i].high; j += 4) { 275 val = *(ptr++); 276 if (val != 0) { 277 regs++; 278 if (linefeed) { 279 seq_printf(s, "\n"); 280 linefeed = 0; 281 } 282 seq_printf(s, " %02x => %08lx", j, val); 283 if (regs % 4 == 0) 284 linefeed = 1; 285 } 286 } 287 seq_printf(s, "\n"); 288 i++; 289 } 290 291 if (store != NULL) 292 kfree(store); 293 294 return 0; 295 } 296 297 static void pm_dbg_regset_store(u32 *ptr) 298 { 299 int i, j; 300 u32 val; 301 302 i = 0; 303 304 while (pm_dbg_reg_modules[i].name[0] != 0) { 305 for (j = pm_dbg_reg_modules[i].low; 306 j <= pm_dbg_reg_modules[i].high; j += 4) { 307 if (pm_dbg_reg_modules[i].type == MOD_CM) 308 val = cm_read_mod_reg( 309 pm_dbg_reg_modules[i].offset, j); 310 else 311 val = prm_read_mod_reg( 312 pm_dbg_reg_modules[i].offset, j); 313 *(ptr++) = val; 314 } 315 i++; 316 } 317 } 318 319 int pm_dbg_regset_save(int reg_set) 320 { 321 if (pm_dbg_reg_set[reg_set-1] == NULL) 322 return -EINVAL; 323 324 pm_dbg_regset_store(pm_dbg_reg_set[reg_set-1]); 325 326 return 0; 327 } 328 329 static const char pwrdm_state_names[][PWRDM_MAX_PWRSTS] = { 330 "OFF", 331 "RET", 332 "INA", 333 "ON" 334 }; 335 336 void pm_dbg_update_time(struct powerdomain *pwrdm, int prev) 337 { 338 s64 t; 339 340 if (!pm_dbg_init_done) 341 return ; 342 343 /* Update timer for previous state */ 344 t = sched_clock(); 345 346 pwrdm->state_timer[prev] += t - pwrdm->timer; 347 348 pwrdm->timer = t; 349 } 350 351 static int clkdm_dbg_show_counter(struct clockdomain *clkdm, void *user) 352 { 353 struct seq_file *s = (struct seq_file *)user; 354 355 if (strcmp(clkdm->name, "emu_clkdm") == 0 || 356 strcmp(clkdm->name, "wkup_clkdm") == 0 || 357 strncmp(clkdm->name, "dpll", 4) == 0) 358 return 0; 359 360 seq_printf(s, "%s->%s (%d)", clkdm->name, 361 clkdm->pwrdm.ptr->name, 362 atomic_read(&clkdm->usecount)); 363 seq_printf(s, "\n"); 364 365 return 0; 366 } 367 368 static int pwrdm_dbg_show_counter(struct powerdomain *pwrdm, void *user) 369 { 370 struct seq_file *s = (struct seq_file *)user; 371 int i; 372 373 if (strcmp(pwrdm->name, "emu_pwrdm") == 0 || 374 strcmp(pwrdm->name, "wkup_pwrdm") == 0 || 375 strncmp(pwrdm->name, "dpll", 4) == 0) 376 return 0; 377 378 if (pwrdm->state != pwrdm_read_pwrst(pwrdm)) 379 printk(KERN_ERR "pwrdm state mismatch(%s) %d != %d\n", 380 pwrdm->name, pwrdm->state, pwrdm_read_pwrst(pwrdm)); 381 382 seq_printf(s, "%s (%s)", pwrdm->name, 383 pwrdm_state_names[pwrdm->state]); 384 for (i = 0; i < PWRDM_MAX_PWRSTS; i++) 385 seq_printf(s, ",%s:%d", pwrdm_state_names[i], 386 pwrdm->state_counter[i]); 387 388 seq_printf(s, "\n"); 389 390 return 0; 391 } 392 393 static int pwrdm_dbg_show_timer(struct powerdomain *pwrdm, void *user) 394 { 395 struct seq_file *s = (struct seq_file *)user; 396 int i; 397 398 if (strcmp(pwrdm->name, "emu_pwrdm") == 0 || 399 strcmp(pwrdm->name, "wkup_pwrdm") == 0 || 400 strncmp(pwrdm->name, "dpll", 4) == 0) 401 return 0; 402 403 pwrdm_state_switch(pwrdm); 404 405 seq_printf(s, "%s (%s)", pwrdm->name, 406 pwrdm_state_names[pwrdm->state]); 407 408 for (i = 0; i < 4; i++) 409 seq_printf(s, ",%s:%lld", pwrdm_state_names[i], 410 pwrdm->state_timer[i]); 411 412 seq_printf(s, "\n"); 413 return 0; 414 } 415 416 static int pm_dbg_show_counters(struct seq_file *s, void *unused) 417 { 418 pwrdm_for_each(pwrdm_dbg_show_counter, s); 419 clkdm_for_each(clkdm_dbg_show_counter, s); 420 421 return 0; 422 } 423 424 static int pm_dbg_show_timers(struct seq_file *s, void *unused) 425 { 426 pwrdm_for_each(pwrdm_dbg_show_timer, s); 427 return 0; 428 } 429 430 static int pm_dbg_open(struct inode *inode, struct file *file) 431 { 432 switch ((int)inode->i_private) { 433 case DEBUG_FILE_COUNTERS: 434 return single_open(file, pm_dbg_show_counters, 435 &inode->i_private); 436 case DEBUG_FILE_TIMERS: 437 default: 438 return single_open(file, pm_dbg_show_timers, 439 &inode->i_private); 440 }; 441 } 442 443 static int pm_dbg_reg_open(struct inode *inode, struct file *file) 444 { 445 return single_open(file, pm_dbg_show_regs, inode->i_private); 446 } 447 448 static const struct file_operations debug_fops = { 449 .open = pm_dbg_open, 450 .read = seq_read, 451 .llseek = seq_lseek, 452 .release = single_release, 453 }; 454 455 static const struct file_operations debug_reg_fops = { 456 .open = pm_dbg_reg_open, 457 .read = seq_read, 458 .llseek = seq_lseek, 459 .release = single_release, 460 }; 461 462 int pm_dbg_regset_init(int reg_set) 463 { 464 char name[2]; 465 466 if (!pm_dbg_init_done) 467 pm_dbg_init(); 468 469 if (reg_set < 1 || reg_set > PM_DBG_MAX_REG_SETS || 470 pm_dbg_reg_set[reg_set-1] != NULL) 471 return -EINVAL; 472 473 pm_dbg_reg_set[reg_set-1] = 474 kmalloc(pm_dbg_get_regset_size(), GFP_KERNEL); 475 476 if (pm_dbg_reg_set[reg_set-1] == NULL) 477 return -ENOMEM; 478 479 if (pm_dbg_dir != NULL) { 480 sprintf(name, "%d", reg_set); 481 482 (void) debugfs_create_file(name, S_IRUGO, 483 pm_dbg_dir, (void *)reg_set, &debug_reg_fops); 484 } 485 486 return 0; 487 } 488 489 static int pwrdm_suspend_get(void *data, u64 *val) 490 { 491 int ret; 492 ret = omap3_pm_get_suspend_state((struct powerdomain *)data); 493 *val = ret; 494 495 if (ret >= 0) 496 return 0; 497 return *val; 498 } 499 500 static int pwrdm_suspend_set(void *data, u64 val) 501 { 502 return omap3_pm_set_suspend_state((struct powerdomain *)data, (int)val); 503 } 504 505 DEFINE_SIMPLE_ATTRIBUTE(pwrdm_suspend_fops, pwrdm_suspend_get, 506 pwrdm_suspend_set, "%llu\n"); 507 508 static int __init pwrdms_setup(struct powerdomain *pwrdm, void *dir) 509 { 510 int i; 511 s64 t; 512 struct dentry *d; 513 514 t = sched_clock(); 515 516 for (i = 0; i < 4; i++) 517 pwrdm->state_timer[i] = 0; 518 519 pwrdm->timer = t; 520 521 if (strncmp(pwrdm->name, "dpll", 4) == 0) 522 return 0; 523 524 d = debugfs_create_dir(pwrdm->name, (struct dentry *)dir); 525 526 (void) debugfs_create_file("suspend", S_IRUGO|S_IWUSR, d, 527 (void *)pwrdm, &pwrdm_suspend_fops); 528 529 return 0; 530 } 531 532 static int option_get(void *data, u64 *val) 533 { 534 u32 *option = data; 535 536 *val = *option; 537 538 return 0; 539 } 540 541 static int option_set(void *data, u64 val) 542 { 543 u32 *option = data; 544 545 *option = val; 546 547 if (option == &enable_off_mode) 548 omap3_pm_off_mode_enable(val); 549 550 return 0; 551 } 552 553 DEFINE_SIMPLE_ATTRIBUTE(pm_dbg_option_fops, option_get, option_set, "%llu\n"); 554 555 static int __init pm_dbg_init(void) 556 { 557 int i; 558 struct dentry *d; 559 char name[2]; 560 561 if (pm_dbg_init_done) 562 return 0; 563 564 if (cpu_is_omap34xx()) 565 pm_dbg_reg_modules = omap3_pm_reg_modules; 566 else { 567 printk(KERN_ERR "%s: only OMAP3 supported\n", __func__); 568 return -ENODEV; 569 } 570 571 d = debugfs_create_dir("pm_debug", NULL); 572 if (IS_ERR(d)) 573 return PTR_ERR(d); 574 575 (void) debugfs_create_file("count", S_IRUGO, 576 d, (void *)DEBUG_FILE_COUNTERS, &debug_fops); 577 (void) debugfs_create_file("time", S_IRUGO, 578 d, (void *)DEBUG_FILE_TIMERS, &debug_fops); 579 580 pwrdm_for_each_nolock(pwrdms_setup, (void *)d); 581 582 pm_dbg_dir = debugfs_create_dir("registers", d); 583 if (IS_ERR(pm_dbg_dir)) 584 return PTR_ERR(pm_dbg_dir); 585 586 (void) debugfs_create_file("current", S_IRUGO, 587 pm_dbg_dir, (void *)0, &debug_reg_fops); 588 589 for (i = 0; i < PM_DBG_MAX_REG_SETS; i++) 590 if (pm_dbg_reg_set[i] != NULL) { 591 sprintf(name, "%d", i+1); 592 (void) debugfs_create_file(name, S_IRUGO, 593 pm_dbg_dir, (void *)(i+1), &debug_reg_fops); 594 595 } 596 597 (void) debugfs_create_file("enable_off_mode", S_IRUGO | S_IWUGO, d, 598 &enable_off_mode, &pm_dbg_option_fops); 599 (void) debugfs_create_file("sleep_while_idle", S_IRUGO | S_IWUGO, d, 600 &sleep_while_idle, &pm_dbg_option_fops); 601 (void) debugfs_create_file("wakeup_timer_seconds", S_IRUGO | S_IWUGO, d, 602 &wakeup_timer_seconds, &pm_dbg_option_fops); 603 pm_dbg_init_done = 1; 604 605 return 0; 606 } 607 arch_initcall(pm_dbg_init); 608 609 #endif 610