17359154eSPaul Walmsley /* 27359154eSPaul Walmsley * omap_hwmod_2430_data.c - hardware modules present on the OMAP2430 chips 37359154eSPaul Walmsley * 47359154eSPaul Walmsley * Copyright (C) 2009-2010 Nokia Corporation 57359154eSPaul Walmsley * Paul Walmsley 67359154eSPaul Walmsley * 77359154eSPaul Walmsley * This program is free software; you can redistribute it and/or modify 87359154eSPaul Walmsley * it under the terms of the GNU General Public License version 2 as 97359154eSPaul Walmsley * published by the Free Software Foundation. 107359154eSPaul Walmsley * 117359154eSPaul Walmsley * XXX handle crossbar/shared link difference for L3? 127359154eSPaul Walmsley * XXX these should be marked initdata for multi-OMAP kernels 137359154eSPaul Walmsley */ 147359154eSPaul Walmsley #include <plat/omap_hwmod.h> 157359154eSPaul Walmsley #include <mach/irqs.h> 167359154eSPaul Walmsley #include <plat/cpu.h> 177359154eSPaul Walmsley #include <plat/dma.h> 18046465b7SKevin Hilman #include <plat/serial.h> 192004290fSPaul Walmsley #include <plat/i2c.h> 20aeac0e44SVaradarajan, Charulatha #include <plat/gpio.h> 217359154eSPaul Walmsley 2243b40992SPaul Walmsley #include "omap_hwmod_common_data.h" 2343b40992SPaul Walmsley 247359154eSPaul Walmsley #include "prm-regbits-24xx.h" 25165e2161SVaradarajan, Charulatha #include "cm-regbits-24xx.h" 26ff2516fbSPaul Walmsley #include "wd_timer.h" 277359154eSPaul Walmsley 287359154eSPaul Walmsley /* 297359154eSPaul Walmsley * OMAP2430 hardware module integration data 307359154eSPaul Walmsley * 317359154eSPaul Walmsley * ALl of the data in this section should be autogeneratable from the 327359154eSPaul Walmsley * TI hardware database or other technical documentation. Data that 337359154eSPaul Walmsley * is driver-specific or driver-kernel integration-specific belongs 347359154eSPaul Walmsley * elsewhere. 357359154eSPaul Walmsley */ 367359154eSPaul Walmsley 377359154eSPaul Walmsley static struct omap_hwmod omap2430_mpu_hwmod; 3808072acfSPaul Walmsley static struct omap_hwmod omap2430_iva_hwmod; 394a7cf90aSKevin Hilman static struct omap_hwmod omap2430_l3_main_hwmod; 407359154eSPaul Walmsley static struct omap_hwmod omap2430_l4_core_hwmod; 41165e2161SVaradarajan, Charulatha static struct omap_hwmod omap2430_wd_timer2_hwmod; 42aeac0e44SVaradarajan, Charulatha static struct omap_hwmod omap2430_gpio1_hwmod; 43aeac0e44SVaradarajan, Charulatha static struct omap_hwmod omap2430_gpio2_hwmod; 44aeac0e44SVaradarajan, Charulatha static struct omap_hwmod omap2430_gpio3_hwmod; 45aeac0e44SVaradarajan, Charulatha static struct omap_hwmod omap2430_gpio4_hwmod; 46aeac0e44SVaradarajan, Charulatha static struct omap_hwmod omap2430_gpio5_hwmod; 4782cbd1aeSG, Manjunath Kondaiah static struct omap_hwmod omap2430_dma_system_hwmod; 487359154eSPaul Walmsley 497359154eSPaul Walmsley /* L3 -> L4_CORE interface */ 504a7cf90aSKevin Hilman static struct omap_hwmod_ocp_if omap2430_l3_main__l4_core = { 514a7cf90aSKevin Hilman .master = &omap2430_l3_main_hwmod, 527359154eSPaul Walmsley .slave = &omap2430_l4_core_hwmod, 537359154eSPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 547359154eSPaul Walmsley }; 557359154eSPaul Walmsley 567359154eSPaul Walmsley /* MPU -> L3 interface */ 574a7cf90aSKevin Hilman static struct omap_hwmod_ocp_if omap2430_mpu__l3_main = { 587359154eSPaul Walmsley .master = &omap2430_mpu_hwmod, 594a7cf90aSKevin Hilman .slave = &omap2430_l3_main_hwmod, 607359154eSPaul Walmsley .user = OCP_USER_MPU, 617359154eSPaul Walmsley }; 627359154eSPaul Walmsley 637359154eSPaul Walmsley /* Slave interfaces on the L3 interconnect */ 644a7cf90aSKevin Hilman static struct omap_hwmod_ocp_if *omap2430_l3_main_slaves[] = { 654a7cf90aSKevin Hilman &omap2430_mpu__l3_main, 667359154eSPaul Walmsley }; 677359154eSPaul Walmsley 687359154eSPaul Walmsley /* Master interfaces on the L3 interconnect */ 694a7cf90aSKevin Hilman static struct omap_hwmod_ocp_if *omap2430_l3_main_masters[] = { 704a7cf90aSKevin Hilman &omap2430_l3_main__l4_core, 717359154eSPaul Walmsley }; 727359154eSPaul Walmsley 737359154eSPaul Walmsley /* L3 */ 744a7cf90aSKevin Hilman static struct omap_hwmod omap2430_l3_main_hwmod = { 75fa98347eSBenoit Cousson .name = "l3_main", 7643b40992SPaul Walmsley .class = &l3_hwmod_class, 774a7cf90aSKevin Hilman .masters = omap2430_l3_main_masters, 784a7cf90aSKevin Hilman .masters_cnt = ARRAY_SIZE(omap2430_l3_main_masters), 794a7cf90aSKevin Hilman .slaves = omap2430_l3_main_slaves, 804a7cf90aSKevin Hilman .slaves_cnt = ARRAY_SIZE(omap2430_l3_main_slaves), 812eb1875dSKevin Hilman .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 822eb1875dSKevin Hilman .flags = HWMOD_NO_IDLEST, 837359154eSPaul Walmsley }; 847359154eSPaul Walmsley 857359154eSPaul Walmsley static struct omap_hwmod omap2430_l4_wkup_hwmod; 86046465b7SKevin Hilman static struct omap_hwmod omap2430_uart1_hwmod; 87046465b7SKevin Hilman static struct omap_hwmod omap2430_uart2_hwmod; 88046465b7SKevin Hilman static struct omap_hwmod omap2430_uart3_hwmod; 892004290fSPaul Walmsley static struct omap_hwmod omap2430_i2c1_hwmod; 902004290fSPaul Walmsley static struct omap_hwmod omap2430_i2c2_hwmod; 912004290fSPaul Walmsley 922004290fSPaul Walmsley /* I2C IP block address space length (in bytes) */ 932004290fSPaul Walmsley #define OMAP2_I2C_AS_LEN 128 942004290fSPaul Walmsley 952004290fSPaul Walmsley /* L4 CORE -> I2C1 interface */ 962004290fSPaul Walmsley static struct omap_hwmod_addr_space omap2430_i2c1_addr_space[] = { 972004290fSPaul Walmsley { 982004290fSPaul Walmsley .pa_start = 0x48070000, 992004290fSPaul Walmsley .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN - 1, 1002004290fSPaul Walmsley .flags = ADDR_TYPE_RT, 1012004290fSPaul Walmsley }, 1022004290fSPaul Walmsley }; 1032004290fSPaul Walmsley 1042004290fSPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__i2c1 = { 1052004290fSPaul Walmsley .master = &omap2430_l4_core_hwmod, 1062004290fSPaul Walmsley .slave = &omap2430_i2c1_hwmod, 1072004290fSPaul Walmsley .clk = "i2c1_ick", 1082004290fSPaul Walmsley .addr = omap2430_i2c1_addr_space, 1092004290fSPaul Walmsley .addr_cnt = ARRAY_SIZE(omap2430_i2c1_addr_space), 1102004290fSPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 1112004290fSPaul Walmsley }; 1122004290fSPaul Walmsley 1132004290fSPaul Walmsley /* L4 CORE -> I2C2 interface */ 1142004290fSPaul Walmsley static struct omap_hwmod_addr_space omap2430_i2c2_addr_space[] = { 1152004290fSPaul Walmsley { 1162004290fSPaul Walmsley .pa_start = 0x48072000, 1172004290fSPaul Walmsley .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN - 1, 1182004290fSPaul Walmsley .flags = ADDR_TYPE_RT, 1192004290fSPaul Walmsley }, 1202004290fSPaul Walmsley }; 1212004290fSPaul Walmsley 1222004290fSPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__i2c2 = { 1232004290fSPaul Walmsley .master = &omap2430_l4_core_hwmod, 1242004290fSPaul Walmsley .slave = &omap2430_i2c2_hwmod, 1252004290fSPaul Walmsley .clk = "i2c2_ick", 1262004290fSPaul Walmsley .addr = omap2430_i2c2_addr_space, 1272004290fSPaul Walmsley .addr_cnt = ARRAY_SIZE(omap2430_i2c2_addr_space), 1282004290fSPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 1292004290fSPaul Walmsley }; 1307359154eSPaul Walmsley 1317359154eSPaul Walmsley /* L4_CORE -> L4_WKUP interface */ 1327359154eSPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__l4_wkup = { 1337359154eSPaul Walmsley .master = &omap2430_l4_core_hwmod, 1347359154eSPaul Walmsley .slave = &omap2430_l4_wkup_hwmod, 1357359154eSPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 1367359154eSPaul Walmsley }; 1377359154eSPaul Walmsley 138046465b7SKevin Hilman /* L4 CORE -> UART1 interface */ 139046465b7SKevin Hilman static struct omap_hwmod_addr_space omap2430_uart1_addr_space[] = { 140046465b7SKevin Hilman { 141046465b7SKevin Hilman .pa_start = OMAP2_UART1_BASE, 142046465b7SKevin Hilman .pa_end = OMAP2_UART1_BASE + SZ_8K - 1, 143046465b7SKevin Hilman .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, 144046465b7SKevin Hilman }, 145046465b7SKevin Hilman }; 146046465b7SKevin Hilman 147046465b7SKevin Hilman static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = { 148046465b7SKevin Hilman .master = &omap2430_l4_core_hwmod, 149046465b7SKevin Hilman .slave = &omap2430_uart1_hwmod, 150046465b7SKevin Hilman .clk = "uart1_ick", 151046465b7SKevin Hilman .addr = omap2430_uart1_addr_space, 152046465b7SKevin Hilman .addr_cnt = ARRAY_SIZE(omap2430_uart1_addr_space), 153046465b7SKevin Hilman .user = OCP_USER_MPU | OCP_USER_SDMA, 154046465b7SKevin Hilman }; 155046465b7SKevin Hilman 156046465b7SKevin Hilman /* L4 CORE -> UART2 interface */ 157046465b7SKevin Hilman static struct omap_hwmod_addr_space omap2430_uart2_addr_space[] = { 158046465b7SKevin Hilman { 159046465b7SKevin Hilman .pa_start = OMAP2_UART2_BASE, 160046465b7SKevin Hilman .pa_end = OMAP2_UART2_BASE + SZ_1K - 1, 161046465b7SKevin Hilman .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, 162046465b7SKevin Hilman }, 163046465b7SKevin Hilman }; 164046465b7SKevin Hilman 165046465b7SKevin Hilman static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = { 166046465b7SKevin Hilman .master = &omap2430_l4_core_hwmod, 167046465b7SKevin Hilman .slave = &omap2430_uart2_hwmod, 168046465b7SKevin Hilman .clk = "uart2_ick", 169046465b7SKevin Hilman .addr = omap2430_uart2_addr_space, 170046465b7SKevin Hilman .addr_cnt = ARRAY_SIZE(omap2430_uart2_addr_space), 171046465b7SKevin Hilman .user = OCP_USER_MPU | OCP_USER_SDMA, 172046465b7SKevin Hilman }; 173046465b7SKevin Hilman 174046465b7SKevin Hilman /* L4 PER -> UART3 interface */ 175046465b7SKevin Hilman static struct omap_hwmod_addr_space omap2430_uart3_addr_space[] = { 176046465b7SKevin Hilman { 177046465b7SKevin Hilman .pa_start = OMAP2_UART3_BASE, 178046465b7SKevin Hilman .pa_end = OMAP2_UART3_BASE + SZ_1K - 1, 179046465b7SKevin Hilman .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, 180046465b7SKevin Hilman }, 181046465b7SKevin Hilman }; 182046465b7SKevin Hilman 183046465b7SKevin Hilman static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { 184046465b7SKevin Hilman .master = &omap2430_l4_core_hwmod, 185046465b7SKevin Hilman .slave = &omap2430_uart3_hwmod, 186046465b7SKevin Hilman .clk = "uart3_ick", 187046465b7SKevin Hilman .addr = omap2430_uart3_addr_space, 188046465b7SKevin Hilman .addr_cnt = ARRAY_SIZE(omap2430_uart3_addr_space), 189046465b7SKevin Hilman .user = OCP_USER_MPU | OCP_USER_SDMA, 190046465b7SKevin Hilman }; 191046465b7SKevin Hilman 1927359154eSPaul Walmsley /* Slave interfaces on the L4_CORE interconnect */ 1937359154eSPaul Walmsley static struct omap_hwmod_ocp_if *omap2430_l4_core_slaves[] = { 1944a7cf90aSKevin Hilman &omap2430_l3_main__l4_core, 1957359154eSPaul Walmsley }; 1967359154eSPaul Walmsley 1977359154eSPaul Walmsley /* Master interfaces on the L4_CORE interconnect */ 1987359154eSPaul Walmsley static struct omap_hwmod_ocp_if *omap2430_l4_core_masters[] = { 1997359154eSPaul Walmsley &omap2430_l4_core__l4_wkup, 2007359154eSPaul Walmsley }; 2017359154eSPaul Walmsley 2027359154eSPaul Walmsley /* L4 CORE */ 2037359154eSPaul Walmsley static struct omap_hwmod omap2430_l4_core_hwmod = { 204fa98347eSBenoit Cousson .name = "l4_core", 20543b40992SPaul Walmsley .class = &l4_hwmod_class, 2067359154eSPaul Walmsley .masters = omap2430_l4_core_masters, 2077359154eSPaul Walmsley .masters_cnt = ARRAY_SIZE(omap2430_l4_core_masters), 2087359154eSPaul Walmsley .slaves = omap2430_l4_core_slaves, 2097359154eSPaul Walmsley .slaves_cnt = ARRAY_SIZE(omap2430_l4_core_slaves), 2102eb1875dSKevin Hilman .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 2112eb1875dSKevin Hilman .flags = HWMOD_NO_IDLEST, 2127359154eSPaul Walmsley }; 2137359154eSPaul Walmsley 2147359154eSPaul Walmsley /* Slave interfaces on the L4_WKUP interconnect */ 2157359154eSPaul Walmsley static struct omap_hwmod_ocp_if *omap2430_l4_wkup_slaves[] = { 2167359154eSPaul Walmsley &omap2430_l4_core__l4_wkup, 217046465b7SKevin Hilman &omap2_l4_core__uart1, 218046465b7SKevin Hilman &omap2_l4_core__uart2, 219046465b7SKevin Hilman &omap2_l4_core__uart3, 2207359154eSPaul Walmsley }; 2217359154eSPaul Walmsley 2227359154eSPaul Walmsley /* Master interfaces on the L4_WKUP interconnect */ 2237359154eSPaul Walmsley static struct omap_hwmod_ocp_if *omap2430_l4_wkup_masters[] = { 2247359154eSPaul Walmsley }; 2257359154eSPaul Walmsley 2267359154eSPaul Walmsley /* L4 WKUP */ 2277359154eSPaul Walmsley static struct omap_hwmod omap2430_l4_wkup_hwmod = { 228fa98347eSBenoit Cousson .name = "l4_wkup", 22943b40992SPaul Walmsley .class = &l4_hwmod_class, 2307359154eSPaul Walmsley .masters = omap2430_l4_wkup_masters, 2317359154eSPaul Walmsley .masters_cnt = ARRAY_SIZE(omap2430_l4_wkup_masters), 2327359154eSPaul Walmsley .slaves = omap2430_l4_wkup_slaves, 2337359154eSPaul Walmsley .slaves_cnt = ARRAY_SIZE(omap2430_l4_wkup_slaves), 2342eb1875dSKevin Hilman .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 2352eb1875dSKevin Hilman .flags = HWMOD_NO_IDLEST, 2367359154eSPaul Walmsley }; 2377359154eSPaul Walmsley 2387359154eSPaul Walmsley /* Master interfaces on the MPU device */ 2397359154eSPaul Walmsley static struct omap_hwmod_ocp_if *omap2430_mpu_masters[] = { 2404a7cf90aSKevin Hilman &omap2430_mpu__l3_main, 2417359154eSPaul Walmsley }; 2427359154eSPaul Walmsley 2437359154eSPaul Walmsley /* MPU */ 2447359154eSPaul Walmsley static struct omap_hwmod omap2430_mpu_hwmod = { 2455c2c0296SBenoit Cousson .name = "mpu", 24643b40992SPaul Walmsley .class = &mpu_hwmod_class, 2477359154eSPaul Walmsley .main_clk = "mpu_ck", 2487359154eSPaul Walmsley .masters = omap2430_mpu_masters, 2497359154eSPaul Walmsley .masters_cnt = ARRAY_SIZE(omap2430_mpu_masters), 2507359154eSPaul Walmsley .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 2517359154eSPaul Walmsley }; 2527359154eSPaul Walmsley 25308072acfSPaul Walmsley /* 25408072acfSPaul Walmsley * IVA2_1 interface data 25508072acfSPaul Walmsley */ 25608072acfSPaul Walmsley 25708072acfSPaul Walmsley /* IVA2 <- L3 interface */ 25808072acfSPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l3__iva = { 25908072acfSPaul Walmsley .master = &omap2430_l3_main_hwmod, 26008072acfSPaul Walmsley .slave = &omap2430_iva_hwmod, 26108072acfSPaul Walmsley .clk = "dsp_fck", 26208072acfSPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 26308072acfSPaul Walmsley }; 26408072acfSPaul Walmsley 26508072acfSPaul Walmsley static struct omap_hwmod_ocp_if *omap2430_iva_masters[] = { 26608072acfSPaul Walmsley &omap2430_l3__iva, 26708072acfSPaul Walmsley }; 26808072acfSPaul Walmsley 26908072acfSPaul Walmsley /* 27008072acfSPaul Walmsley * IVA2 (IVA2) 27108072acfSPaul Walmsley */ 27208072acfSPaul Walmsley 27308072acfSPaul Walmsley static struct omap_hwmod omap2430_iva_hwmod = { 27408072acfSPaul Walmsley .name = "iva", 27508072acfSPaul Walmsley .class = &iva_hwmod_class, 27608072acfSPaul Walmsley .masters = omap2430_iva_masters, 27708072acfSPaul Walmsley .masters_cnt = ARRAY_SIZE(omap2430_iva_masters), 27808072acfSPaul Walmsley .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) 27908072acfSPaul Walmsley }; 28008072acfSPaul Walmsley 281165e2161SVaradarajan, Charulatha /* l4_wkup -> wd_timer2 */ 282165e2161SVaradarajan, Charulatha static struct omap_hwmod_addr_space omap2430_wd_timer2_addrs[] = { 283165e2161SVaradarajan, Charulatha { 284165e2161SVaradarajan, Charulatha .pa_start = 0x49016000, 285165e2161SVaradarajan, Charulatha .pa_end = 0x4901607f, 286165e2161SVaradarajan, Charulatha .flags = ADDR_TYPE_RT 287165e2161SVaradarajan, Charulatha }, 288165e2161SVaradarajan, Charulatha }; 289165e2161SVaradarajan, Charulatha 290165e2161SVaradarajan, Charulatha static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = { 291165e2161SVaradarajan, Charulatha .master = &omap2430_l4_wkup_hwmod, 292165e2161SVaradarajan, Charulatha .slave = &omap2430_wd_timer2_hwmod, 293165e2161SVaradarajan, Charulatha .clk = "mpu_wdt_ick", 294165e2161SVaradarajan, Charulatha .addr = omap2430_wd_timer2_addrs, 295165e2161SVaradarajan, Charulatha .addr_cnt = ARRAY_SIZE(omap2430_wd_timer2_addrs), 296165e2161SVaradarajan, Charulatha .user = OCP_USER_MPU | OCP_USER_SDMA, 297165e2161SVaradarajan, Charulatha }; 298165e2161SVaradarajan, Charulatha 299165e2161SVaradarajan, Charulatha /* 300165e2161SVaradarajan, Charulatha * 'wd_timer' class 301165e2161SVaradarajan, Charulatha * 32-bit watchdog upward counter that generates a pulse on the reset pin on 302165e2161SVaradarajan, Charulatha * overflow condition 303165e2161SVaradarajan, Charulatha */ 304165e2161SVaradarajan, Charulatha 305165e2161SVaradarajan, Charulatha static struct omap_hwmod_class_sysconfig omap2430_wd_timer_sysc = { 306165e2161SVaradarajan, Charulatha .rev_offs = 0x0, 307165e2161SVaradarajan, Charulatha .sysc_offs = 0x0010, 308165e2161SVaradarajan, Charulatha .syss_offs = 0x0014, 309165e2161SVaradarajan, Charulatha .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET | 310d73d65faSAvinash.H.M SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), 311165e2161SVaradarajan, Charulatha .sysc_fields = &omap_hwmod_sysc_type1, 312165e2161SVaradarajan, Charulatha }; 313165e2161SVaradarajan, Charulatha 314165e2161SVaradarajan, Charulatha static struct omap_hwmod_class omap2430_wd_timer_hwmod_class = { 315165e2161SVaradarajan, Charulatha .name = "wd_timer", 316165e2161SVaradarajan, Charulatha .sysc = &omap2430_wd_timer_sysc, 317ff2516fbSPaul Walmsley .pre_shutdown = &omap2_wd_timer_disable 318165e2161SVaradarajan, Charulatha }; 319165e2161SVaradarajan, Charulatha 320165e2161SVaradarajan, Charulatha /* wd_timer2 */ 321165e2161SVaradarajan, Charulatha static struct omap_hwmod_ocp_if *omap2430_wd_timer2_slaves[] = { 322165e2161SVaradarajan, Charulatha &omap2430_l4_wkup__wd_timer2, 323165e2161SVaradarajan, Charulatha }; 324165e2161SVaradarajan, Charulatha 325165e2161SVaradarajan, Charulatha static struct omap_hwmod omap2430_wd_timer2_hwmod = { 326165e2161SVaradarajan, Charulatha .name = "wd_timer2", 327165e2161SVaradarajan, Charulatha .class = &omap2430_wd_timer_hwmod_class, 328165e2161SVaradarajan, Charulatha .main_clk = "mpu_wdt_fck", 329165e2161SVaradarajan, Charulatha .prcm = { 330165e2161SVaradarajan, Charulatha .omap2 = { 331165e2161SVaradarajan, Charulatha .prcm_reg_id = 1, 332165e2161SVaradarajan, Charulatha .module_bit = OMAP24XX_EN_MPU_WDT_SHIFT, 333165e2161SVaradarajan, Charulatha .module_offs = WKUP_MOD, 334165e2161SVaradarajan, Charulatha .idlest_reg_id = 1, 335165e2161SVaradarajan, Charulatha .idlest_idle_bit = OMAP24XX_ST_MPU_WDT_SHIFT, 336165e2161SVaradarajan, Charulatha }, 337165e2161SVaradarajan, Charulatha }, 338165e2161SVaradarajan, Charulatha .slaves = omap2430_wd_timer2_slaves, 339165e2161SVaradarajan, Charulatha .slaves_cnt = ARRAY_SIZE(omap2430_wd_timer2_slaves), 340165e2161SVaradarajan, Charulatha .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 341165e2161SVaradarajan, Charulatha }; 342165e2161SVaradarajan, Charulatha 343046465b7SKevin Hilman /* UART */ 344046465b7SKevin Hilman 345046465b7SKevin Hilman static struct omap_hwmod_class_sysconfig uart_sysc = { 346046465b7SKevin Hilman .rev_offs = 0x50, 347046465b7SKevin Hilman .sysc_offs = 0x54, 348046465b7SKevin Hilman .syss_offs = 0x58, 349046465b7SKevin Hilman .sysc_flags = (SYSC_HAS_SIDLEMODE | 350046465b7SKevin Hilman SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | 351d73d65faSAvinash.H.M SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), 352046465b7SKevin Hilman .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), 353046465b7SKevin Hilman .sysc_fields = &omap_hwmod_sysc_type1, 354046465b7SKevin Hilman }; 355046465b7SKevin Hilman 356046465b7SKevin Hilman static struct omap_hwmod_class uart_class = { 357046465b7SKevin Hilman .name = "uart", 358046465b7SKevin Hilman .sysc = &uart_sysc, 359046465b7SKevin Hilman }; 360046465b7SKevin Hilman 361046465b7SKevin Hilman /* UART1 */ 362046465b7SKevin Hilman 363046465b7SKevin Hilman static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { 364046465b7SKevin Hilman { .irq = INT_24XX_UART1_IRQ, }, 365046465b7SKevin Hilman }; 366046465b7SKevin Hilman 367046465b7SKevin Hilman static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { 368046465b7SKevin Hilman { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, 369046465b7SKevin Hilman { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, 370046465b7SKevin Hilman }; 371046465b7SKevin Hilman 372046465b7SKevin Hilman static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = { 373046465b7SKevin Hilman &omap2_l4_core__uart1, 374046465b7SKevin Hilman }; 375046465b7SKevin Hilman 376046465b7SKevin Hilman static struct omap_hwmod omap2430_uart1_hwmod = { 377046465b7SKevin Hilman .name = "uart1", 378046465b7SKevin Hilman .mpu_irqs = uart1_mpu_irqs, 379046465b7SKevin Hilman .mpu_irqs_cnt = ARRAY_SIZE(uart1_mpu_irqs), 380046465b7SKevin Hilman .sdma_reqs = uart1_sdma_reqs, 381046465b7SKevin Hilman .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), 382046465b7SKevin Hilman .main_clk = "uart1_fck", 383046465b7SKevin Hilman .prcm = { 384046465b7SKevin Hilman .omap2 = { 385046465b7SKevin Hilman .module_offs = CORE_MOD, 386046465b7SKevin Hilman .prcm_reg_id = 1, 387046465b7SKevin Hilman .module_bit = OMAP24XX_EN_UART1_SHIFT, 388046465b7SKevin Hilman .idlest_reg_id = 1, 389046465b7SKevin Hilman .idlest_idle_bit = OMAP24XX_EN_UART1_SHIFT, 390046465b7SKevin Hilman }, 391046465b7SKevin Hilman }, 392046465b7SKevin Hilman .slaves = omap2430_uart1_slaves, 393046465b7SKevin Hilman .slaves_cnt = ARRAY_SIZE(omap2430_uart1_slaves), 394046465b7SKevin Hilman .class = &uart_class, 395046465b7SKevin Hilman .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 396046465b7SKevin Hilman }; 397046465b7SKevin Hilman 398046465b7SKevin Hilman /* UART2 */ 399046465b7SKevin Hilman 400046465b7SKevin Hilman static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { 401046465b7SKevin Hilman { .irq = INT_24XX_UART2_IRQ, }, 402046465b7SKevin Hilman }; 403046465b7SKevin Hilman 404046465b7SKevin Hilman static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { 405046465b7SKevin Hilman { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, 406046465b7SKevin Hilman { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, 407046465b7SKevin Hilman }; 408046465b7SKevin Hilman 409046465b7SKevin Hilman static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = { 410046465b7SKevin Hilman &omap2_l4_core__uart2, 411046465b7SKevin Hilman }; 412046465b7SKevin Hilman 413046465b7SKevin Hilman static struct omap_hwmod omap2430_uart2_hwmod = { 414046465b7SKevin Hilman .name = "uart2", 415046465b7SKevin Hilman .mpu_irqs = uart2_mpu_irqs, 416046465b7SKevin Hilman .mpu_irqs_cnt = ARRAY_SIZE(uart2_mpu_irqs), 417046465b7SKevin Hilman .sdma_reqs = uart2_sdma_reqs, 418046465b7SKevin Hilman .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), 419046465b7SKevin Hilman .main_clk = "uart2_fck", 420046465b7SKevin Hilman .prcm = { 421046465b7SKevin Hilman .omap2 = { 422046465b7SKevin Hilman .module_offs = CORE_MOD, 423046465b7SKevin Hilman .prcm_reg_id = 1, 424046465b7SKevin Hilman .module_bit = OMAP24XX_EN_UART2_SHIFT, 425046465b7SKevin Hilman .idlest_reg_id = 1, 426046465b7SKevin Hilman .idlest_idle_bit = OMAP24XX_EN_UART2_SHIFT, 427046465b7SKevin Hilman }, 428046465b7SKevin Hilman }, 429046465b7SKevin Hilman .slaves = omap2430_uart2_slaves, 430046465b7SKevin Hilman .slaves_cnt = ARRAY_SIZE(omap2430_uart2_slaves), 431046465b7SKevin Hilman .class = &uart_class, 432046465b7SKevin Hilman .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 433046465b7SKevin Hilman }; 434046465b7SKevin Hilman 435046465b7SKevin Hilman /* UART3 */ 436046465b7SKevin Hilman 437046465b7SKevin Hilman static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { 438046465b7SKevin Hilman { .irq = INT_24XX_UART3_IRQ, }, 439046465b7SKevin Hilman }; 440046465b7SKevin Hilman 441046465b7SKevin Hilman static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { 442046465b7SKevin Hilman { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, 443046465b7SKevin Hilman { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, 444046465b7SKevin Hilman }; 445046465b7SKevin Hilman 446046465b7SKevin Hilman static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = { 447046465b7SKevin Hilman &omap2_l4_core__uart3, 448046465b7SKevin Hilman }; 449046465b7SKevin Hilman 450046465b7SKevin Hilman static struct omap_hwmod omap2430_uart3_hwmod = { 451046465b7SKevin Hilman .name = "uart3", 452046465b7SKevin Hilman .mpu_irqs = uart3_mpu_irqs, 453046465b7SKevin Hilman .mpu_irqs_cnt = ARRAY_SIZE(uart3_mpu_irqs), 454046465b7SKevin Hilman .sdma_reqs = uart3_sdma_reqs, 455046465b7SKevin Hilman .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), 456046465b7SKevin Hilman .main_clk = "uart3_fck", 457046465b7SKevin Hilman .prcm = { 458046465b7SKevin Hilman .omap2 = { 459046465b7SKevin Hilman .module_offs = CORE_MOD, 460046465b7SKevin Hilman .prcm_reg_id = 2, 461046465b7SKevin Hilman .module_bit = OMAP24XX_EN_UART3_SHIFT, 462046465b7SKevin Hilman .idlest_reg_id = 2, 463046465b7SKevin Hilman .idlest_idle_bit = OMAP24XX_EN_UART3_SHIFT, 464046465b7SKevin Hilman }, 465046465b7SKevin Hilman }, 466046465b7SKevin Hilman .slaves = omap2430_uart3_slaves, 467046465b7SKevin Hilman .slaves_cnt = ARRAY_SIZE(omap2430_uart3_slaves), 468046465b7SKevin Hilman .class = &uart_class, 469046465b7SKevin Hilman .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 470046465b7SKevin Hilman }; 471046465b7SKevin Hilman 4722004290fSPaul Walmsley /* I2C common */ 4732004290fSPaul Walmsley static struct omap_hwmod_class_sysconfig i2c_sysc = { 4742004290fSPaul Walmsley .rev_offs = 0x00, 4752004290fSPaul Walmsley .sysc_offs = 0x20, 4762004290fSPaul Walmsley .syss_offs = 0x10, 477d73d65faSAvinash.H.M .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | 478d73d65faSAvinash.H.M SYSS_HAS_RESET_STATUS), 4792004290fSPaul Walmsley .sysc_fields = &omap_hwmod_sysc_type1, 4802004290fSPaul Walmsley }; 4812004290fSPaul Walmsley 4822004290fSPaul Walmsley static struct omap_hwmod_class i2c_class = { 4832004290fSPaul Walmsley .name = "i2c", 4842004290fSPaul Walmsley .sysc = &i2c_sysc, 4852004290fSPaul Walmsley }; 4862004290fSPaul Walmsley 48750ebb777SBenoit Cousson static struct omap_i2c_dev_attr i2c_dev_attr = { 4882004290fSPaul Walmsley .fifo_depth = 8, /* bytes */ 4892004290fSPaul Walmsley }; 4902004290fSPaul Walmsley 49150ebb777SBenoit Cousson /* I2C1 */ 49250ebb777SBenoit Cousson 4932004290fSPaul Walmsley static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { 4942004290fSPaul Walmsley { .irq = INT_24XX_I2C1_IRQ, }, 4952004290fSPaul Walmsley }; 4962004290fSPaul Walmsley 4972004290fSPaul Walmsley static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { 4982004290fSPaul Walmsley { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, 4992004290fSPaul Walmsley { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, 5002004290fSPaul Walmsley }; 5012004290fSPaul Walmsley 5022004290fSPaul Walmsley static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = { 5032004290fSPaul Walmsley &omap2430_l4_core__i2c1, 5042004290fSPaul Walmsley }; 5052004290fSPaul Walmsley 5062004290fSPaul Walmsley static struct omap_hwmod omap2430_i2c1_hwmod = { 5072004290fSPaul Walmsley .name = "i2c1", 5082004290fSPaul Walmsley .mpu_irqs = i2c1_mpu_irqs, 5092004290fSPaul Walmsley .mpu_irqs_cnt = ARRAY_SIZE(i2c1_mpu_irqs), 5102004290fSPaul Walmsley .sdma_reqs = i2c1_sdma_reqs, 5112004290fSPaul Walmsley .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), 5122004290fSPaul Walmsley .main_clk = "i2chs1_fck", 5132004290fSPaul Walmsley .prcm = { 5142004290fSPaul Walmsley .omap2 = { 5152004290fSPaul Walmsley /* 5162004290fSPaul Walmsley * NOTE: The CM_FCLKEN* and CM_ICLKEN* for 5172004290fSPaul Walmsley * I2CHS IP's do not follow the usual pattern. 5182004290fSPaul Walmsley * prcm_reg_id alone cannot be used to program 5192004290fSPaul Walmsley * the iclk and fclk. Needs to be handled using 5202004290fSPaul Walmsley * additonal flags when clk handling is moved 5212004290fSPaul Walmsley * to hwmod framework. 5222004290fSPaul Walmsley */ 5232004290fSPaul Walmsley .module_offs = CORE_MOD, 5242004290fSPaul Walmsley .prcm_reg_id = 1, 5252004290fSPaul Walmsley .module_bit = OMAP2430_EN_I2CHS1_SHIFT, 5262004290fSPaul Walmsley .idlest_reg_id = 1, 5272004290fSPaul Walmsley .idlest_idle_bit = OMAP2430_ST_I2CHS1_SHIFT, 5282004290fSPaul Walmsley }, 5292004290fSPaul Walmsley }, 5302004290fSPaul Walmsley .slaves = omap2430_i2c1_slaves, 5312004290fSPaul Walmsley .slaves_cnt = ARRAY_SIZE(omap2430_i2c1_slaves), 5322004290fSPaul Walmsley .class = &i2c_class, 53350ebb777SBenoit Cousson .dev_attr = &i2c_dev_attr, 5342004290fSPaul Walmsley .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 5352004290fSPaul Walmsley }; 5362004290fSPaul Walmsley 5372004290fSPaul Walmsley /* I2C2 */ 5382004290fSPaul Walmsley 5392004290fSPaul Walmsley static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { 5402004290fSPaul Walmsley { .irq = INT_24XX_I2C2_IRQ, }, 5412004290fSPaul Walmsley }; 5422004290fSPaul Walmsley 5432004290fSPaul Walmsley static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { 5442004290fSPaul Walmsley { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, 5452004290fSPaul Walmsley { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, 5462004290fSPaul Walmsley }; 5472004290fSPaul Walmsley 5482004290fSPaul Walmsley static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = { 5492004290fSPaul Walmsley &omap2430_l4_core__i2c2, 5502004290fSPaul Walmsley }; 5512004290fSPaul Walmsley 5522004290fSPaul Walmsley static struct omap_hwmod omap2430_i2c2_hwmod = { 5532004290fSPaul Walmsley .name = "i2c2", 5542004290fSPaul Walmsley .mpu_irqs = i2c2_mpu_irqs, 5552004290fSPaul Walmsley .mpu_irqs_cnt = ARRAY_SIZE(i2c2_mpu_irqs), 5562004290fSPaul Walmsley .sdma_reqs = i2c2_sdma_reqs, 5572004290fSPaul Walmsley .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), 5582004290fSPaul Walmsley .main_clk = "i2chs2_fck", 5592004290fSPaul Walmsley .prcm = { 5602004290fSPaul Walmsley .omap2 = { 5612004290fSPaul Walmsley .module_offs = CORE_MOD, 5622004290fSPaul Walmsley .prcm_reg_id = 1, 5632004290fSPaul Walmsley .module_bit = OMAP2430_EN_I2CHS2_SHIFT, 5642004290fSPaul Walmsley .idlest_reg_id = 1, 5652004290fSPaul Walmsley .idlest_idle_bit = OMAP2430_ST_I2CHS2_SHIFT, 5662004290fSPaul Walmsley }, 5672004290fSPaul Walmsley }, 5682004290fSPaul Walmsley .slaves = omap2430_i2c2_slaves, 5692004290fSPaul Walmsley .slaves_cnt = ARRAY_SIZE(omap2430_i2c2_slaves), 5702004290fSPaul Walmsley .class = &i2c_class, 57150ebb777SBenoit Cousson .dev_attr = &i2c_dev_attr, 5722004290fSPaul Walmsley .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 5732004290fSPaul Walmsley }; 5742004290fSPaul Walmsley 575aeac0e44SVaradarajan, Charulatha /* l4_wkup -> gpio1 */ 576aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_addr_space omap2430_gpio1_addr_space[] = { 577aeac0e44SVaradarajan, Charulatha { 578aeac0e44SVaradarajan, Charulatha .pa_start = 0x4900C000, 579aeac0e44SVaradarajan, Charulatha .pa_end = 0x4900C1ff, 580aeac0e44SVaradarajan, Charulatha .flags = ADDR_TYPE_RT 581aeac0e44SVaradarajan, Charulatha }, 582aeac0e44SVaradarajan, Charulatha }; 583aeac0e44SVaradarajan, Charulatha 584aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio1 = { 585aeac0e44SVaradarajan, Charulatha .master = &omap2430_l4_wkup_hwmod, 586aeac0e44SVaradarajan, Charulatha .slave = &omap2430_gpio1_hwmod, 587aeac0e44SVaradarajan, Charulatha .clk = "gpios_ick", 588aeac0e44SVaradarajan, Charulatha .addr = omap2430_gpio1_addr_space, 589aeac0e44SVaradarajan, Charulatha .addr_cnt = ARRAY_SIZE(omap2430_gpio1_addr_space), 590aeac0e44SVaradarajan, Charulatha .user = OCP_USER_MPU | OCP_USER_SDMA, 591aeac0e44SVaradarajan, Charulatha }; 592aeac0e44SVaradarajan, Charulatha 593aeac0e44SVaradarajan, Charulatha /* l4_wkup -> gpio2 */ 594aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_addr_space omap2430_gpio2_addr_space[] = { 595aeac0e44SVaradarajan, Charulatha { 596aeac0e44SVaradarajan, Charulatha .pa_start = 0x4900E000, 597aeac0e44SVaradarajan, Charulatha .pa_end = 0x4900E1ff, 598aeac0e44SVaradarajan, Charulatha .flags = ADDR_TYPE_RT 599aeac0e44SVaradarajan, Charulatha }, 600aeac0e44SVaradarajan, Charulatha }; 601aeac0e44SVaradarajan, Charulatha 602aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio2 = { 603aeac0e44SVaradarajan, Charulatha .master = &omap2430_l4_wkup_hwmod, 604aeac0e44SVaradarajan, Charulatha .slave = &omap2430_gpio2_hwmod, 605aeac0e44SVaradarajan, Charulatha .clk = "gpios_ick", 606aeac0e44SVaradarajan, Charulatha .addr = omap2430_gpio2_addr_space, 607aeac0e44SVaradarajan, Charulatha .addr_cnt = ARRAY_SIZE(omap2430_gpio2_addr_space), 608aeac0e44SVaradarajan, Charulatha .user = OCP_USER_MPU | OCP_USER_SDMA, 609aeac0e44SVaradarajan, Charulatha }; 610aeac0e44SVaradarajan, Charulatha 611aeac0e44SVaradarajan, Charulatha /* l4_wkup -> gpio3 */ 612aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_addr_space omap2430_gpio3_addr_space[] = { 613aeac0e44SVaradarajan, Charulatha { 614aeac0e44SVaradarajan, Charulatha .pa_start = 0x49010000, 615aeac0e44SVaradarajan, Charulatha .pa_end = 0x490101ff, 616aeac0e44SVaradarajan, Charulatha .flags = ADDR_TYPE_RT 617aeac0e44SVaradarajan, Charulatha }, 618aeac0e44SVaradarajan, Charulatha }; 619aeac0e44SVaradarajan, Charulatha 620aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio3 = { 621aeac0e44SVaradarajan, Charulatha .master = &omap2430_l4_wkup_hwmod, 622aeac0e44SVaradarajan, Charulatha .slave = &omap2430_gpio3_hwmod, 623aeac0e44SVaradarajan, Charulatha .clk = "gpios_ick", 624aeac0e44SVaradarajan, Charulatha .addr = omap2430_gpio3_addr_space, 625aeac0e44SVaradarajan, Charulatha .addr_cnt = ARRAY_SIZE(omap2430_gpio3_addr_space), 626aeac0e44SVaradarajan, Charulatha .user = OCP_USER_MPU | OCP_USER_SDMA, 627aeac0e44SVaradarajan, Charulatha }; 628aeac0e44SVaradarajan, Charulatha 629aeac0e44SVaradarajan, Charulatha /* l4_wkup -> gpio4 */ 630aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_addr_space omap2430_gpio4_addr_space[] = { 631aeac0e44SVaradarajan, Charulatha { 632aeac0e44SVaradarajan, Charulatha .pa_start = 0x49012000, 633aeac0e44SVaradarajan, Charulatha .pa_end = 0x490121ff, 634aeac0e44SVaradarajan, Charulatha .flags = ADDR_TYPE_RT 635aeac0e44SVaradarajan, Charulatha }, 636aeac0e44SVaradarajan, Charulatha }; 637aeac0e44SVaradarajan, Charulatha 638aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio4 = { 639aeac0e44SVaradarajan, Charulatha .master = &omap2430_l4_wkup_hwmod, 640aeac0e44SVaradarajan, Charulatha .slave = &omap2430_gpio4_hwmod, 641aeac0e44SVaradarajan, Charulatha .clk = "gpios_ick", 642aeac0e44SVaradarajan, Charulatha .addr = omap2430_gpio4_addr_space, 643aeac0e44SVaradarajan, Charulatha .addr_cnt = ARRAY_SIZE(omap2430_gpio4_addr_space), 644aeac0e44SVaradarajan, Charulatha .user = OCP_USER_MPU | OCP_USER_SDMA, 645aeac0e44SVaradarajan, Charulatha }; 646aeac0e44SVaradarajan, Charulatha 647aeac0e44SVaradarajan, Charulatha /* l4_core -> gpio5 */ 648aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_addr_space omap2430_gpio5_addr_space[] = { 649aeac0e44SVaradarajan, Charulatha { 650aeac0e44SVaradarajan, Charulatha .pa_start = 0x480B6000, 651aeac0e44SVaradarajan, Charulatha .pa_end = 0x480B61ff, 652aeac0e44SVaradarajan, Charulatha .flags = ADDR_TYPE_RT 653aeac0e44SVaradarajan, Charulatha }, 654aeac0e44SVaradarajan, Charulatha }; 655aeac0e44SVaradarajan, Charulatha 656aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_ocp_if omap2430_l4_core__gpio5 = { 657aeac0e44SVaradarajan, Charulatha .master = &omap2430_l4_core_hwmod, 658aeac0e44SVaradarajan, Charulatha .slave = &omap2430_gpio5_hwmod, 659aeac0e44SVaradarajan, Charulatha .clk = "gpio5_ick", 660aeac0e44SVaradarajan, Charulatha .addr = omap2430_gpio5_addr_space, 661aeac0e44SVaradarajan, Charulatha .addr_cnt = ARRAY_SIZE(omap2430_gpio5_addr_space), 662aeac0e44SVaradarajan, Charulatha .user = OCP_USER_MPU | OCP_USER_SDMA, 663aeac0e44SVaradarajan, Charulatha }; 664aeac0e44SVaradarajan, Charulatha 665aeac0e44SVaradarajan, Charulatha /* gpio dev_attr */ 666aeac0e44SVaradarajan, Charulatha static struct omap_gpio_dev_attr gpio_dev_attr = { 667aeac0e44SVaradarajan, Charulatha .bank_width = 32, 668aeac0e44SVaradarajan, Charulatha .dbck_flag = false, 669aeac0e44SVaradarajan, Charulatha }; 670aeac0e44SVaradarajan, Charulatha 671aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_class_sysconfig omap243x_gpio_sysc = { 672aeac0e44SVaradarajan, Charulatha .rev_offs = 0x0000, 673aeac0e44SVaradarajan, Charulatha .sysc_offs = 0x0010, 674aeac0e44SVaradarajan, Charulatha .syss_offs = 0x0014, 675aeac0e44SVaradarajan, Charulatha .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE | 676d73d65faSAvinash.H.M SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | 677d73d65faSAvinash.H.M SYSS_HAS_RESET_STATUS), 678aeac0e44SVaradarajan, Charulatha .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), 679aeac0e44SVaradarajan, Charulatha .sysc_fields = &omap_hwmod_sysc_type1, 680aeac0e44SVaradarajan, Charulatha }; 681aeac0e44SVaradarajan, Charulatha 682aeac0e44SVaradarajan, Charulatha /* 683aeac0e44SVaradarajan, Charulatha * 'gpio' class 684aeac0e44SVaradarajan, Charulatha * general purpose io module 685aeac0e44SVaradarajan, Charulatha */ 686aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_class omap243x_gpio_hwmod_class = { 687aeac0e44SVaradarajan, Charulatha .name = "gpio", 688aeac0e44SVaradarajan, Charulatha .sysc = &omap243x_gpio_sysc, 689aeac0e44SVaradarajan, Charulatha .rev = 0, 690aeac0e44SVaradarajan, Charulatha }; 691aeac0e44SVaradarajan, Charulatha 692aeac0e44SVaradarajan, Charulatha /* gpio1 */ 693aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_irq_info omap243x_gpio1_irqs[] = { 694aeac0e44SVaradarajan, Charulatha { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */ 695aeac0e44SVaradarajan, Charulatha }; 696aeac0e44SVaradarajan, Charulatha 697aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = { 698aeac0e44SVaradarajan, Charulatha &omap2430_l4_wkup__gpio1, 699aeac0e44SVaradarajan, Charulatha }; 700aeac0e44SVaradarajan, Charulatha 701aeac0e44SVaradarajan, Charulatha static struct omap_hwmod omap2430_gpio1_hwmod = { 702aeac0e44SVaradarajan, Charulatha .name = "gpio1", 703aeac0e44SVaradarajan, Charulatha .mpu_irqs = omap243x_gpio1_irqs, 704aeac0e44SVaradarajan, Charulatha .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio1_irqs), 705aeac0e44SVaradarajan, Charulatha .main_clk = "gpios_fck", 706aeac0e44SVaradarajan, Charulatha .prcm = { 707aeac0e44SVaradarajan, Charulatha .omap2 = { 708aeac0e44SVaradarajan, Charulatha .prcm_reg_id = 1, 709aeac0e44SVaradarajan, Charulatha .module_bit = OMAP24XX_EN_GPIOS_SHIFT, 710aeac0e44SVaradarajan, Charulatha .module_offs = WKUP_MOD, 711aeac0e44SVaradarajan, Charulatha .idlest_reg_id = 1, 712aeac0e44SVaradarajan, Charulatha .idlest_idle_bit = OMAP24XX_EN_GPIOS_SHIFT, 713aeac0e44SVaradarajan, Charulatha }, 714aeac0e44SVaradarajan, Charulatha }, 715aeac0e44SVaradarajan, Charulatha .slaves = omap2430_gpio1_slaves, 716aeac0e44SVaradarajan, Charulatha .slaves_cnt = ARRAY_SIZE(omap2430_gpio1_slaves), 717aeac0e44SVaradarajan, Charulatha .class = &omap243x_gpio_hwmod_class, 718aeac0e44SVaradarajan, Charulatha .dev_attr = &gpio_dev_attr, 719aeac0e44SVaradarajan, Charulatha .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 720aeac0e44SVaradarajan, Charulatha }; 721aeac0e44SVaradarajan, Charulatha 722aeac0e44SVaradarajan, Charulatha /* gpio2 */ 723aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_irq_info omap243x_gpio2_irqs[] = { 724aeac0e44SVaradarajan, Charulatha { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */ 725aeac0e44SVaradarajan, Charulatha }; 726aeac0e44SVaradarajan, Charulatha 727aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_ocp_if *omap2430_gpio2_slaves[] = { 728aeac0e44SVaradarajan, Charulatha &omap2430_l4_wkup__gpio2, 729aeac0e44SVaradarajan, Charulatha }; 730aeac0e44SVaradarajan, Charulatha 731aeac0e44SVaradarajan, Charulatha static struct omap_hwmod omap2430_gpio2_hwmod = { 732aeac0e44SVaradarajan, Charulatha .name = "gpio2", 733aeac0e44SVaradarajan, Charulatha .mpu_irqs = omap243x_gpio2_irqs, 734aeac0e44SVaradarajan, Charulatha .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio2_irqs), 735aeac0e44SVaradarajan, Charulatha .main_clk = "gpios_fck", 736aeac0e44SVaradarajan, Charulatha .prcm = { 737aeac0e44SVaradarajan, Charulatha .omap2 = { 738aeac0e44SVaradarajan, Charulatha .prcm_reg_id = 1, 739aeac0e44SVaradarajan, Charulatha .module_bit = OMAP24XX_EN_GPIOS_SHIFT, 740aeac0e44SVaradarajan, Charulatha .module_offs = WKUP_MOD, 741aeac0e44SVaradarajan, Charulatha .idlest_reg_id = 1, 742aeac0e44SVaradarajan, Charulatha .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT, 743aeac0e44SVaradarajan, Charulatha }, 744aeac0e44SVaradarajan, Charulatha }, 745aeac0e44SVaradarajan, Charulatha .slaves = omap2430_gpio2_slaves, 746aeac0e44SVaradarajan, Charulatha .slaves_cnt = ARRAY_SIZE(omap2430_gpio2_slaves), 747aeac0e44SVaradarajan, Charulatha .class = &omap243x_gpio_hwmod_class, 748aeac0e44SVaradarajan, Charulatha .dev_attr = &gpio_dev_attr, 749aeac0e44SVaradarajan, Charulatha .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 750aeac0e44SVaradarajan, Charulatha }; 751aeac0e44SVaradarajan, Charulatha 752aeac0e44SVaradarajan, Charulatha /* gpio3 */ 753aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_irq_info omap243x_gpio3_irqs[] = { 754aeac0e44SVaradarajan, Charulatha { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */ 755aeac0e44SVaradarajan, Charulatha }; 756aeac0e44SVaradarajan, Charulatha 757aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_ocp_if *omap2430_gpio3_slaves[] = { 758aeac0e44SVaradarajan, Charulatha &omap2430_l4_wkup__gpio3, 759aeac0e44SVaradarajan, Charulatha }; 760aeac0e44SVaradarajan, Charulatha 761aeac0e44SVaradarajan, Charulatha static struct omap_hwmod omap2430_gpio3_hwmod = { 762aeac0e44SVaradarajan, Charulatha .name = "gpio3", 763aeac0e44SVaradarajan, Charulatha .mpu_irqs = omap243x_gpio3_irqs, 764aeac0e44SVaradarajan, Charulatha .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio3_irqs), 765aeac0e44SVaradarajan, Charulatha .main_clk = "gpios_fck", 766aeac0e44SVaradarajan, Charulatha .prcm = { 767aeac0e44SVaradarajan, Charulatha .omap2 = { 768aeac0e44SVaradarajan, Charulatha .prcm_reg_id = 1, 769aeac0e44SVaradarajan, Charulatha .module_bit = OMAP24XX_EN_GPIOS_SHIFT, 770aeac0e44SVaradarajan, Charulatha .module_offs = WKUP_MOD, 771aeac0e44SVaradarajan, Charulatha .idlest_reg_id = 1, 772aeac0e44SVaradarajan, Charulatha .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT, 773aeac0e44SVaradarajan, Charulatha }, 774aeac0e44SVaradarajan, Charulatha }, 775aeac0e44SVaradarajan, Charulatha .slaves = omap2430_gpio3_slaves, 776aeac0e44SVaradarajan, Charulatha .slaves_cnt = ARRAY_SIZE(omap2430_gpio3_slaves), 777aeac0e44SVaradarajan, Charulatha .class = &omap243x_gpio_hwmod_class, 778aeac0e44SVaradarajan, Charulatha .dev_attr = &gpio_dev_attr, 779aeac0e44SVaradarajan, Charulatha .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 780aeac0e44SVaradarajan, Charulatha }; 781aeac0e44SVaradarajan, Charulatha 782aeac0e44SVaradarajan, Charulatha /* gpio4 */ 783aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_irq_info omap243x_gpio4_irqs[] = { 784aeac0e44SVaradarajan, Charulatha { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */ 785aeac0e44SVaradarajan, Charulatha }; 786aeac0e44SVaradarajan, Charulatha 787aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_ocp_if *omap2430_gpio4_slaves[] = { 788aeac0e44SVaradarajan, Charulatha &omap2430_l4_wkup__gpio4, 789aeac0e44SVaradarajan, Charulatha }; 790aeac0e44SVaradarajan, Charulatha 791aeac0e44SVaradarajan, Charulatha static struct omap_hwmod omap2430_gpio4_hwmod = { 792aeac0e44SVaradarajan, Charulatha .name = "gpio4", 793aeac0e44SVaradarajan, Charulatha .mpu_irqs = omap243x_gpio4_irqs, 794aeac0e44SVaradarajan, Charulatha .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio4_irqs), 795aeac0e44SVaradarajan, Charulatha .main_clk = "gpios_fck", 796aeac0e44SVaradarajan, Charulatha .prcm = { 797aeac0e44SVaradarajan, Charulatha .omap2 = { 798aeac0e44SVaradarajan, Charulatha .prcm_reg_id = 1, 799aeac0e44SVaradarajan, Charulatha .module_bit = OMAP24XX_EN_GPIOS_SHIFT, 800aeac0e44SVaradarajan, Charulatha .module_offs = WKUP_MOD, 801aeac0e44SVaradarajan, Charulatha .idlest_reg_id = 1, 802aeac0e44SVaradarajan, Charulatha .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT, 803aeac0e44SVaradarajan, Charulatha }, 804aeac0e44SVaradarajan, Charulatha }, 805aeac0e44SVaradarajan, Charulatha .slaves = omap2430_gpio4_slaves, 806aeac0e44SVaradarajan, Charulatha .slaves_cnt = ARRAY_SIZE(omap2430_gpio4_slaves), 807aeac0e44SVaradarajan, Charulatha .class = &omap243x_gpio_hwmod_class, 808aeac0e44SVaradarajan, Charulatha .dev_attr = &gpio_dev_attr, 809aeac0e44SVaradarajan, Charulatha .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 810aeac0e44SVaradarajan, Charulatha }; 811aeac0e44SVaradarajan, Charulatha 812aeac0e44SVaradarajan, Charulatha /* gpio5 */ 813aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_irq_info omap243x_gpio5_irqs[] = { 814aeac0e44SVaradarajan, Charulatha { .irq = 33 }, /* INT_24XX_GPIO_BANK5 */ 815aeac0e44SVaradarajan, Charulatha }; 816aeac0e44SVaradarajan, Charulatha 817aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_ocp_if *omap2430_gpio5_slaves[] = { 818aeac0e44SVaradarajan, Charulatha &omap2430_l4_core__gpio5, 819aeac0e44SVaradarajan, Charulatha }; 820aeac0e44SVaradarajan, Charulatha 821aeac0e44SVaradarajan, Charulatha static struct omap_hwmod omap2430_gpio5_hwmod = { 822aeac0e44SVaradarajan, Charulatha .name = "gpio5", 823aeac0e44SVaradarajan, Charulatha .mpu_irqs = omap243x_gpio5_irqs, 824aeac0e44SVaradarajan, Charulatha .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio5_irqs), 825aeac0e44SVaradarajan, Charulatha .main_clk = "gpio5_fck", 826aeac0e44SVaradarajan, Charulatha .prcm = { 827aeac0e44SVaradarajan, Charulatha .omap2 = { 828aeac0e44SVaradarajan, Charulatha .prcm_reg_id = 2, 829aeac0e44SVaradarajan, Charulatha .module_bit = OMAP2430_EN_GPIO5_SHIFT, 830aeac0e44SVaradarajan, Charulatha .module_offs = CORE_MOD, 831aeac0e44SVaradarajan, Charulatha .idlest_reg_id = 2, 832aeac0e44SVaradarajan, Charulatha .idlest_idle_bit = OMAP2430_ST_GPIO5_SHIFT, 833aeac0e44SVaradarajan, Charulatha }, 834aeac0e44SVaradarajan, Charulatha }, 835aeac0e44SVaradarajan, Charulatha .slaves = omap2430_gpio5_slaves, 836aeac0e44SVaradarajan, Charulatha .slaves_cnt = ARRAY_SIZE(omap2430_gpio5_slaves), 837aeac0e44SVaradarajan, Charulatha .class = &omap243x_gpio_hwmod_class, 838aeac0e44SVaradarajan, Charulatha .dev_attr = &gpio_dev_attr, 839aeac0e44SVaradarajan, Charulatha .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 840aeac0e44SVaradarajan, Charulatha }; 841aeac0e44SVaradarajan, Charulatha 84282cbd1aeSG, Manjunath Kondaiah /* dma_system */ 84382cbd1aeSG, Manjunath Kondaiah static struct omap_hwmod_class_sysconfig omap2430_dma_sysc = { 84482cbd1aeSG, Manjunath Kondaiah .rev_offs = 0x0000, 84582cbd1aeSG, Manjunath Kondaiah .sysc_offs = 0x002c, 84682cbd1aeSG, Manjunath Kondaiah .syss_offs = 0x0028, 84782cbd1aeSG, Manjunath Kondaiah .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE | 84882cbd1aeSG, Manjunath Kondaiah SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE | 849d73d65faSAvinash.H.M SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), 85082cbd1aeSG, Manjunath Kondaiah .idlemodes = (MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), 85182cbd1aeSG, Manjunath Kondaiah .sysc_fields = &omap_hwmod_sysc_type1, 85282cbd1aeSG, Manjunath Kondaiah }; 85382cbd1aeSG, Manjunath Kondaiah 85482cbd1aeSG, Manjunath Kondaiah static struct omap_hwmod_class omap2430_dma_hwmod_class = { 85582cbd1aeSG, Manjunath Kondaiah .name = "dma", 85682cbd1aeSG, Manjunath Kondaiah .sysc = &omap2430_dma_sysc, 85782cbd1aeSG, Manjunath Kondaiah }; 85882cbd1aeSG, Manjunath Kondaiah 85982cbd1aeSG, Manjunath Kondaiah /* dma attributes */ 86082cbd1aeSG, Manjunath Kondaiah static struct omap_dma_dev_attr dma_dev_attr = { 86182cbd1aeSG, Manjunath Kondaiah .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY | 86282cbd1aeSG, Manjunath Kondaiah IS_CSSA_32 | IS_CDSA_32 | IS_RW_PRIORITY, 86382cbd1aeSG, Manjunath Kondaiah .lch_count = 32, 86482cbd1aeSG, Manjunath Kondaiah }; 86582cbd1aeSG, Manjunath Kondaiah 86682cbd1aeSG, Manjunath Kondaiah static struct omap_hwmod_irq_info omap2430_dma_system_irqs[] = { 86782cbd1aeSG, Manjunath Kondaiah { .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */ 86882cbd1aeSG, Manjunath Kondaiah { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ 86982cbd1aeSG, Manjunath Kondaiah { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ 87082cbd1aeSG, Manjunath Kondaiah { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ 87182cbd1aeSG, Manjunath Kondaiah }; 87282cbd1aeSG, Manjunath Kondaiah 87382cbd1aeSG, Manjunath Kondaiah static struct omap_hwmod_addr_space omap2430_dma_system_addrs[] = { 87482cbd1aeSG, Manjunath Kondaiah { 87582cbd1aeSG, Manjunath Kondaiah .pa_start = 0x48056000, 87682cbd1aeSG, Manjunath Kondaiah .pa_end = 0x4a0560ff, 87782cbd1aeSG, Manjunath Kondaiah .flags = ADDR_TYPE_RT 87882cbd1aeSG, Manjunath Kondaiah }, 87982cbd1aeSG, Manjunath Kondaiah }; 88082cbd1aeSG, Manjunath Kondaiah 88182cbd1aeSG, Manjunath Kondaiah /* dma_system -> L3 */ 88282cbd1aeSG, Manjunath Kondaiah static struct omap_hwmod_ocp_if omap2430_dma_system__l3 = { 88382cbd1aeSG, Manjunath Kondaiah .master = &omap2430_dma_system_hwmod, 88482cbd1aeSG, Manjunath Kondaiah .slave = &omap2430_l3_main_hwmod, 88582cbd1aeSG, Manjunath Kondaiah .clk = "core_l3_ck", 88682cbd1aeSG, Manjunath Kondaiah .user = OCP_USER_MPU | OCP_USER_SDMA, 88782cbd1aeSG, Manjunath Kondaiah }; 88882cbd1aeSG, Manjunath Kondaiah 88982cbd1aeSG, Manjunath Kondaiah /* dma_system master ports */ 89082cbd1aeSG, Manjunath Kondaiah static struct omap_hwmod_ocp_if *omap2430_dma_system_masters[] = { 89182cbd1aeSG, Manjunath Kondaiah &omap2430_dma_system__l3, 89282cbd1aeSG, Manjunath Kondaiah }; 89382cbd1aeSG, Manjunath Kondaiah 89482cbd1aeSG, Manjunath Kondaiah /* l4_core -> dma_system */ 89582cbd1aeSG, Manjunath Kondaiah static struct omap_hwmod_ocp_if omap2430_l4_core__dma_system = { 89682cbd1aeSG, Manjunath Kondaiah .master = &omap2430_l4_core_hwmod, 89782cbd1aeSG, Manjunath Kondaiah .slave = &omap2430_dma_system_hwmod, 89882cbd1aeSG, Manjunath Kondaiah .clk = "sdma_ick", 89982cbd1aeSG, Manjunath Kondaiah .addr = omap2430_dma_system_addrs, 90082cbd1aeSG, Manjunath Kondaiah .addr_cnt = ARRAY_SIZE(omap2430_dma_system_addrs), 90182cbd1aeSG, Manjunath Kondaiah .user = OCP_USER_MPU | OCP_USER_SDMA, 90282cbd1aeSG, Manjunath Kondaiah }; 90382cbd1aeSG, Manjunath Kondaiah 90482cbd1aeSG, Manjunath Kondaiah /* dma_system slave ports */ 90582cbd1aeSG, Manjunath Kondaiah static struct omap_hwmod_ocp_if *omap2430_dma_system_slaves[] = { 90682cbd1aeSG, Manjunath Kondaiah &omap2430_l4_core__dma_system, 90782cbd1aeSG, Manjunath Kondaiah }; 90882cbd1aeSG, Manjunath Kondaiah 90982cbd1aeSG, Manjunath Kondaiah static struct omap_hwmod omap2430_dma_system_hwmod = { 91082cbd1aeSG, Manjunath Kondaiah .name = "dma", 91182cbd1aeSG, Manjunath Kondaiah .class = &omap2430_dma_hwmod_class, 91282cbd1aeSG, Manjunath Kondaiah .mpu_irqs = omap2430_dma_system_irqs, 91382cbd1aeSG, Manjunath Kondaiah .mpu_irqs_cnt = ARRAY_SIZE(omap2430_dma_system_irqs), 91482cbd1aeSG, Manjunath Kondaiah .main_clk = "core_l3_ck", 91582cbd1aeSG, Manjunath Kondaiah .slaves = omap2430_dma_system_slaves, 91682cbd1aeSG, Manjunath Kondaiah .slaves_cnt = ARRAY_SIZE(omap2430_dma_system_slaves), 91782cbd1aeSG, Manjunath Kondaiah .masters = omap2430_dma_system_masters, 91882cbd1aeSG, Manjunath Kondaiah .masters_cnt = ARRAY_SIZE(omap2430_dma_system_masters), 91982cbd1aeSG, Manjunath Kondaiah .dev_attr = &dma_dev_attr, 92082cbd1aeSG, Manjunath Kondaiah .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 92182cbd1aeSG, Manjunath Kondaiah .flags = HWMOD_NO_IDLEST, 92282cbd1aeSG, Manjunath Kondaiah }; 92382cbd1aeSG, Manjunath Kondaiah 9247359154eSPaul Walmsley static __initdata struct omap_hwmod *omap2430_hwmods[] = { 9254a7cf90aSKevin Hilman &omap2430_l3_main_hwmod, 9267359154eSPaul Walmsley &omap2430_l4_core_hwmod, 9277359154eSPaul Walmsley &omap2430_l4_wkup_hwmod, 9287359154eSPaul Walmsley &omap2430_mpu_hwmod, 92908072acfSPaul Walmsley &omap2430_iva_hwmod, 930165e2161SVaradarajan, Charulatha &omap2430_wd_timer2_hwmod, 931046465b7SKevin Hilman &omap2430_uart1_hwmod, 932046465b7SKevin Hilman &omap2430_uart2_hwmod, 933046465b7SKevin Hilman &omap2430_uart3_hwmod, 9342004290fSPaul Walmsley &omap2430_i2c1_hwmod, 9352004290fSPaul Walmsley &omap2430_i2c2_hwmod, 936aeac0e44SVaradarajan, Charulatha 937aeac0e44SVaradarajan, Charulatha /* gpio class */ 938aeac0e44SVaradarajan, Charulatha &omap2430_gpio1_hwmod, 939aeac0e44SVaradarajan, Charulatha &omap2430_gpio2_hwmod, 940aeac0e44SVaradarajan, Charulatha &omap2430_gpio3_hwmod, 941aeac0e44SVaradarajan, Charulatha &omap2430_gpio4_hwmod, 942aeac0e44SVaradarajan, Charulatha &omap2430_gpio5_hwmod, 94382cbd1aeSG, Manjunath Kondaiah 94482cbd1aeSG, Manjunath Kondaiah /* dma_system class*/ 94582cbd1aeSG, Manjunath Kondaiah &omap2430_dma_system_hwmod, 9467359154eSPaul Walmsley NULL, 9477359154eSPaul Walmsley }; 9487359154eSPaul Walmsley 9497359154eSPaul Walmsley int __init omap2430_hwmod_init(void) 9507359154eSPaul Walmsley { 9517359154eSPaul Walmsley return omap_hwmod_init(omap2430_hwmods); 9527359154eSPaul Walmsley } 953