1d2912cb1SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 27359154eSPaul Walmsley /* 37359154eSPaul Walmsley * omap_hwmod_2430_data.c - hardware modules present on the OMAP2430 chips 47359154eSPaul Walmsley * 578183f3fSPaul Walmsley * Copyright (C) 2009-2011 Nokia Corporation 60a78c5c5SPaul Walmsley * Copyright (C) 2012 Texas Instruments, Inc. 77359154eSPaul Walmsley * Paul Walmsley 87359154eSPaul Walmsley * 97359154eSPaul Walmsley * XXX handle crossbar/shared link difference for L3? 107359154eSPaul Walmsley * XXX these should be marked initdata for multi-OMAP kernels 117359154eSPaul Walmsley */ 123a8761c0STony Lindgren 1379fc540fSWolfram Sang #include <linux/platform_data/i2c-omap.h> 1455143438SAndreas Fenkart #include <linux/platform_data/hsmmc-omap.h> 1545c3eb7dSTony Lindgren #include <linux/omap-dma.h> 162a296c8fSTony Lindgren 172a296c8fSTony Lindgren #include "omap_hwmod.h" 181e0f51a9STony Lindgren #include "l3_2xxx.h" 197359154eSPaul Walmsley 20dbc04161STony Lindgren #include "soc.h" 2143b40992SPaul Walmsley #include "omap_hwmod_common_data.h" 227359154eSPaul Walmsley #include "prm-regbits-24xx.h" 23165e2161SVaradarajan, Charulatha #include "cm-regbits-24xx.h" 243a8761c0STony Lindgren #include "i2c.h" 25ff2516fbSPaul Walmsley #include "wd_timer.h" 267359154eSPaul Walmsley 277359154eSPaul Walmsley /* 287359154eSPaul Walmsley * OMAP2430 hardware module integration data 297359154eSPaul Walmsley * 30844a3b63SPaul Walmsley * All of the data in this section should be autogeneratable from the 317359154eSPaul Walmsley * TI hardware database or other technical documentation. Data that 327359154eSPaul Walmsley * is driver-specific or driver-kernel integration-specific belongs 337359154eSPaul Walmsley * elsewhere. 347359154eSPaul Walmsley */ 357359154eSPaul Walmsley 36844a3b63SPaul Walmsley /* 37844a3b63SPaul Walmsley * IP blocks 38844a3b63SPaul Walmsley */ 39de56dbb6SSenthilvadivu Guruswamy 40844a3b63SPaul Walmsley /* IVA2 (IVA2) */ 413af35fbcSPaul Walmsley static struct omap_hwmod_rst_info omap2430_iva_resets[] = { 423af35fbcSPaul Walmsley { .name = "logic", .rst_shift = 0 }, 433af35fbcSPaul Walmsley { .name = "mmu", .rst_shift = 1 }, 443af35fbcSPaul Walmsley }; 453af35fbcSPaul Walmsley 4608072acfSPaul Walmsley static struct omap_hwmod omap2430_iva_hwmod = { 4708072acfSPaul Walmsley .name = "iva", 4808072acfSPaul Walmsley .class = &iva_hwmod_class, 493af35fbcSPaul Walmsley .clkdm_name = "dsp_clkdm", 503af35fbcSPaul Walmsley .rst_lines = omap2430_iva_resets, 513af35fbcSPaul Walmsley .rst_lines_cnt = ARRAY_SIZE(omap2430_iva_resets), 523af35fbcSPaul Walmsley .main_clk = "dsp_fck", 5308072acfSPaul Walmsley }; 5408072acfSPaul Walmsley 552004290fSPaul Walmsley /* I2C common */ 562004290fSPaul Walmsley static struct omap_hwmod_class_sysconfig i2c_sysc = { 572004290fSPaul Walmsley .rev_offs = 0x00, 582004290fSPaul Walmsley .sysc_offs = 0x20, 592004290fSPaul Walmsley .syss_offs = 0x10, 60d73d65faSAvinash.H.M .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | 61d73d65faSAvinash.H.M SYSS_HAS_RESET_STATUS), 622004290fSPaul Walmsley .sysc_fields = &omap_hwmod_sysc_type1, 632004290fSPaul Walmsley }; 642004290fSPaul Walmsley 652004290fSPaul Walmsley static struct omap_hwmod_class i2c_class = { 662004290fSPaul Walmsley .name = "i2c", 672004290fSPaul Walmsley .sysc = &i2c_sysc, 686d3c55fdSAvinash.H.M .reset = &omap_i2c_reset, 692004290fSPaul Walmsley }; 702004290fSPaul Walmsley 7150ebb777SBenoit Cousson /* I2C1 */ 722004290fSPaul Walmsley static struct omap_hwmod omap2430_i2c1_hwmod = { 732004290fSPaul Walmsley .name = "i2c1", 743e600522SAndy Green .flags = HWMOD_16BIT_REG, 752004290fSPaul Walmsley .main_clk = "i2chs1_fck", 762004290fSPaul Walmsley .prcm = { 772004290fSPaul Walmsley .omap2 = { 782004290fSPaul Walmsley /* 792004290fSPaul Walmsley * NOTE: The CM_FCLKEN* and CM_ICLKEN* for 802004290fSPaul Walmsley * I2CHS IP's do not follow the usual pattern. 812004290fSPaul Walmsley * prcm_reg_id alone cannot be used to program 822004290fSPaul Walmsley * the iclk and fclk. Needs to be handled using 8325985edcSLucas De Marchi * additional flags when clk handling is moved 842004290fSPaul Walmsley * to hwmod framework. 852004290fSPaul Walmsley */ 862004290fSPaul Walmsley .module_offs = CORE_MOD, 872004290fSPaul Walmsley .idlest_reg_id = 1, 882004290fSPaul Walmsley .idlest_idle_bit = OMAP2430_ST_I2CHS1_SHIFT, 892004290fSPaul Walmsley }, 902004290fSPaul Walmsley }, 912004290fSPaul Walmsley .class = &i2c_class, 922004290fSPaul Walmsley }; 932004290fSPaul Walmsley 942004290fSPaul Walmsley /* I2C2 */ 952004290fSPaul Walmsley static struct omap_hwmod omap2430_i2c2_hwmod = { 962004290fSPaul Walmsley .name = "i2c2", 973e600522SAndy Green .flags = HWMOD_16BIT_REG, 982004290fSPaul Walmsley .main_clk = "i2chs2_fck", 992004290fSPaul Walmsley .prcm = { 1002004290fSPaul Walmsley .omap2 = { 1012004290fSPaul Walmsley .module_offs = CORE_MOD, 1022004290fSPaul Walmsley .idlest_reg_id = 1, 1032004290fSPaul Walmsley .idlest_idle_bit = OMAP2430_ST_I2CHS2_SHIFT, 1042004290fSPaul Walmsley }, 1052004290fSPaul Walmsley }, 1062004290fSPaul Walmsley .class = &i2c_class, 1072004290fSPaul Walmsley }; 1082004290fSPaul Walmsley 109aeac0e44SVaradarajan, Charulatha /* gpio5 */ 110aeac0e44SVaradarajan, Charulatha static struct omap_hwmod omap2430_gpio5_hwmod = { 111aeac0e44SVaradarajan, Charulatha .name = "gpio5", 112f95440caSAvinash.H.M .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 113aeac0e44SVaradarajan, Charulatha .main_clk = "gpio5_fck", 114aeac0e44SVaradarajan, Charulatha .prcm = { 115aeac0e44SVaradarajan, Charulatha .omap2 = { 116aeac0e44SVaradarajan, Charulatha .module_offs = CORE_MOD, 117aeac0e44SVaradarajan, Charulatha .idlest_reg_id = 2, 118aeac0e44SVaradarajan, Charulatha .idlest_idle_bit = OMAP2430_ST_GPIO5_SHIFT, 119aeac0e44SVaradarajan, Charulatha }, 120aeac0e44SVaradarajan, Charulatha }, 121273b9465SPaul Walmsley .class = &omap2xxx_gpio_hwmod_class, 122aeac0e44SVaradarajan, Charulatha }; 123aeac0e44SVaradarajan, Charulatha 12482cbd1aeSG, Manjunath Kondaiah /* dma attributes */ 12582cbd1aeSG, Manjunath Kondaiah static struct omap_dma_dev_attr dma_dev_attr = { 12682cbd1aeSG, Manjunath Kondaiah .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY | 12782cbd1aeSG, Manjunath Kondaiah IS_CSSA_32 | IS_CDSA_32 | IS_RW_PRIORITY, 12882cbd1aeSG, Manjunath Kondaiah .lch_count = 32, 12982cbd1aeSG, Manjunath Kondaiah }; 13082cbd1aeSG, Manjunath Kondaiah 13182cbd1aeSG, Manjunath Kondaiah static struct omap_hwmod omap2430_dma_system_hwmod = { 13282cbd1aeSG, Manjunath Kondaiah .name = "dma", 133273b9465SPaul Walmsley .class = &omap2xxx_dma_hwmod_class, 13482cbd1aeSG, Manjunath Kondaiah .main_clk = "core_l3_ck", 13582cbd1aeSG, Manjunath Kondaiah .dev_attr = &dma_dev_attr, 13682cbd1aeSG, Manjunath Kondaiah .flags = HWMOD_NO_IDLEST, 13782cbd1aeSG, Manjunath Kondaiah }; 13882cbd1aeSG, Manjunath Kondaiah 139fca1ab55SOmar Ramirez Luna /* mailbox */ 140fca1ab55SOmar Ramirez Luna static struct omap_hwmod omap2430_mailbox_hwmod = { 141fca1ab55SOmar Ramirez Luna .name = "mailbox", 142273b9465SPaul Walmsley .class = &omap2xxx_mailbox_hwmod_class, 143fca1ab55SOmar Ramirez Luna .main_clk = "mailboxes_ick", 144fca1ab55SOmar Ramirez Luna .prcm = { 145fca1ab55SOmar Ramirez Luna .omap2 = { 146fca1ab55SOmar Ramirez Luna .module_offs = CORE_MOD, 147fca1ab55SOmar Ramirez Luna .idlest_reg_id = 1, 148fca1ab55SOmar Ramirez Luna .idlest_idle_bit = OMAP24XX_ST_MAILBOXES_SHIFT, 149fca1ab55SOmar Ramirez Luna }, 150fca1ab55SOmar Ramirez Luna }, 151fca1ab55SOmar Ramirez Luna }; 152fca1ab55SOmar Ramirez Luna 1537f904c78SCharulatha V /* mcspi3 */ 1547f904c78SCharulatha V static struct omap_hwmod omap2430_mcspi3_hwmod = { 155bec93811SPaul Walmsley .name = "mcspi3", 1567f904c78SCharulatha V .main_clk = "mcspi3_fck", 1577f904c78SCharulatha V .prcm = { 1587f904c78SCharulatha V .omap2 = { 1597f904c78SCharulatha V .module_offs = CORE_MOD, 1607f904c78SCharulatha V .idlest_reg_id = 2, 1617f904c78SCharulatha V .idlest_idle_bit = OMAP2430_ST_MCSPI3_SHIFT, 1627f904c78SCharulatha V }, 1637f904c78SCharulatha V }, 164273b9465SPaul Walmsley .class = &omap2xxx_mcspi_class, 1657f904c78SCharulatha V }; 1667f904c78SCharulatha V 167844a3b63SPaul Walmsley /* usbhsotg */ 16844d02acfSHema HK static struct omap_hwmod_class_sysconfig omap2430_usbhsotg_sysc = { 16944d02acfSHema HK .rev_offs = 0x0400, 17044d02acfSHema HK .sysc_offs = 0x0404, 17144d02acfSHema HK .syss_offs = 0x0408, 17244d02acfSHema HK .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE| 17344d02acfSHema HK SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | 17444d02acfSHema HK SYSC_HAS_AUTOIDLE), 17544d02acfSHema HK .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | 17644d02acfSHema HK MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), 17744d02acfSHema HK .sysc_fields = &omap_hwmod_sysc_type1, 17844d02acfSHema HK }; 17944d02acfSHema HK 18044d02acfSHema HK static struct omap_hwmod_class usbotg_class = { 18144d02acfSHema HK .name = "usbotg", 18244d02acfSHema HK .sysc = &omap2430_usbhsotg_sysc, 18344d02acfSHema HK }; 18444d02acfSHema HK 18544d02acfSHema HK /* usb_otg_hs */ 18644d02acfSHema HK static struct omap_hwmod omap2430_usbhsotg_hwmod = { 18744d02acfSHema HK .name = "usb_otg_hs", 18844d02acfSHema HK .main_clk = "usbhs_ick", 18944d02acfSHema HK .prcm = { 19044d02acfSHema HK .omap2 = { 19144d02acfSHema HK .module_offs = CORE_MOD, 19244d02acfSHema HK .idlest_reg_id = 1, 19344d02acfSHema HK .idlest_idle_bit = OMAP2430_ST_USBHS_SHIFT, 19444d02acfSHema HK }, 19544d02acfSHema HK }, 19644d02acfSHema HK .class = &usbotg_class, 19744d02acfSHema HK /* 19844d02acfSHema HK * Erratum ID: i479 idle_req / idle_ack mechanism potentially 19944d02acfSHema HK * broken when autoidle is enabled 20044d02acfSHema HK * workaround is to disable the autoidle bit at module level. 20144d02acfSHema HK */ 20244d02acfSHema HK .flags = HWMOD_NO_OCP_AUTOIDLE | HWMOD_SWSUP_SIDLE 20344d02acfSHema HK | HWMOD_SWSUP_MSTANDBY, 20444d02acfSHema HK }; 20544d02acfSHema HK 20637801b3dSCharulatha V /* 20737801b3dSCharulatha V * 'mcbsp' class 20837801b3dSCharulatha V * multi channel buffered serial port controller 20937801b3dSCharulatha V */ 21004aa67deSTony Lindgren 21137801b3dSCharulatha V static struct omap_hwmod_class_sysconfig omap2430_mcbsp_sysc = { 21237801b3dSCharulatha V .rev_offs = 0x007C, 21337801b3dSCharulatha V .sysc_offs = 0x008C, 21437801b3dSCharulatha V .sysc_flags = (SYSC_HAS_SOFTRESET), 21537801b3dSCharulatha V .sysc_fields = &omap_hwmod_sysc_type1, 21637801b3dSCharulatha V }; 21737801b3dSCharulatha V 21837801b3dSCharulatha V static struct omap_hwmod_class omap2430_mcbsp_hwmod_class = { 21937801b3dSCharulatha V .name = "mcbsp", 22037801b3dSCharulatha V .sysc = &omap2430_mcbsp_sysc, 22137801b3dSCharulatha V }; 22237801b3dSCharulatha V 223db382a86SPeter Ujfalusi static struct omap_hwmod_opt_clk mcbsp_opt_clks[] = { 224db382a86SPeter Ujfalusi { .role = "pad_fck", .clk = "mcbsp_clks" }, 225db382a86SPeter Ujfalusi { .role = "prcm_fck", .clk = "func_96m_ck" }, 226db382a86SPeter Ujfalusi }; 227db382a86SPeter Ujfalusi 22837801b3dSCharulatha V /* mcbsp1 */ 22937801b3dSCharulatha V static struct omap_hwmod omap2430_mcbsp1_hwmod = { 23037801b3dSCharulatha V .name = "mcbsp1", 23137801b3dSCharulatha V .class = &omap2430_mcbsp_hwmod_class, 23237801b3dSCharulatha V .main_clk = "mcbsp1_fck", 23337801b3dSCharulatha V .prcm = { 23437801b3dSCharulatha V .omap2 = { 23537801b3dSCharulatha V .module_offs = CORE_MOD, 23637801b3dSCharulatha V .idlest_reg_id = 1, 23737801b3dSCharulatha V .idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT, 23837801b3dSCharulatha V }, 23937801b3dSCharulatha V }, 240db382a86SPeter Ujfalusi .opt_clks = mcbsp_opt_clks, 241db382a86SPeter Ujfalusi .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks), 24237801b3dSCharulatha V }; 24337801b3dSCharulatha V 24437801b3dSCharulatha V /* mcbsp2 */ 24537801b3dSCharulatha V static struct omap_hwmod omap2430_mcbsp2_hwmod = { 24637801b3dSCharulatha V .name = "mcbsp2", 24737801b3dSCharulatha V .class = &omap2430_mcbsp_hwmod_class, 24837801b3dSCharulatha V .main_clk = "mcbsp2_fck", 24937801b3dSCharulatha V .prcm = { 25037801b3dSCharulatha V .omap2 = { 25137801b3dSCharulatha V .module_offs = CORE_MOD, 25237801b3dSCharulatha V .idlest_reg_id = 1, 25337801b3dSCharulatha V .idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT, 25437801b3dSCharulatha V }, 25537801b3dSCharulatha V }, 256db382a86SPeter Ujfalusi .opt_clks = mcbsp_opt_clks, 257db382a86SPeter Ujfalusi .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks), 25837801b3dSCharulatha V }; 25937801b3dSCharulatha V 26037801b3dSCharulatha V /* mcbsp3 */ 26137801b3dSCharulatha V static struct omap_hwmod omap2430_mcbsp3_hwmod = { 26237801b3dSCharulatha V .name = "mcbsp3", 26337801b3dSCharulatha V .class = &omap2430_mcbsp_hwmod_class, 26437801b3dSCharulatha V .main_clk = "mcbsp3_fck", 26537801b3dSCharulatha V .prcm = { 26637801b3dSCharulatha V .omap2 = { 26737801b3dSCharulatha V .module_offs = CORE_MOD, 26837801b3dSCharulatha V .idlest_reg_id = 2, 26937801b3dSCharulatha V .idlest_idle_bit = OMAP2430_ST_MCBSP3_SHIFT, 27037801b3dSCharulatha V }, 27137801b3dSCharulatha V }, 272db382a86SPeter Ujfalusi .opt_clks = mcbsp_opt_clks, 273db382a86SPeter Ujfalusi .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks), 27437801b3dSCharulatha V }; 27537801b3dSCharulatha V 27637801b3dSCharulatha V /* mcbsp4 */ 27737801b3dSCharulatha V static struct omap_hwmod omap2430_mcbsp4_hwmod = { 27837801b3dSCharulatha V .name = "mcbsp4", 27937801b3dSCharulatha V .class = &omap2430_mcbsp_hwmod_class, 28037801b3dSCharulatha V .main_clk = "mcbsp4_fck", 28137801b3dSCharulatha V .prcm = { 28237801b3dSCharulatha V .omap2 = { 28337801b3dSCharulatha V .module_offs = CORE_MOD, 28437801b3dSCharulatha V .idlest_reg_id = 2, 28537801b3dSCharulatha V .idlest_idle_bit = OMAP2430_ST_MCBSP4_SHIFT, 28637801b3dSCharulatha V }, 28737801b3dSCharulatha V }, 288db382a86SPeter Ujfalusi .opt_clks = mcbsp_opt_clks, 289db382a86SPeter Ujfalusi .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks), 29037801b3dSCharulatha V }; 29137801b3dSCharulatha V 29237801b3dSCharulatha V /* mcbsp5 */ 29337801b3dSCharulatha V static struct omap_hwmod omap2430_mcbsp5_hwmod = { 29437801b3dSCharulatha V .name = "mcbsp5", 29537801b3dSCharulatha V .class = &omap2430_mcbsp_hwmod_class, 29637801b3dSCharulatha V .main_clk = "mcbsp5_fck", 29737801b3dSCharulatha V .prcm = { 29837801b3dSCharulatha V .omap2 = { 29937801b3dSCharulatha V .module_offs = CORE_MOD, 30037801b3dSCharulatha V .idlest_reg_id = 2, 30137801b3dSCharulatha V .idlest_idle_bit = OMAP2430_ST_MCBSP5_SHIFT, 30237801b3dSCharulatha V }, 30337801b3dSCharulatha V }, 304db382a86SPeter Ujfalusi .opt_clks = mcbsp_opt_clks, 305db382a86SPeter Ujfalusi .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks), 30637801b3dSCharulatha V }; 30704aa67deSTony Lindgren 308bce06f37SPaul Walmsley /* MMC/SD/SDIO common */ 309bce06f37SPaul Walmsley static struct omap_hwmod_class_sysconfig omap2430_mmc_sysc = { 310bce06f37SPaul Walmsley .rev_offs = 0x1fc, 311bce06f37SPaul Walmsley .sysc_offs = 0x10, 312bce06f37SPaul Walmsley .syss_offs = 0x14, 313bce06f37SPaul Walmsley .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | 314bce06f37SPaul Walmsley SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | 315bce06f37SPaul Walmsley SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), 316bce06f37SPaul Walmsley .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), 317bce06f37SPaul Walmsley .sysc_fields = &omap_hwmod_sysc_type1, 318bce06f37SPaul Walmsley }; 319bce06f37SPaul Walmsley 320bce06f37SPaul Walmsley static struct omap_hwmod_class omap2430_mmc_class = { 321bce06f37SPaul Walmsley .name = "mmc", 322bce06f37SPaul Walmsley .sysc = &omap2430_mmc_sysc, 323bce06f37SPaul Walmsley }; 324bce06f37SPaul Walmsley 325bce06f37SPaul Walmsley /* MMC/SD/SDIO1 */ 326bce06f37SPaul Walmsley static struct omap_hwmod_opt_clk omap2430_mmc1_opt_clks[] = { 327bce06f37SPaul Walmsley { .role = "dbck", .clk = "mmchsdb1_fck" }, 328bce06f37SPaul Walmsley }; 329bce06f37SPaul Walmsley 33055143438SAndreas Fenkart static struct omap_hsmmc_dev_attr mmc1_dev_attr = { 3316ab8946fSKishore Kadiyala .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT, 3326ab8946fSKishore Kadiyala }; 3336ab8946fSKishore Kadiyala 334bce06f37SPaul Walmsley static struct omap_hwmod omap2430_mmc1_hwmod = { 335bce06f37SPaul Walmsley .name = "mmc1", 336bce06f37SPaul Walmsley .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 337bce06f37SPaul Walmsley .opt_clks = omap2430_mmc1_opt_clks, 338bce06f37SPaul Walmsley .opt_clks_cnt = ARRAY_SIZE(omap2430_mmc1_opt_clks), 339bce06f37SPaul Walmsley .main_clk = "mmchs1_fck", 340bce06f37SPaul Walmsley .prcm = { 341bce06f37SPaul Walmsley .omap2 = { 342bce06f37SPaul Walmsley .module_offs = CORE_MOD, 343bce06f37SPaul Walmsley .idlest_reg_id = 2, 344bce06f37SPaul Walmsley .idlest_idle_bit = OMAP2430_ST_MMCHS1_SHIFT, 345bce06f37SPaul Walmsley }, 346bce06f37SPaul Walmsley }, 3476ab8946fSKishore Kadiyala .dev_attr = &mmc1_dev_attr, 348bce06f37SPaul Walmsley .class = &omap2430_mmc_class, 349bce06f37SPaul Walmsley }; 350bce06f37SPaul Walmsley 351bce06f37SPaul Walmsley /* MMC/SD/SDIO2 */ 352bce06f37SPaul Walmsley static struct omap_hwmod_opt_clk omap2430_mmc2_opt_clks[] = { 353bce06f37SPaul Walmsley { .role = "dbck", .clk = "mmchsdb2_fck" }, 354bce06f37SPaul Walmsley }; 355bce06f37SPaul Walmsley 356bce06f37SPaul Walmsley static struct omap_hwmod omap2430_mmc2_hwmod = { 357bce06f37SPaul Walmsley .name = "mmc2", 358bce06f37SPaul Walmsley .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 359bce06f37SPaul Walmsley .opt_clks = omap2430_mmc2_opt_clks, 360bce06f37SPaul Walmsley .opt_clks_cnt = ARRAY_SIZE(omap2430_mmc2_opt_clks), 361bce06f37SPaul Walmsley .main_clk = "mmchs2_fck", 362bce06f37SPaul Walmsley .prcm = { 363bce06f37SPaul Walmsley .omap2 = { 364bce06f37SPaul Walmsley .module_offs = CORE_MOD, 365bce06f37SPaul Walmsley .idlest_reg_id = 2, 366bce06f37SPaul Walmsley .idlest_idle_bit = OMAP2430_ST_MMCHS2_SHIFT, 367bce06f37SPaul Walmsley }, 368bce06f37SPaul Walmsley }, 369bce06f37SPaul Walmsley .class = &omap2430_mmc_class, 370bce06f37SPaul Walmsley }; 371046465b7SKevin Hilman 372f32bd778SPaul Walmsley /* HDQ1W/1-wire */ 373f32bd778SPaul Walmsley static struct omap_hwmod omap2430_hdq1w_hwmod = { 374f32bd778SPaul Walmsley .name = "hdq1w", 375f32bd778SPaul Walmsley .main_clk = "hdq_fck", 376f32bd778SPaul Walmsley .prcm = { 377f32bd778SPaul Walmsley .omap2 = { 378f32bd778SPaul Walmsley .module_offs = CORE_MOD, 379f32bd778SPaul Walmsley .idlest_reg_id = 1, 380f32bd778SPaul Walmsley .idlest_idle_bit = OMAP24XX_ST_HDQ_SHIFT, 381f32bd778SPaul Walmsley }, 382f32bd778SPaul Walmsley }, 383f32bd778SPaul Walmsley .class = &omap2_hdq1w_class, 384f32bd778SPaul Walmsley }; 385f32bd778SPaul Walmsley 386844a3b63SPaul Walmsley /* 387844a3b63SPaul Walmsley * interfaces 388844a3b63SPaul Walmsley */ 389844a3b63SPaul Walmsley 390844a3b63SPaul Walmsley /* L3 -> L4_CORE interface */ 391844a3b63SPaul Walmsley /* l3_core -> usbhsotg interface */ 392844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_usbhsotg__l3 = { 393844a3b63SPaul Walmsley .master = &omap2430_usbhsotg_hwmod, 394cb48427eSPaul Walmsley .slave = &omap2xxx_l3_main_hwmod, 395844a3b63SPaul Walmsley .clk = "core_l3_ck", 396844a3b63SPaul Walmsley .user = OCP_USER_MPU, 397844a3b63SPaul Walmsley }; 398844a3b63SPaul Walmsley 399844a3b63SPaul Walmsley /* L4 CORE -> I2C1 interface */ 400844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__i2c1 = { 401cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 402844a3b63SPaul Walmsley .slave = &omap2430_i2c1_hwmod, 403844a3b63SPaul Walmsley .clk = "i2c1_ick", 404844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 405844a3b63SPaul Walmsley }; 406844a3b63SPaul Walmsley 407844a3b63SPaul Walmsley /* L4 CORE -> I2C2 interface */ 408844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__i2c2 = { 409cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 410844a3b63SPaul Walmsley .slave = &omap2430_i2c2_hwmod, 411844a3b63SPaul Walmsley .clk = "i2c2_ick", 412844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 413844a3b63SPaul Walmsley }; 414844a3b63SPaul Walmsley 415844a3b63SPaul Walmsley /* l4_core ->usbhsotg interface */ 416844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__usbhsotg = { 417cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 418844a3b63SPaul Walmsley .slave = &omap2430_usbhsotg_hwmod, 419844a3b63SPaul Walmsley .clk = "usb_l4_ick", 420844a3b63SPaul Walmsley .user = OCP_USER_MPU, 421844a3b63SPaul Walmsley }; 422844a3b63SPaul Walmsley 423844a3b63SPaul Walmsley /* L4 CORE -> MMC1 interface */ 424844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__mmc1 = { 425cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 426844a3b63SPaul Walmsley .slave = &omap2430_mmc1_hwmod, 427844a3b63SPaul Walmsley .clk = "mmchs1_ick", 428844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 429844a3b63SPaul Walmsley }; 430844a3b63SPaul Walmsley 431844a3b63SPaul Walmsley /* L4 CORE -> MMC2 interface */ 432844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__mmc2 = { 433cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 434844a3b63SPaul Walmsley .slave = &omap2430_mmc2_hwmod, 435844a3b63SPaul Walmsley .clk = "mmchs2_ick", 436844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 437844a3b63SPaul Walmsley }; 438844a3b63SPaul Walmsley 439844a3b63SPaul Walmsley /* l4 core -> mcspi3 interface */ 440844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi3 = { 441cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 442844a3b63SPaul Walmsley .slave = &omap2430_mcspi3_hwmod, 443844a3b63SPaul Walmsley .clk = "mcspi3_ick", 444844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 445844a3b63SPaul Walmsley }; 446844a3b63SPaul Walmsley 447844a3b63SPaul Walmsley /* IVA2 <- L3 interface */ 448844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l3__iva = { 449cb48427eSPaul Walmsley .master = &omap2xxx_l3_main_hwmod, 450844a3b63SPaul Walmsley .slave = &omap2430_iva_hwmod, 4513af35fbcSPaul Walmsley .clk = "core_l3_ck", 452844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 453844a3b63SPaul Walmsley }; 454844a3b63SPaul Walmsley 455844a3b63SPaul Walmsley /* l4_wkup -> timer1 */ 456844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_wkup__timer1 = { 457cb48427eSPaul Walmsley .master = &omap2xxx_l4_wkup_hwmod, 458cb48427eSPaul Walmsley .slave = &omap2xxx_timer1_hwmod, 459844a3b63SPaul Walmsley .clk = "gpt1_ick", 460844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 461844a3b63SPaul Walmsley }; 462844a3b63SPaul Walmsley 463844a3b63SPaul Walmsley /* l4_wkup -> wd_timer2 */ 464844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = { 465cb48427eSPaul Walmsley .master = &omap2xxx_l4_wkup_hwmod, 466cb48427eSPaul Walmsley .slave = &omap2xxx_wd_timer2_hwmod, 467844a3b63SPaul Walmsley .clk = "mpu_wdt_ick", 468844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 469844a3b63SPaul Walmsley }; 470844a3b63SPaul Walmsley 471844a3b63SPaul Walmsley /* l4_wkup -> gpio1 */ 472844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio1 = { 473cb48427eSPaul Walmsley .master = &omap2xxx_l4_wkup_hwmod, 474cb48427eSPaul Walmsley .slave = &omap2xxx_gpio1_hwmod, 475844a3b63SPaul Walmsley .clk = "gpios_ick", 476844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 477844a3b63SPaul Walmsley }; 478844a3b63SPaul Walmsley 479844a3b63SPaul Walmsley /* l4_wkup -> gpio2 */ 480844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio2 = { 481cb48427eSPaul Walmsley .master = &omap2xxx_l4_wkup_hwmod, 482cb48427eSPaul Walmsley .slave = &omap2xxx_gpio2_hwmod, 483844a3b63SPaul Walmsley .clk = "gpios_ick", 484844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 485844a3b63SPaul Walmsley }; 486844a3b63SPaul Walmsley 487844a3b63SPaul Walmsley /* l4_wkup -> gpio3 */ 488844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio3 = { 489cb48427eSPaul Walmsley .master = &omap2xxx_l4_wkup_hwmod, 490cb48427eSPaul Walmsley .slave = &omap2xxx_gpio3_hwmod, 491844a3b63SPaul Walmsley .clk = "gpios_ick", 492844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 493844a3b63SPaul Walmsley }; 494844a3b63SPaul Walmsley 495844a3b63SPaul Walmsley /* l4_wkup -> gpio4 */ 496844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio4 = { 497cb48427eSPaul Walmsley .master = &omap2xxx_l4_wkup_hwmod, 498cb48427eSPaul Walmsley .slave = &omap2xxx_gpio4_hwmod, 499844a3b63SPaul Walmsley .clk = "gpios_ick", 500844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 501844a3b63SPaul Walmsley }; 502844a3b63SPaul Walmsley 503844a3b63SPaul Walmsley /* l4_core -> gpio5 */ 504844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__gpio5 = { 505cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 506844a3b63SPaul Walmsley .slave = &omap2430_gpio5_hwmod, 507844a3b63SPaul Walmsley .clk = "gpio5_ick", 508844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 509844a3b63SPaul Walmsley }; 510844a3b63SPaul Walmsley 511844a3b63SPaul Walmsley /* dma_system -> L3 */ 512844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_dma_system__l3 = { 513844a3b63SPaul Walmsley .master = &omap2430_dma_system_hwmod, 514cb48427eSPaul Walmsley .slave = &omap2xxx_l3_main_hwmod, 515844a3b63SPaul Walmsley .clk = "core_l3_ck", 516844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 517844a3b63SPaul Walmsley }; 518844a3b63SPaul Walmsley 519844a3b63SPaul Walmsley /* l4_core -> dma_system */ 520844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__dma_system = { 521cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 522844a3b63SPaul Walmsley .slave = &omap2430_dma_system_hwmod, 523844a3b63SPaul Walmsley .clk = "sdma_ick", 524844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 525844a3b63SPaul Walmsley }; 526844a3b63SPaul Walmsley 527844a3b63SPaul Walmsley /* l4_core -> mailbox */ 528844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__mailbox = { 529cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 530844a3b63SPaul Walmsley .slave = &omap2430_mailbox_hwmod, 531844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 532844a3b63SPaul Walmsley }; 533844a3b63SPaul Walmsley 534844a3b63SPaul Walmsley /* l4_core -> mcbsp1 */ 535844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp1 = { 536cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 537844a3b63SPaul Walmsley .slave = &omap2430_mcbsp1_hwmod, 538844a3b63SPaul Walmsley .clk = "mcbsp1_ick", 539844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 540844a3b63SPaul Walmsley }; 541844a3b63SPaul Walmsley 542844a3b63SPaul Walmsley /* l4_core -> mcbsp2 */ 543844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp2 = { 544cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 545844a3b63SPaul Walmsley .slave = &omap2430_mcbsp2_hwmod, 546844a3b63SPaul Walmsley .clk = "mcbsp2_ick", 547844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 548844a3b63SPaul Walmsley }; 549844a3b63SPaul Walmsley 550844a3b63SPaul Walmsley /* l4_core -> mcbsp3 */ 551844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp3 = { 552cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 553844a3b63SPaul Walmsley .slave = &omap2430_mcbsp3_hwmod, 554844a3b63SPaul Walmsley .clk = "mcbsp3_ick", 555844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 556844a3b63SPaul Walmsley }; 557844a3b63SPaul Walmsley 558844a3b63SPaul Walmsley /* l4_core -> mcbsp4 */ 559844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp4 = { 560cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 561844a3b63SPaul Walmsley .slave = &omap2430_mcbsp4_hwmod, 562844a3b63SPaul Walmsley .clk = "mcbsp4_ick", 563844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 564844a3b63SPaul Walmsley }; 565844a3b63SPaul Walmsley 566844a3b63SPaul Walmsley /* l4_core -> mcbsp5 */ 567844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp5 = { 568cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 569844a3b63SPaul Walmsley .slave = &omap2430_mcbsp5_hwmod, 570844a3b63SPaul Walmsley .clk = "mcbsp5_ick", 571844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 572844a3b63SPaul Walmsley }; 573844a3b63SPaul Walmsley 574f32bd778SPaul Walmsley /* l4_core -> hdq1w */ 575f32bd778SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__hdq1w = { 576f32bd778SPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 577f32bd778SPaul Walmsley .slave = &omap2430_hdq1w_hwmod, 578f32bd778SPaul Walmsley .clk = "hdq_ick", 579f32bd778SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 580f32bd778SPaul Walmsley .flags = OMAP_FIREWALL_L4 | OCPIF_SWSUP_IDLE, 581f32bd778SPaul Walmsley }; 582f32bd778SPaul Walmsley 583c8d82ff6SVaibhav Hiremath /* l4_wkup -> 32ksync_counter */ 584c8d82ff6SVaibhav Hiremath static struct omap_hwmod_ocp_if omap2430_l4_wkup__counter_32k = { 585c8d82ff6SVaibhav Hiremath .master = &omap2xxx_l4_wkup_hwmod, 586c8d82ff6SVaibhav Hiremath .slave = &omap2xxx_counter_32k_hwmod, 587c8d82ff6SVaibhav Hiremath .clk = "sync_32k_ick", 588c8d82ff6SVaibhav Hiremath .user = OCP_USER_MPU | OCP_USER_SDMA, 589c8d82ff6SVaibhav Hiremath }; 590c8d82ff6SVaibhav Hiremath 59149484a60SAfzal Mohammed static struct omap_hwmod_ocp_if omap2430_l3__gpmc = { 59249484a60SAfzal Mohammed .master = &omap2xxx_l3_main_hwmod, 59349484a60SAfzal Mohammed .slave = &omap2xxx_gpmc_hwmod, 59449484a60SAfzal Mohammed .clk = "core_l3_ck", 59549484a60SAfzal Mohammed .user = OCP_USER_MPU | OCP_USER_SDMA, 59649484a60SAfzal Mohammed }; 59749484a60SAfzal Mohammed 5980a78c5c5SPaul Walmsley static struct omap_hwmod_ocp_if *omap2430_hwmod_ocp_ifs[] __initdata = { 5996a29755fSPaul Walmsley &omap2xxx_l3_main__l4_core, 6006a29755fSPaul Walmsley &omap2xxx_mpu__l3_main, 6016a29755fSPaul Walmsley &omap2xxx_dss__l3, 6020a78c5c5SPaul Walmsley &omap2430_usbhsotg__l3, 6030a78c5c5SPaul Walmsley &omap2430_l4_core__i2c1, 6040a78c5c5SPaul Walmsley &omap2430_l4_core__i2c2, 6056a29755fSPaul Walmsley &omap2xxx_l4_core__l4_wkup, 6060a78c5c5SPaul Walmsley &omap2_l4_core__uart1, 6070a78c5c5SPaul Walmsley &omap2_l4_core__uart2, 6080a78c5c5SPaul Walmsley &omap2_l4_core__uart3, 6090a78c5c5SPaul Walmsley &omap2430_l4_core__usbhsotg, 6100a78c5c5SPaul Walmsley &omap2430_l4_core__mmc1, 6110a78c5c5SPaul Walmsley &omap2430_l4_core__mmc2, 6126a29755fSPaul Walmsley &omap2xxx_l4_core__mcspi1, 6136a29755fSPaul Walmsley &omap2xxx_l4_core__mcspi2, 6140a78c5c5SPaul Walmsley &omap2430_l4_core__mcspi3, 6150a78c5c5SPaul Walmsley &omap2430_l3__iva, 6160a78c5c5SPaul Walmsley &omap2430_l4_wkup__timer1, 6176a29755fSPaul Walmsley &omap2xxx_l4_core__timer2, 6186a29755fSPaul Walmsley &omap2xxx_l4_core__timer3, 6196a29755fSPaul Walmsley &omap2xxx_l4_core__timer4, 6206a29755fSPaul Walmsley &omap2xxx_l4_core__timer5, 6216a29755fSPaul Walmsley &omap2xxx_l4_core__timer6, 6226a29755fSPaul Walmsley &omap2xxx_l4_core__timer7, 6236a29755fSPaul Walmsley &omap2xxx_l4_core__timer8, 6246a29755fSPaul Walmsley &omap2xxx_l4_core__timer9, 6256a29755fSPaul Walmsley &omap2xxx_l4_core__timer10, 6266a29755fSPaul Walmsley &omap2xxx_l4_core__timer11, 6276a29755fSPaul Walmsley &omap2xxx_l4_core__timer12, 6280a78c5c5SPaul Walmsley &omap2430_l4_wkup__wd_timer2, 6296a29755fSPaul Walmsley &omap2xxx_l4_core__dss, 6306a29755fSPaul Walmsley &omap2xxx_l4_core__dss_dispc, 6316a29755fSPaul Walmsley &omap2xxx_l4_core__dss_rfbi, 6326a29755fSPaul Walmsley &omap2xxx_l4_core__dss_venc, 6330a78c5c5SPaul Walmsley &omap2430_l4_wkup__gpio1, 6340a78c5c5SPaul Walmsley &omap2430_l4_wkup__gpio2, 6350a78c5c5SPaul Walmsley &omap2430_l4_wkup__gpio3, 6360a78c5c5SPaul Walmsley &omap2430_l4_wkup__gpio4, 6370a78c5c5SPaul Walmsley &omap2430_l4_core__gpio5, 6380a78c5c5SPaul Walmsley &omap2430_dma_system__l3, 6390a78c5c5SPaul Walmsley &omap2430_l4_core__dma_system, 6400a78c5c5SPaul Walmsley &omap2430_l4_core__mailbox, 6410a78c5c5SPaul Walmsley &omap2430_l4_core__mcbsp1, 6420a78c5c5SPaul Walmsley &omap2430_l4_core__mcbsp2, 6430a78c5c5SPaul Walmsley &omap2430_l4_core__mcbsp3, 6440a78c5c5SPaul Walmsley &omap2430_l4_core__mcbsp4, 6450a78c5c5SPaul Walmsley &omap2430_l4_core__mcbsp5, 646f32bd778SPaul Walmsley &omap2430_l4_core__hdq1w, 647e9b0a2fbSPaul Walmsley &omap2xxx_l4_core__rng, 648e569e994SMark A. Greer &omap2xxx_l4_core__sham, 649660ffd6bSMark A. Greer &omap2xxx_l4_core__aes, 650c8d82ff6SVaibhav Hiremath &omap2430_l4_wkup__counter_32k, 65149484a60SAfzal Mohammed &omap2430_l3__gpmc, 6527359154eSPaul Walmsley NULL, 6537359154eSPaul Walmsley }; 6547359154eSPaul Walmsley 6557359154eSPaul Walmsley int __init omap2430_hwmod_init(void) 6567359154eSPaul Walmsley { 6579ebfd285SKevin Hilman omap_hwmod_init(); 6580a78c5c5SPaul Walmsley return omap_hwmod_register_links(omap2430_hwmod_ocp_ifs); 6597359154eSPaul Walmsley } 660