17359154eSPaul Walmsley /* 27359154eSPaul Walmsley * omap_hwmod_2430_data.c - hardware modules present on the OMAP2430 chips 37359154eSPaul Walmsley * 478183f3fSPaul Walmsley * Copyright (C) 2009-2011 Nokia Corporation 50a78c5c5SPaul Walmsley * Copyright (C) 2012 Texas Instruments, Inc. 67359154eSPaul Walmsley * Paul Walmsley 77359154eSPaul Walmsley * 87359154eSPaul Walmsley * This program is free software; you can redistribute it and/or modify 97359154eSPaul Walmsley * it under the terms of the GNU General Public License version 2 as 107359154eSPaul Walmsley * published by the Free Software Foundation. 117359154eSPaul Walmsley * 127359154eSPaul Walmsley * XXX handle crossbar/shared link difference for L3? 137359154eSPaul Walmsley * XXX these should be marked initdata for multi-OMAP kernels 147359154eSPaul Walmsley */ 157359154eSPaul Walmsley #include <plat/omap_hwmod.h> 167359154eSPaul Walmsley #include <mach/irqs.h> 177359154eSPaul Walmsley #include <plat/cpu.h> 187359154eSPaul Walmsley #include <plat/dma.h> 19046465b7SKevin Hilman #include <plat/serial.h> 202004290fSPaul Walmsley #include <plat/i2c.h> 21aeac0e44SVaradarajan, Charulatha #include <plat/gpio.h> 2237801b3dSCharulatha V #include <plat/mcbsp.h> 237f904c78SCharulatha V #include <plat/mcspi.h> 24b6b58229SThara Gopinath #include <plat/dmtimer.h> 256ab8946fSKishore Kadiyala #include <plat/mmc.h> 26de56dbb6SSenthilvadivu Guruswamy #include <plat/l3_2xxx.h> 277359154eSPaul Walmsley 2843b40992SPaul Walmsley #include "omap_hwmod_common_data.h" 2943b40992SPaul Walmsley 307359154eSPaul Walmsley #include "prm-regbits-24xx.h" 31165e2161SVaradarajan, Charulatha #include "cm-regbits-24xx.h" 32ff2516fbSPaul Walmsley #include "wd_timer.h" 337359154eSPaul Walmsley 347359154eSPaul Walmsley /* 357359154eSPaul Walmsley * OMAP2430 hardware module integration data 367359154eSPaul Walmsley * 37844a3b63SPaul Walmsley * All of the data in this section should be autogeneratable from the 387359154eSPaul Walmsley * TI hardware database or other technical documentation. Data that 397359154eSPaul Walmsley * is driver-specific or driver-kernel integration-specific belongs 407359154eSPaul Walmsley * elsewhere. 417359154eSPaul Walmsley */ 427359154eSPaul Walmsley 43844a3b63SPaul Walmsley /* 44844a3b63SPaul Walmsley * IP blocks 45844a3b63SPaul Walmsley */ 46de56dbb6SSenthilvadivu Guruswamy 47844a3b63SPaul Walmsley /* IVA2 (IVA2) */ 4808072acfSPaul Walmsley static struct omap_hwmod omap2430_iva_hwmod = { 4908072acfSPaul Walmsley .name = "iva", 5008072acfSPaul Walmsley .class = &iva_hwmod_class, 5108072acfSPaul Walmsley }; 5208072acfSPaul Walmsley 532004290fSPaul Walmsley /* I2C common */ 542004290fSPaul Walmsley static struct omap_hwmod_class_sysconfig i2c_sysc = { 552004290fSPaul Walmsley .rev_offs = 0x00, 562004290fSPaul Walmsley .sysc_offs = 0x20, 572004290fSPaul Walmsley .syss_offs = 0x10, 58d73d65faSAvinash.H.M .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | 59d73d65faSAvinash.H.M SYSS_HAS_RESET_STATUS), 602004290fSPaul Walmsley .sysc_fields = &omap_hwmod_sysc_type1, 612004290fSPaul Walmsley }; 622004290fSPaul Walmsley 632004290fSPaul Walmsley static struct omap_hwmod_class i2c_class = { 642004290fSPaul Walmsley .name = "i2c", 652004290fSPaul Walmsley .sysc = &i2c_sysc, 66db791a75SAndy Green .rev = OMAP_I2C_IP_VERSION_1, 676d3c55fdSAvinash.H.M .reset = &omap_i2c_reset, 682004290fSPaul Walmsley }; 692004290fSPaul Walmsley 7050ebb777SBenoit Cousson static struct omap_i2c_dev_attr i2c_dev_attr = { 712004290fSPaul Walmsley .fifo_depth = 8, /* bytes */ 724d4441a6SAndy Green .flags = OMAP_I2C_FLAG_APPLY_ERRATA_I207 | 734d4441a6SAndy Green OMAP_I2C_FLAG_BUS_SHIFT_2 | 744d4441a6SAndy Green OMAP_I2C_FLAG_FORCE_19200_INT_CLK, 752004290fSPaul Walmsley }; 762004290fSPaul Walmsley 7750ebb777SBenoit Cousson /* I2C1 */ 782004290fSPaul Walmsley static struct omap_hwmod omap2430_i2c1_hwmod = { 792004290fSPaul Walmsley .name = "i2c1", 803e600522SAndy Green .flags = HWMOD_16BIT_REG, 810d619a89SPaul Walmsley .mpu_irqs = omap2_i2c1_mpu_irqs, 82d826ebfaSPaul Walmsley .sdma_reqs = omap2_i2c1_sdma_reqs, 832004290fSPaul Walmsley .main_clk = "i2chs1_fck", 842004290fSPaul Walmsley .prcm = { 852004290fSPaul Walmsley .omap2 = { 862004290fSPaul Walmsley /* 872004290fSPaul Walmsley * NOTE: The CM_FCLKEN* and CM_ICLKEN* for 882004290fSPaul Walmsley * I2CHS IP's do not follow the usual pattern. 892004290fSPaul Walmsley * prcm_reg_id alone cannot be used to program 902004290fSPaul Walmsley * the iclk and fclk. Needs to be handled using 9125985edcSLucas De Marchi * additional flags when clk handling is moved 922004290fSPaul Walmsley * to hwmod framework. 932004290fSPaul Walmsley */ 942004290fSPaul Walmsley .module_offs = CORE_MOD, 952004290fSPaul Walmsley .prcm_reg_id = 1, 962004290fSPaul Walmsley .module_bit = OMAP2430_EN_I2CHS1_SHIFT, 972004290fSPaul Walmsley .idlest_reg_id = 1, 982004290fSPaul Walmsley .idlest_idle_bit = OMAP2430_ST_I2CHS1_SHIFT, 992004290fSPaul Walmsley }, 1002004290fSPaul Walmsley }, 1012004290fSPaul Walmsley .class = &i2c_class, 10250ebb777SBenoit Cousson .dev_attr = &i2c_dev_attr, 1032004290fSPaul Walmsley }; 1042004290fSPaul Walmsley 1052004290fSPaul Walmsley /* I2C2 */ 1062004290fSPaul Walmsley static struct omap_hwmod omap2430_i2c2_hwmod = { 1072004290fSPaul Walmsley .name = "i2c2", 1083e600522SAndy Green .flags = HWMOD_16BIT_REG, 1090d619a89SPaul Walmsley .mpu_irqs = omap2_i2c2_mpu_irqs, 110d826ebfaSPaul Walmsley .sdma_reqs = omap2_i2c2_sdma_reqs, 1112004290fSPaul Walmsley .main_clk = "i2chs2_fck", 1122004290fSPaul Walmsley .prcm = { 1132004290fSPaul Walmsley .omap2 = { 1142004290fSPaul Walmsley .module_offs = CORE_MOD, 1152004290fSPaul Walmsley .prcm_reg_id = 1, 1162004290fSPaul Walmsley .module_bit = OMAP2430_EN_I2CHS2_SHIFT, 1172004290fSPaul Walmsley .idlest_reg_id = 1, 1182004290fSPaul Walmsley .idlest_idle_bit = OMAP2430_ST_I2CHS2_SHIFT, 1192004290fSPaul Walmsley }, 1202004290fSPaul Walmsley }, 1212004290fSPaul Walmsley .class = &i2c_class, 12250ebb777SBenoit Cousson .dev_attr = &i2c_dev_attr, 1232004290fSPaul Walmsley }; 1242004290fSPaul Walmsley 125aeac0e44SVaradarajan, Charulatha /* gpio5 */ 126aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_irq_info omap243x_gpio5_irqs[] = { 127aeac0e44SVaradarajan, Charulatha { .irq = 33 }, /* INT_24XX_GPIO_BANK5 */ 128212738a4SPaul Walmsley { .irq = -1 } 129aeac0e44SVaradarajan, Charulatha }; 130aeac0e44SVaradarajan, Charulatha 131aeac0e44SVaradarajan, Charulatha static struct omap_hwmod omap2430_gpio5_hwmod = { 132aeac0e44SVaradarajan, Charulatha .name = "gpio5", 133f95440caSAvinash.H.M .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 134aeac0e44SVaradarajan, Charulatha .mpu_irqs = omap243x_gpio5_irqs, 135aeac0e44SVaradarajan, Charulatha .main_clk = "gpio5_fck", 136aeac0e44SVaradarajan, Charulatha .prcm = { 137aeac0e44SVaradarajan, Charulatha .omap2 = { 138aeac0e44SVaradarajan, Charulatha .prcm_reg_id = 2, 139aeac0e44SVaradarajan, Charulatha .module_bit = OMAP2430_EN_GPIO5_SHIFT, 140aeac0e44SVaradarajan, Charulatha .module_offs = CORE_MOD, 141aeac0e44SVaradarajan, Charulatha .idlest_reg_id = 2, 142aeac0e44SVaradarajan, Charulatha .idlest_idle_bit = OMAP2430_ST_GPIO5_SHIFT, 143aeac0e44SVaradarajan, Charulatha }, 144aeac0e44SVaradarajan, Charulatha }, 145273b9465SPaul Walmsley .class = &omap2xxx_gpio_hwmod_class, 146cb48427eSPaul Walmsley .dev_attr = &omap2xxx_gpio_dev_attr, 147aeac0e44SVaradarajan, Charulatha }; 148aeac0e44SVaradarajan, Charulatha 14982cbd1aeSG, Manjunath Kondaiah /* dma attributes */ 15082cbd1aeSG, Manjunath Kondaiah static struct omap_dma_dev_attr dma_dev_attr = { 15182cbd1aeSG, Manjunath Kondaiah .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY | 15282cbd1aeSG, Manjunath Kondaiah IS_CSSA_32 | IS_CDSA_32 | IS_RW_PRIORITY, 15382cbd1aeSG, Manjunath Kondaiah .lch_count = 32, 15482cbd1aeSG, Manjunath Kondaiah }; 15582cbd1aeSG, Manjunath Kondaiah 15682cbd1aeSG, Manjunath Kondaiah static struct omap_hwmod omap2430_dma_system_hwmod = { 15782cbd1aeSG, Manjunath Kondaiah .name = "dma", 158273b9465SPaul Walmsley .class = &omap2xxx_dma_hwmod_class, 1590d619a89SPaul Walmsley .mpu_irqs = omap2_dma_system_irqs, 16082cbd1aeSG, Manjunath Kondaiah .main_clk = "core_l3_ck", 16182cbd1aeSG, Manjunath Kondaiah .dev_attr = &dma_dev_attr, 16282cbd1aeSG, Manjunath Kondaiah .flags = HWMOD_NO_IDLEST, 16382cbd1aeSG, Manjunath Kondaiah }; 16482cbd1aeSG, Manjunath Kondaiah 165fca1ab55SOmar Ramirez Luna /* mailbox */ 166fca1ab55SOmar Ramirez Luna static struct omap_hwmod_irq_info omap2430_mailbox_irqs[] = { 167fca1ab55SOmar Ramirez Luna { .irq = 26 }, 168212738a4SPaul Walmsley { .irq = -1 } 169fca1ab55SOmar Ramirez Luna }; 170fca1ab55SOmar Ramirez Luna 171fca1ab55SOmar Ramirez Luna static struct omap_hwmod omap2430_mailbox_hwmod = { 172fca1ab55SOmar Ramirez Luna .name = "mailbox", 173273b9465SPaul Walmsley .class = &omap2xxx_mailbox_hwmod_class, 174fca1ab55SOmar Ramirez Luna .mpu_irqs = omap2430_mailbox_irqs, 175fca1ab55SOmar Ramirez Luna .main_clk = "mailboxes_ick", 176fca1ab55SOmar Ramirez Luna .prcm = { 177fca1ab55SOmar Ramirez Luna .omap2 = { 178fca1ab55SOmar Ramirez Luna .prcm_reg_id = 1, 179fca1ab55SOmar Ramirez Luna .module_bit = OMAP24XX_EN_MAILBOXES_SHIFT, 180fca1ab55SOmar Ramirez Luna .module_offs = CORE_MOD, 181fca1ab55SOmar Ramirez Luna .idlest_reg_id = 1, 182fca1ab55SOmar Ramirez Luna .idlest_idle_bit = OMAP24XX_ST_MAILBOXES_SHIFT, 183fca1ab55SOmar Ramirez Luna }, 184fca1ab55SOmar Ramirez Luna }, 185fca1ab55SOmar Ramirez Luna }; 186fca1ab55SOmar Ramirez Luna 1877f904c78SCharulatha V /* mcspi3 */ 1887f904c78SCharulatha V static struct omap_hwmod_irq_info omap2430_mcspi3_mpu_irqs[] = { 1897f904c78SCharulatha V { .irq = 91 }, 190212738a4SPaul Walmsley { .irq = -1 } 1917f904c78SCharulatha V }; 1927f904c78SCharulatha V 1937f904c78SCharulatha V static struct omap_hwmod_dma_info omap2430_mcspi3_sdma_reqs[] = { 1947f904c78SCharulatha V { .name = "tx0", .dma_req = 15 }, /* DMA_SPI3_TX0 */ 1957f904c78SCharulatha V { .name = "rx0", .dma_req = 16 }, /* DMA_SPI3_RX0 */ 1967f904c78SCharulatha V { .name = "tx1", .dma_req = 23 }, /* DMA_SPI3_TX1 */ 1977f904c78SCharulatha V { .name = "rx1", .dma_req = 24 }, /* DMA_SPI3_RX1 */ 198bc614958SPaul Walmsley { .dma_req = -1 } 1997f904c78SCharulatha V }; 2007f904c78SCharulatha V 2017f904c78SCharulatha V static struct omap2_mcspi_dev_attr omap_mcspi3_dev_attr = { 2027f904c78SCharulatha V .num_chipselect = 2, 2037f904c78SCharulatha V }; 2047f904c78SCharulatha V 2057f904c78SCharulatha V static struct omap_hwmod omap2430_mcspi3_hwmod = { 206bec93811SPaul Walmsley .name = "mcspi3", 2077f904c78SCharulatha V .mpu_irqs = omap2430_mcspi3_mpu_irqs, 2087f904c78SCharulatha V .sdma_reqs = omap2430_mcspi3_sdma_reqs, 2097f904c78SCharulatha V .main_clk = "mcspi3_fck", 2107f904c78SCharulatha V .prcm = { 2117f904c78SCharulatha V .omap2 = { 2127f904c78SCharulatha V .module_offs = CORE_MOD, 2137f904c78SCharulatha V .prcm_reg_id = 2, 2147f904c78SCharulatha V .module_bit = OMAP2430_EN_MCSPI3_SHIFT, 2157f904c78SCharulatha V .idlest_reg_id = 2, 2167f904c78SCharulatha V .idlest_idle_bit = OMAP2430_ST_MCSPI3_SHIFT, 2177f904c78SCharulatha V }, 2187f904c78SCharulatha V }, 219273b9465SPaul Walmsley .class = &omap2xxx_mcspi_class, 2207f904c78SCharulatha V .dev_attr = &omap_mcspi3_dev_attr, 2217f904c78SCharulatha V }; 2227f904c78SCharulatha V 223844a3b63SPaul Walmsley /* usbhsotg */ 22444d02acfSHema HK static struct omap_hwmod_class_sysconfig omap2430_usbhsotg_sysc = { 22544d02acfSHema HK .rev_offs = 0x0400, 22644d02acfSHema HK .sysc_offs = 0x0404, 22744d02acfSHema HK .syss_offs = 0x0408, 22844d02acfSHema HK .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE| 22944d02acfSHema HK SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | 23044d02acfSHema HK SYSC_HAS_AUTOIDLE), 23144d02acfSHema HK .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | 23244d02acfSHema HK MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), 23344d02acfSHema HK .sysc_fields = &omap_hwmod_sysc_type1, 23444d02acfSHema HK }; 23544d02acfSHema HK 23644d02acfSHema HK static struct omap_hwmod_class usbotg_class = { 23744d02acfSHema HK .name = "usbotg", 23844d02acfSHema HK .sysc = &omap2430_usbhsotg_sysc, 23944d02acfSHema HK }; 24044d02acfSHema HK 24144d02acfSHema HK /* usb_otg_hs */ 24244d02acfSHema HK static struct omap_hwmod_irq_info omap2430_usbhsotg_mpu_irqs[] = { 24344d02acfSHema HK 24444d02acfSHema HK { .name = "mc", .irq = 92 }, 24544d02acfSHema HK { .name = "dma", .irq = 93 }, 246212738a4SPaul Walmsley { .irq = -1 } 24744d02acfSHema HK }; 24844d02acfSHema HK 24944d02acfSHema HK static struct omap_hwmod omap2430_usbhsotg_hwmod = { 25044d02acfSHema HK .name = "usb_otg_hs", 25144d02acfSHema HK .mpu_irqs = omap2430_usbhsotg_mpu_irqs, 25244d02acfSHema HK .main_clk = "usbhs_ick", 25344d02acfSHema HK .prcm = { 25444d02acfSHema HK .omap2 = { 25544d02acfSHema HK .prcm_reg_id = 1, 25644d02acfSHema HK .module_bit = OMAP2430_EN_USBHS_MASK, 25744d02acfSHema HK .module_offs = CORE_MOD, 25844d02acfSHema HK .idlest_reg_id = 1, 25944d02acfSHema HK .idlest_idle_bit = OMAP2430_ST_USBHS_SHIFT, 26044d02acfSHema HK }, 26144d02acfSHema HK }, 26244d02acfSHema HK .class = &usbotg_class, 26344d02acfSHema HK /* 26444d02acfSHema HK * Erratum ID: i479 idle_req / idle_ack mechanism potentially 26544d02acfSHema HK * broken when autoidle is enabled 26644d02acfSHema HK * workaround is to disable the autoidle bit at module level. 26744d02acfSHema HK */ 26844d02acfSHema HK .flags = HWMOD_NO_OCP_AUTOIDLE | HWMOD_SWSUP_SIDLE 26944d02acfSHema HK | HWMOD_SWSUP_MSTANDBY, 27044d02acfSHema HK }; 27144d02acfSHema HK 27237801b3dSCharulatha V /* 27337801b3dSCharulatha V * 'mcbsp' class 27437801b3dSCharulatha V * multi channel buffered serial port controller 27537801b3dSCharulatha V */ 27604aa67deSTony Lindgren 27737801b3dSCharulatha V static struct omap_hwmod_class_sysconfig omap2430_mcbsp_sysc = { 27837801b3dSCharulatha V .rev_offs = 0x007C, 27937801b3dSCharulatha V .sysc_offs = 0x008C, 28037801b3dSCharulatha V .sysc_flags = (SYSC_HAS_SOFTRESET), 28137801b3dSCharulatha V .sysc_fields = &omap_hwmod_sysc_type1, 28237801b3dSCharulatha V }; 28337801b3dSCharulatha V 28437801b3dSCharulatha V static struct omap_hwmod_class omap2430_mcbsp_hwmod_class = { 28537801b3dSCharulatha V .name = "mcbsp", 28637801b3dSCharulatha V .sysc = &omap2430_mcbsp_sysc, 28737801b3dSCharulatha V .rev = MCBSP_CONFIG_TYPE2, 28837801b3dSCharulatha V }; 28937801b3dSCharulatha V 29037801b3dSCharulatha V /* mcbsp1 */ 29137801b3dSCharulatha V static struct omap_hwmod_irq_info omap2430_mcbsp1_irqs[] = { 29237801b3dSCharulatha V { .name = "tx", .irq = 59 }, 29337801b3dSCharulatha V { .name = "rx", .irq = 60 }, 29437801b3dSCharulatha V { .name = "ovr", .irq = 61 }, 29537801b3dSCharulatha V { .name = "common", .irq = 64 }, 296212738a4SPaul Walmsley { .irq = -1 } 29737801b3dSCharulatha V }; 29837801b3dSCharulatha V 29937801b3dSCharulatha V static struct omap_hwmod omap2430_mcbsp1_hwmod = { 30037801b3dSCharulatha V .name = "mcbsp1", 30137801b3dSCharulatha V .class = &omap2430_mcbsp_hwmod_class, 30237801b3dSCharulatha V .mpu_irqs = omap2430_mcbsp1_irqs, 303d826ebfaSPaul Walmsley .sdma_reqs = omap2_mcbsp1_sdma_reqs, 30437801b3dSCharulatha V .main_clk = "mcbsp1_fck", 30537801b3dSCharulatha V .prcm = { 30637801b3dSCharulatha V .omap2 = { 30737801b3dSCharulatha V .prcm_reg_id = 1, 30837801b3dSCharulatha V .module_bit = OMAP24XX_EN_MCBSP1_SHIFT, 30937801b3dSCharulatha V .module_offs = CORE_MOD, 31037801b3dSCharulatha V .idlest_reg_id = 1, 31137801b3dSCharulatha V .idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT, 31237801b3dSCharulatha V }, 31337801b3dSCharulatha V }, 31437801b3dSCharulatha V }; 31537801b3dSCharulatha V 31637801b3dSCharulatha V /* mcbsp2 */ 31737801b3dSCharulatha V static struct omap_hwmod_irq_info omap2430_mcbsp2_irqs[] = { 31837801b3dSCharulatha V { .name = "tx", .irq = 62 }, 31937801b3dSCharulatha V { .name = "rx", .irq = 63 }, 32037801b3dSCharulatha V { .name = "common", .irq = 16 }, 321212738a4SPaul Walmsley { .irq = -1 } 32237801b3dSCharulatha V }; 32337801b3dSCharulatha V 32437801b3dSCharulatha V static struct omap_hwmod omap2430_mcbsp2_hwmod = { 32537801b3dSCharulatha V .name = "mcbsp2", 32637801b3dSCharulatha V .class = &omap2430_mcbsp_hwmod_class, 32737801b3dSCharulatha V .mpu_irqs = omap2430_mcbsp2_irqs, 328d826ebfaSPaul Walmsley .sdma_reqs = omap2_mcbsp2_sdma_reqs, 32937801b3dSCharulatha V .main_clk = "mcbsp2_fck", 33037801b3dSCharulatha V .prcm = { 33137801b3dSCharulatha V .omap2 = { 33237801b3dSCharulatha V .prcm_reg_id = 1, 33337801b3dSCharulatha V .module_bit = OMAP24XX_EN_MCBSP2_SHIFT, 33437801b3dSCharulatha V .module_offs = CORE_MOD, 33537801b3dSCharulatha V .idlest_reg_id = 1, 33637801b3dSCharulatha V .idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT, 33737801b3dSCharulatha V }, 33837801b3dSCharulatha V }, 33937801b3dSCharulatha V }; 34037801b3dSCharulatha V 34137801b3dSCharulatha V /* mcbsp3 */ 34237801b3dSCharulatha V static struct omap_hwmod_irq_info omap2430_mcbsp3_irqs[] = { 34337801b3dSCharulatha V { .name = "tx", .irq = 89 }, 34437801b3dSCharulatha V { .name = "rx", .irq = 90 }, 34537801b3dSCharulatha V { .name = "common", .irq = 17 }, 346212738a4SPaul Walmsley { .irq = -1 } 34737801b3dSCharulatha V }; 34837801b3dSCharulatha V 34937801b3dSCharulatha V static struct omap_hwmod omap2430_mcbsp3_hwmod = { 35037801b3dSCharulatha V .name = "mcbsp3", 35137801b3dSCharulatha V .class = &omap2430_mcbsp_hwmod_class, 35237801b3dSCharulatha V .mpu_irqs = omap2430_mcbsp3_irqs, 353d826ebfaSPaul Walmsley .sdma_reqs = omap2_mcbsp3_sdma_reqs, 35437801b3dSCharulatha V .main_clk = "mcbsp3_fck", 35537801b3dSCharulatha V .prcm = { 35637801b3dSCharulatha V .omap2 = { 35737801b3dSCharulatha V .prcm_reg_id = 1, 35837801b3dSCharulatha V .module_bit = OMAP2430_EN_MCBSP3_SHIFT, 35937801b3dSCharulatha V .module_offs = CORE_MOD, 36037801b3dSCharulatha V .idlest_reg_id = 2, 36137801b3dSCharulatha V .idlest_idle_bit = OMAP2430_ST_MCBSP3_SHIFT, 36237801b3dSCharulatha V }, 36337801b3dSCharulatha V }, 36437801b3dSCharulatha V }; 36537801b3dSCharulatha V 36637801b3dSCharulatha V /* mcbsp4 */ 36737801b3dSCharulatha V static struct omap_hwmod_irq_info omap2430_mcbsp4_irqs[] = { 36837801b3dSCharulatha V { .name = "tx", .irq = 54 }, 36937801b3dSCharulatha V { .name = "rx", .irq = 55 }, 37037801b3dSCharulatha V { .name = "common", .irq = 18 }, 371212738a4SPaul Walmsley { .irq = -1 } 37237801b3dSCharulatha V }; 37337801b3dSCharulatha V 37437801b3dSCharulatha V static struct omap_hwmod_dma_info omap2430_mcbsp4_sdma_chs[] = { 37537801b3dSCharulatha V { .name = "rx", .dma_req = 20 }, 37637801b3dSCharulatha V { .name = "tx", .dma_req = 19 }, 377bc614958SPaul Walmsley { .dma_req = -1 } 37837801b3dSCharulatha V }; 37937801b3dSCharulatha V 38037801b3dSCharulatha V static struct omap_hwmod omap2430_mcbsp4_hwmod = { 38137801b3dSCharulatha V .name = "mcbsp4", 38237801b3dSCharulatha V .class = &omap2430_mcbsp_hwmod_class, 38337801b3dSCharulatha V .mpu_irqs = omap2430_mcbsp4_irqs, 38437801b3dSCharulatha V .sdma_reqs = omap2430_mcbsp4_sdma_chs, 38537801b3dSCharulatha V .main_clk = "mcbsp4_fck", 38637801b3dSCharulatha V .prcm = { 38737801b3dSCharulatha V .omap2 = { 38837801b3dSCharulatha V .prcm_reg_id = 1, 38937801b3dSCharulatha V .module_bit = OMAP2430_EN_MCBSP4_SHIFT, 39037801b3dSCharulatha V .module_offs = CORE_MOD, 39137801b3dSCharulatha V .idlest_reg_id = 2, 39237801b3dSCharulatha V .idlest_idle_bit = OMAP2430_ST_MCBSP4_SHIFT, 39337801b3dSCharulatha V }, 39437801b3dSCharulatha V }, 39537801b3dSCharulatha V }; 39637801b3dSCharulatha V 39737801b3dSCharulatha V /* mcbsp5 */ 39837801b3dSCharulatha V static struct omap_hwmod_irq_info omap2430_mcbsp5_irqs[] = { 39937801b3dSCharulatha V { .name = "tx", .irq = 81 }, 40037801b3dSCharulatha V { .name = "rx", .irq = 82 }, 40137801b3dSCharulatha V { .name = "common", .irq = 19 }, 402212738a4SPaul Walmsley { .irq = -1 } 40337801b3dSCharulatha V }; 40437801b3dSCharulatha V 40537801b3dSCharulatha V static struct omap_hwmod_dma_info omap2430_mcbsp5_sdma_chs[] = { 40637801b3dSCharulatha V { .name = "rx", .dma_req = 22 }, 40737801b3dSCharulatha V { .name = "tx", .dma_req = 21 }, 408bc614958SPaul Walmsley { .dma_req = -1 } 40937801b3dSCharulatha V }; 41037801b3dSCharulatha V 41137801b3dSCharulatha V static struct omap_hwmod omap2430_mcbsp5_hwmod = { 41237801b3dSCharulatha V .name = "mcbsp5", 41337801b3dSCharulatha V .class = &omap2430_mcbsp_hwmod_class, 41437801b3dSCharulatha V .mpu_irqs = omap2430_mcbsp5_irqs, 41537801b3dSCharulatha V .sdma_reqs = omap2430_mcbsp5_sdma_chs, 41637801b3dSCharulatha V .main_clk = "mcbsp5_fck", 41737801b3dSCharulatha V .prcm = { 41837801b3dSCharulatha V .omap2 = { 41937801b3dSCharulatha V .prcm_reg_id = 1, 42037801b3dSCharulatha V .module_bit = OMAP2430_EN_MCBSP5_SHIFT, 42137801b3dSCharulatha V .module_offs = CORE_MOD, 42237801b3dSCharulatha V .idlest_reg_id = 2, 42337801b3dSCharulatha V .idlest_idle_bit = OMAP2430_ST_MCBSP5_SHIFT, 42437801b3dSCharulatha V }, 42537801b3dSCharulatha V }, 42637801b3dSCharulatha V }; 42704aa67deSTony Lindgren 428bce06f37SPaul Walmsley /* MMC/SD/SDIO common */ 429bce06f37SPaul Walmsley static struct omap_hwmod_class_sysconfig omap2430_mmc_sysc = { 430bce06f37SPaul Walmsley .rev_offs = 0x1fc, 431bce06f37SPaul Walmsley .sysc_offs = 0x10, 432bce06f37SPaul Walmsley .syss_offs = 0x14, 433bce06f37SPaul Walmsley .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | 434bce06f37SPaul Walmsley SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | 435bce06f37SPaul Walmsley SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), 436bce06f37SPaul Walmsley .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), 437bce06f37SPaul Walmsley .sysc_fields = &omap_hwmod_sysc_type1, 438bce06f37SPaul Walmsley }; 439bce06f37SPaul Walmsley 440bce06f37SPaul Walmsley static struct omap_hwmod_class omap2430_mmc_class = { 441bce06f37SPaul Walmsley .name = "mmc", 442bce06f37SPaul Walmsley .sysc = &omap2430_mmc_sysc, 443bce06f37SPaul Walmsley }; 444bce06f37SPaul Walmsley 445bce06f37SPaul Walmsley /* MMC/SD/SDIO1 */ 446bce06f37SPaul Walmsley static struct omap_hwmod_irq_info omap2430_mmc1_mpu_irqs[] = { 447bce06f37SPaul Walmsley { .irq = 83 }, 448212738a4SPaul Walmsley { .irq = -1 } 449bce06f37SPaul Walmsley }; 450bce06f37SPaul Walmsley 451bce06f37SPaul Walmsley static struct omap_hwmod_dma_info omap2430_mmc1_sdma_reqs[] = { 452bce06f37SPaul Walmsley { .name = "tx", .dma_req = 61 }, /* DMA_MMC1_TX */ 453bce06f37SPaul Walmsley { .name = "rx", .dma_req = 62 }, /* DMA_MMC1_RX */ 454bc614958SPaul Walmsley { .dma_req = -1 } 455bce06f37SPaul Walmsley }; 456bce06f37SPaul Walmsley 457bce06f37SPaul Walmsley static struct omap_hwmod_opt_clk omap2430_mmc1_opt_clks[] = { 458bce06f37SPaul Walmsley { .role = "dbck", .clk = "mmchsdb1_fck" }, 459bce06f37SPaul Walmsley }; 460bce06f37SPaul Walmsley 4616ab8946fSKishore Kadiyala static struct omap_mmc_dev_attr mmc1_dev_attr = { 4626ab8946fSKishore Kadiyala .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT, 4636ab8946fSKishore Kadiyala }; 4646ab8946fSKishore Kadiyala 465bce06f37SPaul Walmsley static struct omap_hwmod omap2430_mmc1_hwmod = { 466bce06f37SPaul Walmsley .name = "mmc1", 467bce06f37SPaul Walmsley .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 468bce06f37SPaul Walmsley .mpu_irqs = omap2430_mmc1_mpu_irqs, 469bce06f37SPaul Walmsley .sdma_reqs = omap2430_mmc1_sdma_reqs, 470bce06f37SPaul Walmsley .opt_clks = omap2430_mmc1_opt_clks, 471bce06f37SPaul Walmsley .opt_clks_cnt = ARRAY_SIZE(omap2430_mmc1_opt_clks), 472bce06f37SPaul Walmsley .main_clk = "mmchs1_fck", 473bce06f37SPaul Walmsley .prcm = { 474bce06f37SPaul Walmsley .omap2 = { 475bce06f37SPaul Walmsley .module_offs = CORE_MOD, 476bce06f37SPaul Walmsley .prcm_reg_id = 2, 477bce06f37SPaul Walmsley .module_bit = OMAP2430_EN_MMCHS1_SHIFT, 478bce06f37SPaul Walmsley .idlest_reg_id = 2, 479bce06f37SPaul Walmsley .idlest_idle_bit = OMAP2430_ST_MMCHS1_SHIFT, 480bce06f37SPaul Walmsley }, 481bce06f37SPaul Walmsley }, 4826ab8946fSKishore Kadiyala .dev_attr = &mmc1_dev_attr, 483bce06f37SPaul Walmsley .class = &omap2430_mmc_class, 484bce06f37SPaul Walmsley }; 485bce06f37SPaul Walmsley 486bce06f37SPaul Walmsley /* MMC/SD/SDIO2 */ 487bce06f37SPaul Walmsley static struct omap_hwmod_irq_info omap2430_mmc2_mpu_irqs[] = { 488bce06f37SPaul Walmsley { .irq = 86 }, 489212738a4SPaul Walmsley { .irq = -1 } 490bce06f37SPaul Walmsley }; 491bce06f37SPaul Walmsley 492bce06f37SPaul Walmsley static struct omap_hwmod_dma_info omap2430_mmc2_sdma_reqs[] = { 493bce06f37SPaul Walmsley { .name = "tx", .dma_req = 47 }, /* DMA_MMC2_TX */ 494bce06f37SPaul Walmsley { .name = "rx", .dma_req = 48 }, /* DMA_MMC2_RX */ 495bc614958SPaul Walmsley { .dma_req = -1 } 496bce06f37SPaul Walmsley }; 497bce06f37SPaul Walmsley 498bce06f37SPaul Walmsley static struct omap_hwmod_opt_clk omap2430_mmc2_opt_clks[] = { 499bce06f37SPaul Walmsley { .role = "dbck", .clk = "mmchsdb2_fck" }, 500bce06f37SPaul Walmsley }; 501bce06f37SPaul Walmsley 502bce06f37SPaul Walmsley static struct omap_hwmod omap2430_mmc2_hwmod = { 503bce06f37SPaul Walmsley .name = "mmc2", 504bce06f37SPaul Walmsley .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 505bce06f37SPaul Walmsley .mpu_irqs = omap2430_mmc2_mpu_irqs, 506bce06f37SPaul Walmsley .sdma_reqs = omap2430_mmc2_sdma_reqs, 507bce06f37SPaul Walmsley .opt_clks = omap2430_mmc2_opt_clks, 508bce06f37SPaul Walmsley .opt_clks_cnt = ARRAY_SIZE(omap2430_mmc2_opt_clks), 509bce06f37SPaul Walmsley .main_clk = "mmchs2_fck", 510bce06f37SPaul Walmsley .prcm = { 511bce06f37SPaul Walmsley .omap2 = { 512bce06f37SPaul Walmsley .module_offs = CORE_MOD, 513bce06f37SPaul Walmsley .prcm_reg_id = 2, 514bce06f37SPaul Walmsley .module_bit = OMAP2430_EN_MMCHS2_SHIFT, 515bce06f37SPaul Walmsley .idlest_reg_id = 2, 516bce06f37SPaul Walmsley .idlest_idle_bit = OMAP2430_ST_MMCHS2_SHIFT, 517bce06f37SPaul Walmsley }, 518bce06f37SPaul Walmsley }, 519bce06f37SPaul Walmsley .class = &omap2430_mmc_class, 520bce06f37SPaul Walmsley }; 521046465b7SKevin Hilman 522844a3b63SPaul Walmsley /* 523844a3b63SPaul Walmsley * interfaces 524844a3b63SPaul Walmsley */ 525844a3b63SPaul Walmsley 526844a3b63SPaul Walmsley /* L3 -> L4_CORE interface */ 527844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l3_main__l4_core = { 528cb48427eSPaul Walmsley .master = &omap2xxx_l3_main_hwmod, 529cb48427eSPaul Walmsley .slave = &omap2xxx_l4_core_hwmod, 530844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 531844a3b63SPaul Walmsley }; 532844a3b63SPaul Walmsley 533844a3b63SPaul Walmsley /* MPU -> L3 interface */ 534844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_mpu__l3_main = { 535cb48427eSPaul Walmsley .master = &omap2xxx_mpu_hwmod, 536cb48427eSPaul Walmsley .slave = &omap2xxx_l3_main_hwmod, 537844a3b63SPaul Walmsley .user = OCP_USER_MPU, 538844a3b63SPaul Walmsley }; 539844a3b63SPaul Walmsley 540844a3b63SPaul Walmsley /* DSS -> l3 */ 541844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_dss__l3 = { 542cb48427eSPaul Walmsley .master = &omap2xxx_dss_core_hwmod, 543cb48427eSPaul Walmsley .slave = &omap2xxx_l3_main_hwmod, 544844a3b63SPaul Walmsley .fw = { 545844a3b63SPaul Walmsley .omap2 = { 546844a3b63SPaul Walmsley .l3_perm_bit = OMAP2_L3_CORE_FW_CONNID_DSS, 547844a3b63SPaul Walmsley .flags = OMAP_FIREWALL_L3, 548844a3b63SPaul Walmsley } 549844a3b63SPaul Walmsley }, 550844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 551844a3b63SPaul Walmsley }; 552844a3b63SPaul Walmsley 553844a3b63SPaul Walmsley /* l3_core -> usbhsotg interface */ 554844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_usbhsotg__l3 = { 555844a3b63SPaul Walmsley .master = &omap2430_usbhsotg_hwmod, 556cb48427eSPaul Walmsley .slave = &omap2xxx_l3_main_hwmod, 557844a3b63SPaul Walmsley .clk = "core_l3_ck", 558844a3b63SPaul Walmsley .user = OCP_USER_MPU, 559844a3b63SPaul Walmsley }; 560844a3b63SPaul Walmsley 561844a3b63SPaul Walmsley /* L4 CORE -> I2C1 interface */ 562844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__i2c1 = { 563cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 564844a3b63SPaul Walmsley .slave = &omap2430_i2c1_hwmod, 565844a3b63SPaul Walmsley .clk = "i2c1_ick", 566844a3b63SPaul Walmsley .addr = omap2_i2c1_addr_space, 567844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 568844a3b63SPaul Walmsley }; 569844a3b63SPaul Walmsley 570844a3b63SPaul Walmsley /* L4 CORE -> I2C2 interface */ 571844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__i2c2 = { 572cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 573844a3b63SPaul Walmsley .slave = &omap2430_i2c2_hwmod, 574844a3b63SPaul Walmsley .clk = "i2c2_ick", 575844a3b63SPaul Walmsley .addr = omap2_i2c2_addr_space, 576844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 577844a3b63SPaul Walmsley }; 578844a3b63SPaul Walmsley 579844a3b63SPaul Walmsley /* L4_CORE -> L4_WKUP interface */ 580844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__l4_wkup = { 581cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 582cb48427eSPaul Walmsley .slave = &omap2xxx_l4_wkup_hwmod, 583844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 584844a3b63SPaul Walmsley }; 585844a3b63SPaul Walmsley 586844a3b63SPaul Walmsley /* L4 CORE -> UART1 interface */ 587844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = { 588cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 589cb48427eSPaul Walmsley .slave = &omap2xxx_uart1_hwmod, 590844a3b63SPaul Walmsley .clk = "uart1_ick", 591844a3b63SPaul Walmsley .addr = omap2xxx_uart1_addr_space, 592844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 593844a3b63SPaul Walmsley }; 594844a3b63SPaul Walmsley 595844a3b63SPaul Walmsley /* L4 CORE -> UART2 interface */ 596844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = { 597cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 598cb48427eSPaul Walmsley .slave = &omap2xxx_uart2_hwmod, 599844a3b63SPaul Walmsley .clk = "uart2_ick", 600844a3b63SPaul Walmsley .addr = omap2xxx_uart2_addr_space, 601844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 602844a3b63SPaul Walmsley }; 603844a3b63SPaul Walmsley 604844a3b63SPaul Walmsley /* L4 PER -> UART3 interface */ 605844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { 606cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 607cb48427eSPaul Walmsley .slave = &omap2xxx_uart3_hwmod, 608844a3b63SPaul Walmsley .clk = "uart3_ick", 609844a3b63SPaul Walmsley .addr = omap2xxx_uart3_addr_space, 610844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 611844a3b63SPaul Walmsley }; 612844a3b63SPaul Walmsley 613844a3b63SPaul Walmsley static struct omap_hwmod_addr_space omap2430_usbhsotg_addrs[] = { 614844a3b63SPaul Walmsley { 615844a3b63SPaul Walmsley .pa_start = OMAP243X_HS_BASE, 616844a3b63SPaul Walmsley .pa_end = OMAP243X_HS_BASE + SZ_4K - 1, 617844a3b63SPaul Walmsley .flags = ADDR_TYPE_RT 618844a3b63SPaul Walmsley }, 619844a3b63SPaul Walmsley { } 620844a3b63SPaul Walmsley }; 621844a3b63SPaul Walmsley 622844a3b63SPaul Walmsley /* l4_core ->usbhsotg interface */ 623844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__usbhsotg = { 624cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 625844a3b63SPaul Walmsley .slave = &omap2430_usbhsotg_hwmod, 626844a3b63SPaul Walmsley .clk = "usb_l4_ick", 627844a3b63SPaul Walmsley .addr = omap2430_usbhsotg_addrs, 628844a3b63SPaul Walmsley .user = OCP_USER_MPU, 629844a3b63SPaul Walmsley }; 630844a3b63SPaul Walmsley 631844a3b63SPaul Walmsley /* L4 CORE -> MMC1 interface */ 632844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__mmc1 = { 633cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 634844a3b63SPaul Walmsley .slave = &omap2430_mmc1_hwmod, 635844a3b63SPaul Walmsley .clk = "mmchs1_ick", 636844a3b63SPaul Walmsley .addr = omap2430_mmc1_addr_space, 637844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 638844a3b63SPaul Walmsley }; 639844a3b63SPaul Walmsley 640844a3b63SPaul Walmsley /* L4 CORE -> MMC2 interface */ 641844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__mmc2 = { 642cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 643844a3b63SPaul Walmsley .slave = &omap2430_mmc2_hwmod, 644844a3b63SPaul Walmsley .clk = "mmchs2_ick", 645844a3b63SPaul Walmsley .addr = omap2430_mmc2_addr_space, 646844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 647844a3b63SPaul Walmsley }; 648844a3b63SPaul Walmsley 649844a3b63SPaul Walmsley /* l4 core -> mcspi1 interface */ 650844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi1 = { 651cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 652cb48427eSPaul Walmsley .slave = &omap2xxx_mcspi1_hwmod, 653844a3b63SPaul Walmsley .clk = "mcspi1_ick", 654844a3b63SPaul Walmsley .addr = omap2_mcspi1_addr_space, 655844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 656844a3b63SPaul Walmsley }; 657844a3b63SPaul Walmsley 658844a3b63SPaul Walmsley /* l4 core -> mcspi2 interface */ 659844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi2 = { 660cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 661cb48427eSPaul Walmsley .slave = &omap2xxx_mcspi2_hwmod, 662844a3b63SPaul Walmsley .clk = "mcspi2_ick", 663844a3b63SPaul Walmsley .addr = omap2_mcspi2_addr_space, 664844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 665844a3b63SPaul Walmsley }; 666844a3b63SPaul Walmsley 667844a3b63SPaul Walmsley /* l4 core -> mcspi3 interface */ 668844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi3 = { 669cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 670844a3b63SPaul Walmsley .slave = &omap2430_mcspi3_hwmod, 671844a3b63SPaul Walmsley .clk = "mcspi3_ick", 672844a3b63SPaul Walmsley .addr = omap2430_mcspi3_addr_space, 673844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 674844a3b63SPaul Walmsley }; 675844a3b63SPaul Walmsley 676844a3b63SPaul Walmsley /* IVA2 <- L3 interface */ 677844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l3__iva = { 678cb48427eSPaul Walmsley .master = &omap2xxx_l3_main_hwmod, 679844a3b63SPaul Walmsley .slave = &omap2430_iva_hwmod, 680844a3b63SPaul Walmsley .clk = "dsp_fck", 681844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 682844a3b63SPaul Walmsley }; 683844a3b63SPaul Walmsley 684844a3b63SPaul Walmsley static struct omap_hwmod_addr_space omap2430_timer1_addrs[] = { 685844a3b63SPaul Walmsley { 686844a3b63SPaul Walmsley .pa_start = 0x49018000, 687844a3b63SPaul Walmsley .pa_end = 0x49018000 + SZ_1K - 1, 688844a3b63SPaul Walmsley .flags = ADDR_TYPE_RT 689844a3b63SPaul Walmsley }, 690844a3b63SPaul Walmsley { } 691844a3b63SPaul Walmsley }; 692844a3b63SPaul Walmsley 693844a3b63SPaul Walmsley /* l4_wkup -> timer1 */ 694844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_wkup__timer1 = { 695cb48427eSPaul Walmsley .master = &omap2xxx_l4_wkup_hwmod, 696cb48427eSPaul Walmsley .slave = &omap2xxx_timer1_hwmod, 697844a3b63SPaul Walmsley .clk = "gpt1_ick", 698844a3b63SPaul Walmsley .addr = omap2430_timer1_addrs, 699844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 700844a3b63SPaul Walmsley }; 701844a3b63SPaul Walmsley 702844a3b63SPaul Walmsley /* l4_core -> timer2 */ 703844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__timer2 = { 704cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 705cb48427eSPaul Walmsley .slave = &omap2xxx_timer2_hwmod, 706844a3b63SPaul Walmsley .clk = "gpt2_ick", 707844a3b63SPaul Walmsley .addr = omap2xxx_timer2_addrs, 708844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 709844a3b63SPaul Walmsley }; 710844a3b63SPaul Walmsley 711844a3b63SPaul Walmsley /* l4_core -> timer3 */ 712844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__timer3 = { 713cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 714cb48427eSPaul Walmsley .slave = &omap2xxx_timer3_hwmod, 715844a3b63SPaul Walmsley .clk = "gpt3_ick", 716844a3b63SPaul Walmsley .addr = omap2xxx_timer3_addrs, 717844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 718844a3b63SPaul Walmsley }; 719844a3b63SPaul Walmsley 720844a3b63SPaul Walmsley /* l4_core -> timer4 */ 721844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__timer4 = { 722cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 723cb48427eSPaul Walmsley .slave = &omap2xxx_timer4_hwmod, 724844a3b63SPaul Walmsley .clk = "gpt4_ick", 725844a3b63SPaul Walmsley .addr = omap2xxx_timer4_addrs, 726844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 727844a3b63SPaul Walmsley }; 728844a3b63SPaul Walmsley 729844a3b63SPaul Walmsley /* l4_core -> timer5 */ 730844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__timer5 = { 731cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 732cb48427eSPaul Walmsley .slave = &omap2xxx_timer5_hwmod, 733844a3b63SPaul Walmsley .clk = "gpt5_ick", 734844a3b63SPaul Walmsley .addr = omap2xxx_timer5_addrs, 735844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 736844a3b63SPaul Walmsley }; 737844a3b63SPaul Walmsley 738844a3b63SPaul Walmsley /* l4_core -> timer6 */ 739844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__timer6 = { 740cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 741cb48427eSPaul Walmsley .slave = &omap2xxx_timer6_hwmod, 742844a3b63SPaul Walmsley .clk = "gpt6_ick", 743844a3b63SPaul Walmsley .addr = omap2xxx_timer6_addrs, 744844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 745844a3b63SPaul Walmsley }; 746844a3b63SPaul Walmsley 747844a3b63SPaul Walmsley /* l4_core -> timer7 */ 748844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__timer7 = { 749cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 750cb48427eSPaul Walmsley .slave = &omap2xxx_timer7_hwmod, 751844a3b63SPaul Walmsley .clk = "gpt7_ick", 752844a3b63SPaul Walmsley .addr = omap2xxx_timer7_addrs, 753844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 754844a3b63SPaul Walmsley }; 755844a3b63SPaul Walmsley 756844a3b63SPaul Walmsley /* l4_core -> timer8 */ 757844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__timer8 = { 758cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 759cb48427eSPaul Walmsley .slave = &omap2xxx_timer8_hwmod, 760844a3b63SPaul Walmsley .clk = "gpt8_ick", 761844a3b63SPaul Walmsley .addr = omap2xxx_timer8_addrs, 762844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 763844a3b63SPaul Walmsley }; 764844a3b63SPaul Walmsley 765844a3b63SPaul Walmsley /* l4_core -> timer9 */ 766844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__timer9 = { 767cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 768cb48427eSPaul Walmsley .slave = &omap2xxx_timer9_hwmod, 769844a3b63SPaul Walmsley .clk = "gpt9_ick", 770844a3b63SPaul Walmsley .addr = omap2xxx_timer9_addrs, 771844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 772844a3b63SPaul Walmsley }; 773844a3b63SPaul Walmsley 774844a3b63SPaul Walmsley /* l4_core -> timer10 */ 775844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__timer10 = { 776cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 777cb48427eSPaul Walmsley .slave = &omap2xxx_timer10_hwmod, 778844a3b63SPaul Walmsley .clk = "gpt10_ick", 779844a3b63SPaul Walmsley .addr = omap2_timer10_addrs, 780844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 781844a3b63SPaul Walmsley }; 782844a3b63SPaul Walmsley 783844a3b63SPaul Walmsley /* l4_core -> timer11 */ 784844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__timer11 = { 785cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 786cb48427eSPaul Walmsley .slave = &omap2xxx_timer11_hwmod, 787844a3b63SPaul Walmsley .clk = "gpt11_ick", 788844a3b63SPaul Walmsley .addr = omap2_timer11_addrs, 789844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 790844a3b63SPaul Walmsley }; 791844a3b63SPaul Walmsley 792844a3b63SPaul Walmsley /* l4_core -> timer12 */ 793844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__timer12 = { 794cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 795cb48427eSPaul Walmsley .slave = &omap2xxx_timer12_hwmod, 796844a3b63SPaul Walmsley .clk = "gpt12_ick", 797844a3b63SPaul Walmsley .addr = omap2xxx_timer12_addrs, 798844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 799844a3b63SPaul Walmsley }; 800844a3b63SPaul Walmsley 801844a3b63SPaul Walmsley /* l4_wkup -> wd_timer2 */ 802844a3b63SPaul Walmsley static struct omap_hwmod_addr_space omap2430_wd_timer2_addrs[] = { 803844a3b63SPaul Walmsley { 804844a3b63SPaul Walmsley .pa_start = 0x49016000, 805844a3b63SPaul Walmsley .pa_end = 0x4901607f, 806844a3b63SPaul Walmsley .flags = ADDR_TYPE_RT 807844a3b63SPaul Walmsley }, 808844a3b63SPaul Walmsley { } 809844a3b63SPaul Walmsley }; 810844a3b63SPaul Walmsley 811844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = { 812cb48427eSPaul Walmsley .master = &omap2xxx_l4_wkup_hwmod, 813cb48427eSPaul Walmsley .slave = &omap2xxx_wd_timer2_hwmod, 814844a3b63SPaul Walmsley .clk = "mpu_wdt_ick", 815844a3b63SPaul Walmsley .addr = omap2430_wd_timer2_addrs, 816844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 817844a3b63SPaul Walmsley }; 818844a3b63SPaul Walmsley 819844a3b63SPaul Walmsley /* l4_core -> dss */ 820844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__dss = { 821cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 822cb48427eSPaul Walmsley .slave = &omap2xxx_dss_core_hwmod, 823844a3b63SPaul Walmsley .clk = "dss_ick", 824844a3b63SPaul Walmsley .addr = omap2_dss_addrs, 825844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 826844a3b63SPaul Walmsley }; 827844a3b63SPaul Walmsley 828844a3b63SPaul Walmsley /* l4_core -> dss_dispc */ 829844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__dss_dispc = { 830cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 831cb48427eSPaul Walmsley .slave = &omap2xxx_dss_dispc_hwmod, 832844a3b63SPaul Walmsley .clk = "dss_ick", 833844a3b63SPaul Walmsley .addr = omap2_dss_dispc_addrs, 834844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 835844a3b63SPaul Walmsley }; 836844a3b63SPaul Walmsley 837844a3b63SPaul Walmsley /* l4_core -> dss_rfbi */ 838844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__dss_rfbi = { 839cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 840cb48427eSPaul Walmsley .slave = &omap2xxx_dss_rfbi_hwmod, 841844a3b63SPaul Walmsley .clk = "dss_ick", 842844a3b63SPaul Walmsley .addr = omap2_dss_rfbi_addrs, 843844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 844844a3b63SPaul Walmsley }; 845844a3b63SPaul Walmsley 846844a3b63SPaul Walmsley /* l4_core -> dss_venc */ 847844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = { 848cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 849cb48427eSPaul Walmsley .slave = &omap2xxx_dss_venc_hwmod, 850844a3b63SPaul Walmsley .clk = "dss_ick", 851844a3b63SPaul Walmsley .addr = omap2_dss_venc_addrs, 852844a3b63SPaul Walmsley .flags = OCPIF_SWSUP_IDLE, 853844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 854844a3b63SPaul Walmsley }; 855844a3b63SPaul Walmsley 856844a3b63SPaul Walmsley /* l4_wkup -> gpio1 */ 857844a3b63SPaul Walmsley static struct omap_hwmod_addr_space omap2430_gpio1_addr_space[] = { 858844a3b63SPaul Walmsley { 859844a3b63SPaul Walmsley .pa_start = 0x4900C000, 860844a3b63SPaul Walmsley .pa_end = 0x4900C1ff, 861844a3b63SPaul Walmsley .flags = ADDR_TYPE_RT 862844a3b63SPaul Walmsley }, 863844a3b63SPaul Walmsley { } 864844a3b63SPaul Walmsley }; 865844a3b63SPaul Walmsley 866844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio1 = { 867cb48427eSPaul Walmsley .master = &omap2xxx_l4_wkup_hwmod, 868cb48427eSPaul Walmsley .slave = &omap2xxx_gpio1_hwmod, 869844a3b63SPaul Walmsley .clk = "gpios_ick", 870844a3b63SPaul Walmsley .addr = omap2430_gpio1_addr_space, 871844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 872844a3b63SPaul Walmsley }; 873844a3b63SPaul Walmsley 874844a3b63SPaul Walmsley /* l4_wkup -> gpio2 */ 875844a3b63SPaul Walmsley static struct omap_hwmod_addr_space omap2430_gpio2_addr_space[] = { 876844a3b63SPaul Walmsley { 877844a3b63SPaul Walmsley .pa_start = 0x4900E000, 878844a3b63SPaul Walmsley .pa_end = 0x4900E1ff, 879844a3b63SPaul Walmsley .flags = ADDR_TYPE_RT 880844a3b63SPaul Walmsley }, 881844a3b63SPaul Walmsley { } 882844a3b63SPaul Walmsley }; 883844a3b63SPaul Walmsley 884844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio2 = { 885cb48427eSPaul Walmsley .master = &omap2xxx_l4_wkup_hwmod, 886cb48427eSPaul Walmsley .slave = &omap2xxx_gpio2_hwmod, 887844a3b63SPaul Walmsley .clk = "gpios_ick", 888844a3b63SPaul Walmsley .addr = omap2430_gpio2_addr_space, 889844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 890844a3b63SPaul Walmsley }; 891844a3b63SPaul Walmsley 892844a3b63SPaul Walmsley /* l4_wkup -> gpio3 */ 893844a3b63SPaul Walmsley static struct omap_hwmod_addr_space omap2430_gpio3_addr_space[] = { 894844a3b63SPaul Walmsley { 895844a3b63SPaul Walmsley .pa_start = 0x49010000, 896844a3b63SPaul Walmsley .pa_end = 0x490101ff, 897844a3b63SPaul Walmsley .flags = ADDR_TYPE_RT 898844a3b63SPaul Walmsley }, 899844a3b63SPaul Walmsley { } 900844a3b63SPaul Walmsley }; 901844a3b63SPaul Walmsley 902844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio3 = { 903cb48427eSPaul Walmsley .master = &omap2xxx_l4_wkup_hwmod, 904cb48427eSPaul Walmsley .slave = &omap2xxx_gpio3_hwmod, 905844a3b63SPaul Walmsley .clk = "gpios_ick", 906844a3b63SPaul Walmsley .addr = omap2430_gpio3_addr_space, 907844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 908844a3b63SPaul Walmsley }; 909844a3b63SPaul Walmsley 910844a3b63SPaul Walmsley /* l4_wkup -> gpio4 */ 911844a3b63SPaul Walmsley static struct omap_hwmod_addr_space omap2430_gpio4_addr_space[] = { 912844a3b63SPaul Walmsley { 913844a3b63SPaul Walmsley .pa_start = 0x49012000, 914844a3b63SPaul Walmsley .pa_end = 0x490121ff, 915844a3b63SPaul Walmsley .flags = ADDR_TYPE_RT 916844a3b63SPaul Walmsley }, 917844a3b63SPaul Walmsley { } 918844a3b63SPaul Walmsley }; 919844a3b63SPaul Walmsley 920844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio4 = { 921cb48427eSPaul Walmsley .master = &omap2xxx_l4_wkup_hwmod, 922cb48427eSPaul Walmsley .slave = &omap2xxx_gpio4_hwmod, 923844a3b63SPaul Walmsley .clk = "gpios_ick", 924844a3b63SPaul Walmsley .addr = omap2430_gpio4_addr_space, 925844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 926844a3b63SPaul Walmsley }; 927844a3b63SPaul Walmsley 928844a3b63SPaul Walmsley /* l4_core -> gpio5 */ 929844a3b63SPaul Walmsley static struct omap_hwmod_addr_space omap2430_gpio5_addr_space[] = { 930844a3b63SPaul Walmsley { 931844a3b63SPaul Walmsley .pa_start = 0x480B6000, 932844a3b63SPaul Walmsley .pa_end = 0x480B61ff, 933844a3b63SPaul Walmsley .flags = ADDR_TYPE_RT 934844a3b63SPaul Walmsley }, 935844a3b63SPaul Walmsley { } 936844a3b63SPaul Walmsley }; 937844a3b63SPaul Walmsley 938844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__gpio5 = { 939cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 940844a3b63SPaul Walmsley .slave = &omap2430_gpio5_hwmod, 941844a3b63SPaul Walmsley .clk = "gpio5_ick", 942844a3b63SPaul Walmsley .addr = omap2430_gpio5_addr_space, 943844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 944844a3b63SPaul Walmsley }; 945844a3b63SPaul Walmsley 946844a3b63SPaul Walmsley /* dma_system -> L3 */ 947844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_dma_system__l3 = { 948844a3b63SPaul Walmsley .master = &omap2430_dma_system_hwmod, 949cb48427eSPaul Walmsley .slave = &omap2xxx_l3_main_hwmod, 950844a3b63SPaul Walmsley .clk = "core_l3_ck", 951844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 952844a3b63SPaul Walmsley }; 953844a3b63SPaul Walmsley 954844a3b63SPaul Walmsley /* l4_core -> dma_system */ 955844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__dma_system = { 956cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 957844a3b63SPaul Walmsley .slave = &omap2430_dma_system_hwmod, 958844a3b63SPaul Walmsley .clk = "sdma_ick", 959844a3b63SPaul Walmsley .addr = omap2_dma_system_addrs, 960844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 961844a3b63SPaul Walmsley }; 962844a3b63SPaul Walmsley 963844a3b63SPaul Walmsley /* l4_core -> mailbox */ 964844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__mailbox = { 965cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 966844a3b63SPaul Walmsley .slave = &omap2430_mailbox_hwmod, 967844a3b63SPaul Walmsley .addr = omap2_mailbox_addrs, 968844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 969844a3b63SPaul Walmsley }; 970844a3b63SPaul Walmsley 971844a3b63SPaul Walmsley /* l4_core -> mcbsp1 */ 972844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp1 = { 973cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 974844a3b63SPaul Walmsley .slave = &omap2430_mcbsp1_hwmod, 975844a3b63SPaul Walmsley .clk = "mcbsp1_ick", 976844a3b63SPaul Walmsley .addr = omap2_mcbsp1_addrs, 977844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 978844a3b63SPaul Walmsley }; 979844a3b63SPaul Walmsley 980844a3b63SPaul Walmsley /* l4_core -> mcbsp2 */ 981844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp2 = { 982cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 983844a3b63SPaul Walmsley .slave = &omap2430_mcbsp2_hwmod, 984844a3b63SPaul Walmsley .clk = "mcbsp2_ick", 985844a3b63SPaul Walmsley .addr = omap2xxx_mcbsp2_addrs, 986844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 987844a3b63SPaul Walmsley }; 988844a3b63SPaul Walmsley 989844a3b63SPaul Walmsley static struct omap_hwmod_addr_space omap2430_mcbsp3_addrs[] = { 990844a3b63SPaul Walmsley { 991844a3b63SPaul Walmsley .name = "mpu", 992844a3b63SPaul Walmsley .pa_start = 0x4808C000, 993844a3b63SPaul Walmsley .pa_end = 0x4808C0ff, 994844a3b63SPaul Walmsley .flags = ADDR_TYPE_RT 995844a3b63SPaul Walmsley }, 996844a3b63SPaul Walmsley { } 997844a3b63SPaul Walmsley }; 998844a3b63SPaul Walmsley 999844a3b63SPaul Walmsley /* l4_core -> mcbsp3 */ 1000844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp3 = { 1001cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 1002844a3b63SPaul Walmsley .slave = &omap2430_mcbsp3_hwmod, 1003844a3b63SPaul Walmsley .clk = "mcbsp3_ick", 1004844a3b63SPaul Walmsley .addr = omap2430_mcbsp3_addrs, 1005844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 1006844a3b63SPaul Walmsley }; 1007844a3b63SPaul Walmsley 1008844a3b63SPaul Walmsley static struct omap_hwmod_addr_space omap2430_mcbsp4_addrs[] = { 1009844a3b63SPaul Walmsley { 1010844a3b63SPaul Walmsley .name = "mpu", 1011844a3b63SPaul Walmsley .pa_start = 0x4808E000, 1012844a3b63SPaul Walmsley .pa_end = 0x4808E0ff, 1013844a3b63SPaul Walmsley .flags = ADDR_TYPE_RT 1014844a3b63SPaul Walmsley }, 1015844a3b63SPaul Walmsley { } 1016844a3b63SPaul Walmsley }; 1017844a3b63SPaul Walmsley 1018844a3b63SPaul Walmsley /* l4_core -> mcbsp4 */ 1019844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp4 = { 1020cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 1021844a3b63SPaul Walmsley .slave = &omap2430_mcbsp4_hwmod, 1022844a3b63SPaul Walmsley .clk = "mcbsp4_ick", 1023844a3b63SPaul Walmsley .addr = omap2430_mcbsp4_addrs, 1024844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 1025844a3b63SPaul Walmsley }; 1026844a3b63SPaul Walmsley 1027844a3b63SPaul Walmsley static struct omap_hwmod_addr_space omap2430_mcbsp5_addrs[] = { 1028844a3b63SPaul Walmsley { 1029844a3b63SPaul Walmsley .name = "mpu", 1030844a3b63SPaul Walmsley .pa_start = 0x48096000, 1031844a3b63SPaul Walmsley .pa_end = 0x480960ff, 1032844a3b63SPaul Walmsley .flags = ADDR_TYPE_RT 1033844a3b63SPaul Walmsley }, 1034844a3b63SPaul Walmsley { } 1035844a3b63SPaul Walmsley }; 1036844a3b63SPaul Walmsley 1037844a3b63SPaul Walmsley /* l4_core -> mcbsp5 */ 1038844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp5 = { 1039cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 1040844a3b63SPaul Walmsley .slave = &omap2430_mcbsp5_hwmod, 1041844a3b63SPaul Walmsley .clk = "mcbsp5_ick", 1042844a3b63SPaul Walmsley .addr = omap2430_mcbsp5_addrs, 1043844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 1044844a3b63SPaul Walmsley }; 1045844a3b63SPaul Walmsley 10460a78c5c5SPaul Walmsley static struct omap_hwmod_ocp_if *omap2430_hwmod_ocp_ifs[] __initdata = { 10470a78c5c5SPaul Walmsley &omap2430_l3_main__l4_core, 10480a78c5c5SPaul Walmsley &omap2430_mpu__l3_main, 10490a78c5c5SPaul Walmsley &omap2430_dss__l3, 10500a78c5c5SPaul Walmsley &omap2430_usbhsotg__l3, 10510a78c5c5SPaul Walmsley &omap2430_l4_core__i2c1, 10520a78c5c5SPaul Walmsley &omap2430_l4_core__i2c2, 10530a78c5c5SPaul Walmsley &omap2430_l4_core__l4_wkup, 10540a78c5c5SPaul Walmsley &omap2_l4_core__uart1, 10550a78c5c5SPaul Walmsley &omap2_l4_core__uart2, 10560a78c5c5SPaul Walmsley &omap2_l4_core__uart3, 10570a78c5c5SPaul Walmsley &omap2430_l4_core__usbhsotg, 10580a78c5c5SPaul Walmsley &omap2430_l4_core__mmc1, 10590a78c5c5SPaul Walmsley &omap2430_l4_core__mmc2, 10600a78c5c5SPaul Walmsley &omap2430_l4_core__mcspi1, 10610a78c5c5SPaul Walmsley &omap2430_l4_core__mcspi2, 10620a78c5c5SPaul Walmsley &omap2430_l4_core__mcspi3, 10630a78c5c5SPaul Walmsley &omap2430_l3__iva, 10640a78c5c5SPaul Walmsley &omap2430_l4_wkup__timer1, 10650a78c5c5SPaul Walmsley &omap2430_l4_core__timer2, 10660a78c5c5SPaul Walmsley &omap2430_l4_core__timer3, 10670a78c5c5SPaul Walmsley &omap2430_l4_core__timer4, 10680a78c5c5SPaul Walmsley &omap2430_l4_core__timer5, 10690a78c5c5SPaul Walmsley &omap2430_l4_core__timer6, 10700a78c5c5SPaul Walmsley &omap2430_l4_core__timer7, 10710a78c5c5SPaul Walmsley &omap2430_l4_core__timer8, 10720a78c5c5SPaul Walmsley &omap2430_l4_core__timer9, 10730a78c5c5SPaul Walmsley &omap2430_l4_core__timer10, 10740a78c5c5SPaul Walmsley &omap2430_l4_core__timer11, 10750a78c5c5SPaul Walmsley &omap2430_l4_core__timer12, 10760a78c5c5SPaul Walmsley &omap2430_l4_wkup__wd_timer2, 10770a78c5c5SPaul Walmsley &omap2430_l4_core__dss, 10780a78c5c5SPaul Walmsley &omap2430_l4_core__dss_dispc, 10790a78c5c5SPaul Walmsley &omap2430_l4_core__dss_rfbi, 10800a78c5c5SPaul Walmsley &omap2430_l4_core__dss_venc, 10810a78c5c5SPaul Walmsley &omap2430_l4_wkup__gpio1, 10820a78c5c5SPaul Walmsley &omap2430_l4_wkup__gpio2, 10830a78c5c5SPaul Walmsley &omap2430_l4_wkup__gpio3, 10840a78c5c5SPaul Walmsley &omap2430_l4_wkup__gpio4, 10850a78c5c5SPaul Walmsley &omap2430_l4_core__gpio5, 10860a78c5c5SPaul Walmsley &omap2430_dma_system__l3, 10870a78c5c5SPaul Walmsley &omap2430_l4_core__dma_system, 10880a78c5c5SPaul Walmsley &omap2430_l4_core__mailbox, 10890a78c5c5SPaul Walmsley &omap2430_l4_core__mcbsp1, 10900a78c5c5SPaul Walmsley &omap2430_l4_core__mcbsp2, 10910a78c5c5SPaul Walmsley &omap2430_l4_core__mcbsp3, 10920a78c5c5SPaul Walmsley &omap2430_l4_core__mcbsp4, 10930a78c5c5SPaul Walmsley &omap2430_l4_core__mcbsp5, 10947359154eSPaul Walmsley NULL, 10957359154eSPaul Walmsley }; 10967359154eSPaul Walmsley 10977359154eSPaul Walmsley int __init omap2430_hwmod_init(void) 10987359154eSPaul Walmsley { 10990a78c5c5SPaul Walmsley return omap_hwmod_register_links(omap2430_hwmod_ocp_ifs); 11007359154eSPaul Walmsley } 1101