17359154eSPaul Walmsley /* 27359154eSPaul Walmsley * omap_hwmod_2430_data.c - hardware modules present on the OMAP2430 chips 37359154eSPaul Walmsley * 47359154eSPaul Walmsley * Copyright (C) 2009-2010 Nokia Corporation 57359154eSPaul Walmsley * Paul Walmsley 67359154eSPaul Walmsley * 77359154eSPaul Walmsley * This program is free software; you can redistribute it and/or modify 87359154eSPaul Walmsley * it under the terms of the GNU General Public License version 2 as 97359154eSPaul Walmsley * published by the Free Software Foundation. 107359154eSPaul Walmsley * 117359154eSPaul Walmsley * XXX handle crossbar/shared link difference for L3? 127359154eSPaul Walmsley * XXX these should be marked initdata for multi-OMAP kernels 137359154eSPaul Walmsley */ 147359154eSPaul Walmsley #include <plat/omap_hwmod.h> 157359154eSPaul Walmsley #include <mach/irqs.h> 167359154eSPaul Walmsley #include <plat/cpu.h> 177359154eSPaul Walmsley #include <plat/dma.h> 18046465b7SKevin Hilman #include <plat/serial.h> 192004290fSPaul Walmsley #include <plat/i2c.h> 20aeac0e44SVaradarajan, Charulatha #include <plat/gpio.h> 217f904c78SCharulatha V #include <plat/mcspi.h> 227359154eSPaul Walmsley 2343b40992SPaul Walmsley #include "omap_hwmod_common_data.h" 2443b40992SPaul Walmsley 257359154eSPaul Walmsley #include "prm-regbits-24xx.h" 26165e2161SVaradarajan, Charulatha #include "cm-regbits-24xx.h" 27ff2516fbSPaul Walmsley #include "wd_timer.h" 287359154eSPaul Walmsley 297359154eSPaul Walmsley /* 307359154eSPaul Walmsley * OMAP2430 hardware module integration data 317359154eSPaul Walmsley * 327359154eSPaul Walmsley * ALl of the data in this section should be autogeneratable from the 337359154eSPaul Walmsley * TI hardware database or other technical documentation. Data that 347359154eSPaul Walmsley * is driver-specific or driver-kernel integration-specific belongs 357359154eSPaul Walmsley * elsewhere. 367359154eSPaul Walmsley */ 377359154eSPaul Walmsley 387359154eSPaul Walmsley static struct omap_hwmod omap2430_mpu_hwmod; 3908072acfSPaul Walmsley static struct omap_hwmod omap2430_iva_hwmod; 404a7cf90aSKevin Hilman static struct omap_hwmod omap2430_l3_main_hwmod; 417359154eSPaul Walmsley static struct omap_hwmod omap2430_l4_core_hwmod; 42165e2161SVaradarajan, Charulatha static struct omap_hwmod omap2430_wd_timer2_hwmod; 43aeac0e44SVaradarajan, Charulatha static struct omap_hwmod omap2430_gpio1_hwmod; 44aeac0e44SVaradarajan, Charulatha static struct omap_hwmod omap2430_gpio2_hwmod; 45aeac0e44SVaradarajan, Charulatha static struct omap_hwmod omap2430_gpio3_hwmod; 46aeac0e44SVaradarajan, Charulatha static struct omap_hwmod omap2430_gpio4_hwmod; 47aeac0e44SVaradarajan, Charulatha static struct omap_hwmod omap2430_gpio5_hwmod; 4882cbd1aeSG, Manjunath Kondaiah static struct omap_hwmod omap2430_dma_system_hwmod; 497f904c78SCharulatha V static struct omap_hwmod omap2430_mcspi1_hwmod; 507f904c78SCharulatha V static struct omap_hwmod omap2430_mcspi2_hwmod; 517f904c78SCharulatha V static struct omap_hwmod omap2430_mcspi3_hwmod; 527359154eSPaul Walmsley 537359154eSPaul Walmsley /* L3 -> L4_CORE interface */ 544a7cf90aSKevin Hilman static struct omap_hwmod_ocp_if omap2430_l3_main__l4_core = { 554a7cf90aSKevin Hilman .master = &omap2430_l3_main_hwmod, 567359154eSPaul Walmsley .slave = &omap2430_l4_core_hwmod, 577359154eSPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 587359154eSPaul Walmsley }; 597359154eSPaul Walmsley 607359154eSPaul Walmsley /* MPU -> L3 interface */ 614a7cf90aSKevin Hilman static struct omap_hwmod_ocp_if omap2430_mpu__l3_main = { 627359154eSPaul Walmsley .master = &omap2430_mpu_hwmod, 634a7cf90aSKevin Hilman .slave = &omap2430_l3_main_hwmod, 647359154eSPaul Walmsley .user = OCP_USER_MPU, 657359154eSPaul Walmsley }; 667359154eSPaul Walmsley 677359154eSPaul Walmsley /* Slave interfaces on the L3 interconnect */ 684a7cf90aSKevin Hilman static struct omap_hwmod_ocp_if *omap2430_l3_main_slaves[] = { 694a7cf90aSKevin Hilman &omap2430_mpu__l3_main, 707359154eSPaul Walmsley }; 717359154eSPaul Walmsley 727359154eSPaul Walmsley /* Master interfaces on the L3 interconnect */ 734a7cf90aSKevin Hilman static struct omap_hwmod_ocp_if *omap2430_l3_main_masters[] = { 744a7cf90aSKevin Hilman &omap2430_l3_main__l4_core, 757359154eSPaul Walmsley }; 767359154eSPaul Walmsley 777359154eSPaul Walmsley /* L3 */ 784a7cf90aSKevin Hilman static struct omap_hwmod omap2430_l3_main_hwmod = { 79fa98347eSBenoit Cousson .name = "l3_main", 8043b40992SPaul Walmsley .class = &l3_hwmod_class, 814a7cf90aSKevin Hilman .masters = omap2430_l3_main_masters, 824a7cf90aSKevin Hilman .masters_cnt = ARRAY_SIZE(omap2430_l3_main_masters), 834a7cf90aSKevin Hilman .slaves = omap2430_l3_main_slaves, 844a7cf90aSKevin Hilman .slaves_cnt = ARRAY_SIZE(omap2430_l3_main_slaves), 852eb1875dSKevin Hilman .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 862eb1875dSKevin Hilman .flags = HWMOD_NO_IDLEST, 877359154eSPaul Walmsley }; 887359154eSPaul Walmsley 897359154eSPaul Walmsley static struct omap_hwmod omap2430_l4_wkup_hwmod; 90046465b7SKevin Hilman static struct omap_hwmod omap2430_uart1_hwmod; 91046465b7SKevin Hilman static struct omap_hwmod omap2430_uart2_hwmod; 92046465b7SKevin Hilman static struct omap_hwmod omap2430_uart3_hwmod; 932004290fSPaul Walmsley static struct omap_hwmod omap2430_i2c1_hwmod; 942004290fSPaul Walmsley static struct omap_hwmod omap2430_i2c2_hwmod; 952004290fSPaul Walmsley 962004290fSPaul Walmsley /* I2C IP block address space length (in bytes) */ 972004290fSPaul Walmsley #define OMAP2_I2C_AS_LEN 128 982004290fSPaul Walmsley 992004290fSPaul Walmsley /* L4 CORE -> I2C1 interface */ 1002004290fSPaul Walmsley static struct omap_hwmod_addr_space omap2430_i2c1_addr_space[] = { 1012004290fSPaul Walmsley { 1022004290fSPaul Walmsley .pa_start = 0x48070000, 1032004290fSPaul Walmsley .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN - 1, 1042004290fSPaul Walmsley .flags = ADDR_TYPE_RT, 1052004290fSPaul Walmsley }, 1062004290fSPaul Walmsley }; 1072004290fSPaul Walmsley 1082004290fSPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__i2c1 = { 1092004290fSPaul Walmsley .master = &omap2430_l4_core_hwmod, 1102004290fSPaul Walmsley .slave = &omap2430_i2c1_hwmod, 1112004290fSPaul Walmsley .clk = "i2c1_ick", 1122004290fSPaul Walmsley .addr = omap2430_i2c1_addr_space, 1132004290fSPaul Walmsley .addr_cnt = ARRAY_SIZE(omap2430_i2c1_addr_space), 1142004290fSPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 1152004290fSPaul Walmsley }; 1162004290fSPaul Walmsley 1172004290fSPaul Walmsley /* L4 CORE -> I2C2 interface */ 1182004290fSPaul Walmsley static struct omap_hwmod_addr_space omap2430_i2c2_addr_space[] = { 1192004290fSPaul Walmsley { 1202004290fSPaul Walmsley .pa_start = 0x48072000, 1212004290fSPaul Walmsley .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN - 1, 1222004290fSPaul Walmsley .flags = ADDR_TYPE_RT, 1232004290fSPaul Walmsley }, 1242004290fSPaul Walmsley }; 1252004290fSPaul Walmsley 1262004290fSPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__i2c2 = { 1272004290fSPaul Walmsley .master = &omap2430_l4_core_hwmod, 1282004290fSPaul Walmsley .slave = &omap2430_i2c2_hwmod, 1292004290fSPaul Walmsley .clk = "i2c2_ick", 1302004290fSPaul Walmsley .addr = omap2430_i2c2_addr_space, 1312004290fSPaul Walmsley .addr_cnt = ARRAY_SIZE(omap2430_i2c2_addr_space), 1322004290fSPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 1332004290fSPaul Walmsley }; 1347359154eSPaul Walmsley 1357359154eSPaul Walmsley /* L4_CORE -> L4_WKUP interface */ 1367359154eSPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__l4_wkup = { 1377359154eSPaul Walmsley .master = &omap2430_l4_core_hwmod, 1387359154eSPaul Walmsley .slave = &omap2430_l4_wkup_hwmod, 1397359154eSPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 1407359154eSPaul Walmsley }; 1417359154eSPaul Walmsley 142046465b7SKevin Hilman /* L4 CORE -> UART1 interface */ 143046465b7SKevin Hilman static struct omap_hwmod_addr_space omap2430_uart1_addr_space[] = { 144046465b7SKevin Hilman { 145046465b7SKevin Hilman .pa_start = OMAP2_UART1_BASE, 146046465b7SKevin Hilman .pa_end = OMAP2_UART1_BASE + SZ_8K - 1, 147046465b7SKevin Hilman .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, 148046465b7SKevin Hilman }, 149046465b7SKevin Hilman }; 150046465b7SKevin Hilman 151046465b7SKevin Hilman static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = { 152046465b7SKevin Hilman .master = &omap2430_l4_core_hwmod, 153046465b7SKevin Hilman .slave = &omap2430_uart1_hwmod, 154046465b7SKevin Hilman .clk = "uart1_ick", 155046465b7SKevin Hilman .addr = omap2430_uart1_addr_space, 156046465b7SKevin Hilman .addr_cnt = ARRAY_SIZE(omap2430_uart1_addr_space), 157046465b7SKevin Hilman .user = OCP_USER_MPU | OCP_USER_SDMA, 158046465b7SKevin Hilman }; 159046465b7SKevin Hilman 160046465b7SKevin Hilman /* L4 CORE -> UART2 interface */ 161046465b7SKevin Hilman static struct omap_hwmod_addr_space omap2430_uart2_addr_space[] = { 162046465b7SKevin Hilman { 163046465b7SKevin Hilman .pa_start = OMAP2_UART2_BASE, 164046465b7SKevin Hilman .pa_end = OMAP2_UART2_BASE + SZ_1K - 1, 165046465b7SKevin Hilman .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, 166046465b7SKevin Hilman }, 167046465b7SKevin Hilman }; 168046465b7SKevin Hilman 169046465b7SKevin Hilman static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = { 170046465b7SKevin Hilman .master = &omap2430_l4_core_hwmod, 171046465b7SKevin Hilman .slave = &omap2430_uart2_hwmod, 172046465b7SKevin Hilman .clk = "uart2_ick", 173046465b7SKevin Hilman .addr = omap2430_uart2_addr_space, 174046465b7SKevin Hilman .addr_cnt = ARRAY_SIZE(omap2430_uart2_addr_space), 175046465b7SKevin Hilman .user = OCP_USER_MPU | OCP_USER_SDMA, 176046465b7SKevin Hilman }; 177046465b7SKevin Hilman 178046465b7SKevin Hilman /* L4 PER -> UART3 interface */ 179046465b7SKevin Hilman static struct omap_hwmod_addr_space omap2430_uart3_addr_space[] = { 180046465b7SKevin Hilman { 181046465b7SKevin Hilman .pa_start = OMAP2_UART3_BASE, 182046465b7SKevin Hilman .pa_end = OMAP2_UART3_BASE + SZ_1K - 1, 183046465b7SKevin Hilman .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, 184046465b7SKevin Hilman }, 185046465b7SKevin Hilman }; 186046465b7SKevin Hilman 187046465b7SKevin Hilman static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { 188046465b7SKevin Hilman .master = &omap2430_l4_core_hwmod, 189046465b7SKevin Hilman .slave = &omap2430_uart3_hwmod, 190046465b7SKevin Hilman .clk = "uart3_ick", 191046465b7SKevin Hilman .addr = omap2430_uart3_addr_space, 192046465b7SKevin Hilman .addr_cnt = ARRAY_SIZE(omap2430_uart3_addr_space), 193046465b7SKevin Hilman .user = OCP_USER_MPU | OCP_USER_SDMA, 194046465b7SKevin Hilman }; 195046465b7SKevin Hilman 1967359154eSPaul Walmsley /* Slave interfaces on the L4_CORE interconnect */ 1977359154eSPaul Walmsley static struct omap_hwmod_ocp_if *omap2430_l4_core_slaves[] = { 1984a7cf90aSKevin Hilman &omap2430_l3_main__l4_core, 1997359154eSPaul Walmsley }; 2007359154eSPaul Walmsley 2017359154eSPaul Walmsley /* Master interfaces on the L4_CORE interconnect */ 2027359154eSPaul Walmsley static struct omap_hwmod_ocp_if *omap2430_l4_core_masters[] = { 2037359154eSPaul Walmsley &omap2430_l4_core__l4_wkup, 2047359154eSPaul Walmsley }; 2057359154eSPaul Walmsley 2067359154eSPaul Walmsley /* L4 CORE */ 2077359154eSPaul Walmsley static struct omap_hwmod omap2430_l4_core_hwmod = { 208fa98347eSBenoit Cousson .name = "l4_core", 20943b40992SPaul Walmsley .class = &l4_hwmod_class, 2107359154eSPaul Walmsley .masters = omap2430_l4_core_masters, 2117359154eSPaul Walmsley .masters_cnt = ARRAY_SIZE(omap2430_l4_core_masters), 2127359154eSPaul Walmsley .slaves = omap2430_l4_core_slaves, 2137359154eSPaul Walmsley .slaves_cnt = ARRAY_SIZE(omap2430_l4_core_slaves), 2142eb1875dSKevin Hilman .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 2152eb1875dSKevin Hilman .flags = HWMOD_NO_IDLEST, 2167359154eSPaul Walmsley }; 2177359154eSPaul Walmsley 2187359154eSPaul Walmsley /* Slave interfaces on the L4_WKUP interconnect */ 2197359154eSPaul Walmsley static struct omap_hwmod_ocp_if *omap2430_l4_wkup_slaves[] = { 2207359154eSPaul Walmsley &omap2430_l4_core__l4_wkup, 221046465b7SKevin Hilman &omap2_l4_core__uart1, 222046465b7SKevin Hilman &omap2_l4_core__uart2, 223046465b7SKevin Hilman &omap2_l4_core__uart3, 2247359154eSPaul Walmsley }; 2257359154eSPaul Walmsley 2267359154eSPaul Walmsley /* Master interfaces on the L4_WKUP interconnect */ 2277359154eSPaul Walmsley static struct omap_hwmod_ocp_if *omap2430_l4_wkup_masters[] = { 2287359154eSPaul Walmsley }; 2297359154eSPaul Walmsley 2307f904c78SCharulatha V /* l4 core -> mcspi1 interface */ 2317f904c78SCharulatha V static struct omap_hwmod_addr_space omap2430_mcspi1_addr_space[] = { 2327f904c78SCharulatha V { 2337f904c78SCharulatha V .pa_start = 0x48098000, 2347f904c78SCharulatha V .pa_end = 0x480980ff, 2357f904c78SCharulatha V .flags = ADDR_TYPE_RT, 2367f904c78SCharulatha V }, 2377f904c78SCharulatha V }; 2387f904c78SCharulatha V 2397f904c78SCharulatha V static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi1 = { 2407f904c78SCharulatha V .master = &omap2430_l4_core_hwmod, 2417f904c78SCharulatha V .slave = &omap2430_mcspi1_hwmod, 2427f904c78SCharulatha V .clk = "mcspi1_ick", 2437f904c78SCharulatha V .addr = omap2430_mcspi1_addr_space, 2447f904c78SCharulatha V .addr_cnt = ARRAY_SIZE(omap2430_mcspi1_addr_space), 2457f904c78SCharulatha V .user = OCP_USER_MPU | OCP_USER_SDMA, 2467f904c78SCharulatha V }; 2477f904c78SCharulatha V 2487f904c78SCharulatha V /* l4 core -> mcspi2 interface */ 2497f904c78SCharulatha V static struct omap_hwmod_addr_space omap2430_mcspi2_addr_space[] = { 2507f904c78SCharulatha V { 2517f904c78SCharulatha V .pa_start = 0x4809a000, 2527f904c78SCharulatha V .pa_end = 0x4809a0ff, 2537f904c78SCharulatha V .flags = ADDR_TYPE_RT, 2547f904c78SCharulatha V }, 2557f904c78SCharulatha V }; 2567f904c78SCharulatha V 2577f904c78SCharulatha V static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi2 = { 2587f904c78SCharulatha V .master = &omap2430_l4_core_hwmod, 2597f904c78SCharulatha V .slave = &omap2430_mcspi2_hwmod, 2607f904c78SCharulatha V .clk = "mcspi2_ick", 2617f904c78SCharulatha V .addr = omap2430_mcspi2_addr_space, 2627f904c78SCharulatha V .addr_cnt = ARRAY_SIZE(omap2430_mcspi2_addr_space), 2637f904c78SCharulatha V .user = OCP_USER_MPU | OCP_USER_SDMA, 2647f904c78SCharulatha V }; 2657f904c78SCharulatha V 2667f904c78SCharulatha V /* l4 core -> mcspi3 interface */ 2677f904c78SCharulatha V static struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[] = { 2687f904c78SCharulatha V { 2697f904c78SCharulatha V .pa_start = 0x480b8000, 2707f904c78SCharulatha V .pa_end = 0x480b80ff, 2717f904c78SCharulatha V .flags = ADDR_TYPE_RT, 2727f904c78SCharulatha V }, 2737f904c78SCharulatha V }; 2747f904c78SCharulatha V 2757f904c78SCharulatha V static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi3 = { 2767f904c78SCharulatha V .master = &omap2430_l4_core_hwmod, 2777f904c78SCharulatha V .slave = &omap2430_mcspi3_hwmod, 2787f904c78SCharulatha V .clk = "mcspi3_ick", 2797f904c78SCharulatha V .addr = omap2430_mcspi3_addr_space, 2807f904c78SCharulatha V .addr_cnt = ARRAY_SIZE(omap2430_mcspi3_addr_space), 2817f904c78SCharulatha V .user = OCP_USER_MPU | OCP_USER_SDMA, 2827f904c78SCharulatha V }; 2837f904c78SCharulatha V 2847359154eSPaul Walmsley /* L4 WKUP */ 2857359154eSPaul Walmsley static struct omap_hwmod omap2430_l4_wkup_hwmod = { 286fa98347eSBenoit Cousson .name = "l4_wkup", 28743b40992SPaul Walmsley .class = &l4_hwmod_class, 2887359154eSPaul Walmsley .masters = omap2430_l4_wkup_masters, 2897359154eSPaul Walmsley .masters_cnt = ARRAY_SIZE(omap2430_l4_wkup_masters), 2907359154eSPaul Walmsley .slaves = omap2430_l4_wkup_slaves, 2917359154eSPaul Walmsley .slaves_cnt = ARRAY_SIZE(omap2430_l4_wkup_slaves), 2922eb1875dSKevin Hilman .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 2932eb1875dSKevin Hilman .flags = HWMOD_NO_IDLEST, 2947359154eSPaul Walmsley }; 2957359154eSPaul Walmsley 2967359154eSPaul Walmsley /* Master interfaces on the MPU device */ 2977359154eSPaul Walmsley static struct omap_hwmod_ocp_if *omap2430_mpu_masters[] = { 2984a7cf90aSKevin Hilman &omap2430_mpu__l3_main, 2997359154eSPaul Walmsley }; 3007359154eSPaul Walmsley 3017359154eSPaul Walmsley /* MPU */ 3027359154eSPaul Walmsley static struct omap_hwmod omap2430_mpu_hwmod = { 3035c2c0296SBenoit Cousson .name = "mpu", 30443b40992SPaul Walmsley .class = &mpu_hwmod_class, 3057359154eSPaul Walmsley .main_clk = "mpu_ck", 3067359154eSPaul Walmsley .masters = omap2430_mpu_masters, 3077359154eSPaul Walmsley .masters_cnt = ARRAY_SIZE(omap2430_mpu_masters), 3087359154eSPaul Walmsley .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 3097359154eSPaul Walmsley }; 3107359154eSPaul Walmsley 31108072acfSPaul Walmsley /* 31208072acfSPaul Walmsley * IVA2_1 interface data 31308072acfSPaul Walmsley */ 31408072acfSPaul Walmsley 31508072acfSPaul Walmsley /* IVA2 <- L3 interface */ 31608072acfSPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l3__iva = { 31708072acfSPaul Walmsley .master = &omap2430_l3_main_hwmod, 31808072acfSPaul Walmsley .slave = &omap2430_iva_hwmod, 31908072acfSPaul Walmsley .clk = "dsp_fck", 32008072acfSPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 32108072acfSPaul Walmsley }; 32208072acfSPaul Walmsley 32308072acfSPaul Walmsley static struct omap_hwmod_ocp_if *omap2430_iva_masters[] = { 32408072acfSPaul Walmsley &omap2430_l3__iva, 32508072acfSPaul Walmsley }; 32608072acfSPaul Walmsley 32708072acfSPaul Walmsley /* 32808072acfSPaul Walmsley * IVA2 (IVA2) 32908072acfSPaul Walmsley */ 33008072acfSPaul Walmsley 33108072acfSPaul Walmsley static struct omap_hwmod omap2430_iva_hwmod = { 33208072acfSPaul Walmsley .name = "iva", 33308072acfSPaul Walmsley .class = &iva_hwmod_class, 33408072acfSPaul Walmsley .masters = omap2430_iva_masters, 33508072acfSPaul Walmsley .masters_cnt = ARRAY_SIZE(omap2430_iva_masters), 33608072acfSPaul Walmsley .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) 33708072acfSPaul Walmsley }; 33808072acfSPaul Walmsley 339165e2161SVaradarajan, Charulatha /* l4_wkup -> wd_timer2 */ 340165e2161SVaradarajan, Charulatha static struct omap_hwmod_addr_space omap2430_wd_timer2_addrs[] = { 341165e2161SVaradarajan, Charulatha { 342165e2161SVaradarajan, Charulatha .pa_start = 0x49016000, 343165e2161SVaradarajan, Charulatha .pa_end = 0x4901607f, 344165e2161SVaradarajan, Charulatha .flags = ADDR_TYPE_RT 345165e2161SVaradarajan, Charulatha }, 346165e2161SVaradarajan, Charulatha }; 347165e2161SVaradarajan, Charulatha 348165e2161SVaradarajan, Charulatha static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = { 349165e2161SVaradarajan, Charulatha .master = &omap2430_l4_wkup_hwmod, 350165e2161SVaradarajan, Charulatha .slave = &omap2430_wd_timer2_hwmod, 351165e2161SVaradarajan, Charulatha .clk = "mpu_wdt_ick", 352165e2161SVaradarajan, Charulatha .addr = omap2430_wd_timer2_addrs, 353165e2161SVaradarajan, Charulatha .addr_cnt = ARRAY_SIZE(omap2430_wd_timer2_addrs), 354165e2161SVaradarajan, Charulatha .user = OCP_USER_MPU | OCP_USER_SDMA, 355165e2161SVaradarajan, Charulatha }; 356165e2161SVaradarajan, Charulatha 357165e2161SVaradarajan, Charulatha /* 358165e2161SVaradarajan, Charulatha * 'wd_timer' class 359165e2161SVaradarajan, Charulatha * 32-bit watchdog upward counter that generates a pulse on the reset pin on 360165e2161SVaradarajan, Charulatha * overflow condition 361165e2161SVaradarajan, Charulatha */ 362165e2161SVaradarajan, Charulatha 363165e2161SVaradarajan, Charulatha static struct omap_hwmod_class_sysconfig omap2430_wd_timer_sysc = { 364165e2161SVaradarajan, Charulatha .rev_offs = 0x0, 365165e2161SVaradarajan, Charulatha .sysc_offs = 0x0010, 366165e2161SVaradarajan, Charulatha .syss_offs = 0x0014, 367165e2161SVaradarajan, Charulatha .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET | 368165e2161SVaradarajan, Charulatha SYSC_HAS_AUTOIDLE), 369165e2161SVaradarajan, Charulatha .sysc_fields = &omap_hwmod_sysc_type1, 370165e2161SVaradarajan, Charulatha }; 371165e2161SVaradarajan, Charulatha 372165e2161SVaradarajan, Charulatha static struct omap_hwmod_class omap2430_wd_timer_hwmod_class = { 373165e2161SVaradarajan, Charulatha .name = "wd_timer", 374165e2161SVaradarajan, Charulatha .sysc = &omap2430_wd_timer_sysc, 375ff2516fbSPaul Walmsley .pre_shutdown = &omap2_wd_timer_disable 376165e2161SVaradarajan, Charulatha }; 377165e2161SVaradarajan, Charulatha 378165e2161SVaradarajan, Charulatha /* wd_timer2 */ 379165e2161SVaradarajan, Charulatha static struct omap_hwmod_ocp_if *omap2430_wd_timer2_slaves[] = { 380165e2161SVaradarajan, Charulatha &omap2430_l4_wkup__wd_timer2, 381165e2161SVaradarajan, Charulatha }; 382165e2161SVaradarajan, Charulatha 383165e2161SVaradarajan, Charulatha static struct omap_hwmod omap2430_wd_timer2_hwmod = { 384165e2161SVaradarajan, Charulatha .name = "wd_timer2", 385165e2161SVaradarajan, Charulatha .class = &omap2430_wd_timer_hwmod_class, 386165e2161SVaradarajan, Charulatha .main_clk = "mpu_wdt_fck", 387165e2161SVaradarajan, Charulatha .prcm = { 388165e2161SVaradarajan, Charulatha .omap2 = { 389165e2161SVaradarajan, Charulatha .prcm_reg_id = 1, 390165e2161SVaradarajan, Charulatha .module_bit = OMAP24XX_EN_MPU_WDT_SHIFT, 391165e2161SVaradarajan, Charulatha .module_offs = WKUP_MOD, 392165e2161SVaradarajan, Charulatha .idlest_reg_id = 1, 393165e2161SVaradarajan, Charulatha .idlest_idle_bit = OMAP24XX_ST_MPU_WDT_SHIFT, 394165e2161SVaradarajan, Charulatha }, 395165e2161SVaradarajan, Charulatha }, 396165e2161SVaradarajan, Charulatha .slaves = omap2430_wd_timer2_slaves, 397165e2161SVaradarajan, Charulatha .slaves_cnt = ARRAY_SIZE(omap2430_wd_timer2_slaves), 398165e2161SVaradarajan, Charulatha .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 399165e2161SVaradarajan, Charulatha }; 400165e2161SVaradarajan, Charulatha 401046465b7SKevin Hilman /* UART */ 402046465b7SKevin Hilman 403046465b7SKevin Hilman static struct omap_hwmod_class_sysconfig uart_sysc = { 404046465b7SKevin Hilman .rev_offs = 0x50, 405046465b7SKevin Hilman .sysc_offs = 0x54, 406046465b7SKevin Hilman .syss_offs = 0x58, 407046465b7SKevin Hilman .sysc_flags = (SYSC_HAS_SIDLEMODE | 408046465b7SKevin Hilman SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | 409046465b7SKevin Hilman SYSC_HAS_AUTOIDLE), 410046465b7SKevin Hilman .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), 411046465b7SKevin Hilman .sysc_fields = &omap_hwmod_sysc_type1, 412046465b7SKevin Hilman }; 413046465b7SKevin Hilman 414046465b7SKevin Hilman static struct omap_hwmod_class uart_class = { 415046465b7SKevin Hilman .name = "uart", 416046465b7SKevin Hilman .sysc = &uart_sysc, 417046465b7SKevin Hilman }; 418046465b7SKevin Hilman 419046465b7SKevin Hilman /* UART1 */ 420046465b7SKevin Hilman 421046465b7SKevin Hilman static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { 422046465b7SKevin Hilman { .irq = INT_24XX_UART1_IRQ, }, 423046465b7SKevin Hilman }; 424046465b7SKevin Hilman 425046465b7SKevin Hilman static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { 426046465b7SKevin Hilman { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, 427046465b7SKevin Hilman { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, 428046465b7SKevin Hilman }; 429046465b7SKevin Hilman 430046465b7SKevin Hilman static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = { 431046465b7SKevin Hilman &omap2_l4_core__uart1, 432046465b7SKevin Hilman }; 433046465b7SKevin Hilman 434046465b7SKevin Hilman static struct omap_hwmod omap2430_uart1_hwmod = { 435046465b7SKevin Hilman .name = "uart1", 436046465b7SKevin Hilman .mpu_irqs = uart1_mpu_irqs, 437046465b7SKevin Hilman .mpu_irqs_cnt = ARRAY_SIZE(uart1_mpu_irqs), 438046465b7SKevin Hilman .sdma_reqs = uart1_sdma_reqs, 439046465b7SKevin Hilman .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), 440046465b7SKevin Hilman .main_clk = "uart1_fck", 441046465b7SKevin Hilman .prcm = { 442046465b7SKevin Hilman .omap2 = { 443046465b7SKevin Hilman .module_offs = CORE_MOD, 444046465b7SKevin Hilman .prcm_reg_id = 1, 445046465b7SKevin Hilman .module_bit = OMAP24XX_EN_UART1_SHIFT, 446046465b7SKevin Hilman .idlest_reg_id = 1, 447046465b7SKevin Hilman .idlest_idle_bit = OMAP24XX_EN_UART1_SHIFT, 448046465b7SKevin Hilman }, 449046465b7SKevin Hilman }, 450046465b7SKevin Hilman .slaves = omap2430_uart1_slaves, 451046465b7SKevin Hilman .slaves_cnt = ARRAY_SIZE(omap2430_uart1_slaves), 452046465b7SKevin Hilman .class = &uart_class, 453046465b7SKevin Hilman .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 454046465b7SKevin Hilman }; 455046465b7SKevin Hilman 456046465b7SKevin Hilman /* UART2 */ 457046465b7SKevin Hilman 458046465b7SKevin Hilman static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { 459046465b7SKevin Hilman { .irq = INT_24XX_UART2_IRQ, }, 460046465b7SKevin Hilman }; 461046465b7SKevin Hilman 462046465b7SKevin Hilman static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { 463046465b7SKevin Hilman { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, 464046465b7SKevin Hilman { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, 465046465b7SKevin Hilman }; 466046465b7SKevin Hilman 467046465b7SKevin Hilman static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = { 468046465b7SKevin Hilman &omap2_l4_core__uart2, 469046465b7SKevin Hilman }; 470046465b7SKevin Hilman 471046465b7SKevin Hilman static struct omap_hwmod omap2430_uart2_hwmod = { 472046465b7SKevin Hilman .name = "uart2", 473046465b7SKevin Hilman .mpu_irqs = uart2_mpu_irqs, 474046465b7SKevin Hilman .mpu_irqs_cnt = ARRAY_SIZE(uart2_mpu_irqs), 475046465b7SKevin Hilman .sdma_reqs = uart2_sdma_reqs, 476046465b7SKevin Hilman .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), 477046465b7SKevin Hilman .main_clk = "uart2_fck", 478046465b7SKevin Hilman .prcm = { 479046465b7SKevin Hilman .omap2 = { 480046465b7SKevin Hilman .module_offs = CORE_MOD, 481046465b7SKevin Hilman .prcm_reg_id = 1, 482046465b7SKevin Hilman .module_bit = OMAP24XX_EN_UART2_SHIFT, 483046465b7SKevin Hilman .idlest_reg_id = 1, 484046465b7SKevin Hilman .idlest_idle_bit = OMAP24XX_EN_UART2_SHIFT, 485046465b7SKevin Hilman }, 486046465b7SKevin Hilman }, 487046465b7SKevin Hilman .slaves = omap2430_uart2_slaves, 488046465b7SKevin Hilman .slaves_cnt = ARRAY_SIZE(omap2430_uart2_slaves), 489046465b7SKevin Hilman .class = &uart_class, 490046465b7SKevin Hilman .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 491046465b7SKevin Hilman }; 492046465b7SKevin Hilman 493046465b7SKevin Hilman /* UART3 */ 494046465b7SKevin Hilman 495046465b7SKevin Hilman static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { 496046465b7SKevin Hilman { .irq = INT_24XX_UART3_IRQ, }, 497046465b7SKevin Hilman }; 498046465b7SKevin Hilman 499046465b7SKevin Hilman static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { 500046465b7SKevin Hilman { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, 501046465b7SKevin Hilman { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, 502046465b7SKevin Hilman }; 503046465b7SKevin Hilman 504046465b7SKevin Hilman static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = { 505046465b7SKevin Hilman &omap2_l4_core__uart3, 506046465b7SKevin Hilman }; 507046465b7SKevin Hilman 508046465b7SKevin Hilman static struct omap_hwmod omap2430_uart3_hwmod = { 509046465b7SKevin Hilman .name = "uart3", 510046465b7SKevin Hilman .mpu_irqs = uart3_mpu_irqs, 511046465b7SKevin Hilman .mpu_irqs_cnt = ARRAY_SIZE(uart3_mpu_irqs), 512046465b7SKevin Hilman .sdma_reqs = uart3_sdma_reqs, 513046465b7SKevin Hilman .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), 514046465b7SKevin Hilman .main_clk = "uart3_fck", 515046465b7SKevin Hilman .prcm = { 516046465b7SKevin Hilman .omap2 = { 517046465b7SKevin Hilman .module_offs = CORE_MOD, 518046465b7SKevin Hilman .prcm_reg_id = 2, 519046465b7SKevin Hilman .module_bit = OMAP24XX_EN_UART3_SHIFT, 520046465b7SKevin Hilman .idlest_reg_id = 2, 521046465b7SKevin Hilman .idlest_idle_bit = OMAP24XX_EN_UART3_SHIFT, 522046465b7SKevin Hilman }, 523046465b7SKevin Hilman }, 524046465b7SKevin Hilman .slaves = omap2430_uart3_slaves, 525046465b7SKevin Hilman .slaves_cnt = ARRAY_SIZE(omap2430_uart3_slaves), 526046465b7SKevin Hilman .class = &uart_class, 527046465b7SKevin Hilman .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 528046465b7SKevin Hilman }; 529046465b7SKevin Hilman 5302004290fSPaul Walmsley /* I2C common */ 5312004290fSPaul Walmsley static struct omap_hwmod_class_sysconfig i2c_sysc = { 5322004290fSPaul Walmsley .rev_offs = 0x00, 5332004290fSPaul Walmsley .sysc_offs = 0x20, 5342004290fSPaul Walmsley .syss_offs = 0x10, 5352004290fSPaul Walmsley .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), 5362004290fSPaul Walmsley .sysc_fields = &omap_hwmod_sysc_type1, 5372004290fSPaul Walmsley }; 5382004290fSPaul Walmsley 5392004290fSPaul Walmsley static struct omap_hwmod_class i2c_class = { 5402004290fSPaul Walmsley .name = "i2c", 5412004290fSPaul Walmsley .sysc = &i2c_sysc, 5422004290fSPaul Walmsley }; 5432004290fSPaul Walmsley 54450ebb777SBenoit Cousson static struct omap_i2c_dev_attr i2c_dev_attr = { 5452004290fSPaul Walmsley .fifo_depth = 8, /* bytes */ 5462004290fSPaul Walmsley }; 5472004290fSPaul Walmsley 54850ebb777SBenoit Cousson /* I2C1 */ 54950ebb777SBenoit Cousson 5502004290fSPaul Walmsley static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { 5512004290fSPaul Walmsley { .irq = INT_24XX_I2C1_IRQ, }, 5522004290fSPaul Walmsley }; 5532004290fSPaul Walmsley 5542004290fSPaul Walmsley static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { 5552004290fSPaul Walmsley { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, 5562004290fSPaul Walmsley { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, 5572004290fSPaul Walmsley }; 5582004290fSPaul Walmsley 5592004290fSPaul Walmsley static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = { 5602004290fSPaul Walmsley &omap2430_l4_core__i2c1, 5612004290fSPaul Walmsley }; 5622004290fSPaul Walmsley 5632004290fSPaul Walmsley static struct omap_hwmod omap2430_i2c1_hwmod = { 5642004290fSPaul Walmsley .name = "i2c1", 5652004290fSPaul Walmsley .mpu_irqs = i2c1_mpu_irqs, 5662004290fSPaul Walmsley .mpu_irqs_cnt = ARRAY_SIZE(i2c1_mpu_irqs), 5672004290fSPaul Walmsley .sdma_reqs = i2c1_sdma_reqs, 5682004290fSPaul Walmsley .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), 5692004290fSPaul Walmsley .main_clk = "i2chs1_fck", 5702004290fSPaul Walmsley .prcm = { 5712004290fSPaul Walmsley .omap2 = { 5722004290fSPaul Walmsley /* 5732004290fSPaul Walmsley * NOTE: The CM_FCLKEN* and CM_ICLKEN* for 5742004290fSPaul Walmsley * I2CHS IP's do not follow the usual pattern. 5752004290fSPaul Walmsley * prcm_reg_id alone cannot be used to program 5762004290fSPaul Walmsley * the iclk and fclk. Needs to be handled using 5772004290fSPaul Walmsley * additonal flags when clk handling is moved 5782004290fSPaul Walmsley * to hwmod framework. 5792004290fSPaul Walmsley */ 5802004290fSPaul Walmsley .module_offs = CORE_MOD, 5812004290fSPaul Walmsley .prcm_reg_id = 1, 5822004290fSPaul Walmsley .module_bit = OMAP2430_EN_I2CHS1_SHIFT, 5832004290fSPaul Walmsley .idlest_reg_id = 1, 5842004290fSPaul Walmsley .idlest_idle_bit = OMAP2430_ST_I2CHS1_SHIFT, 5852004290fSPaul Walmsley }, 5862004290fSPaul Walmsley }, 5872004290fSPaul Walmsley .slaves = omap2430_i2c1_slaves, 5882004290fSPaul Walmsley .slaves_cnt = ARRAY_SIZE(omap2430_i2c1_slaves), 5892004290fSPaul Walmsley .class = &i2c_class, 59050ebb777SBenoit Cousson .dev_attr = &i2c_dev_attr, 5912004290fSPaul Walmsley .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 5922004290fSPaul Walmsley }; 5932004290fSPaul Walmsley 5942004290fSPaul Walmsley /* I2C2 */ 5952004290fSPaul Walmsley 5962004290fSPaul Walmsley static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { 5972004290fSPaul Walmsley { .irq = INT_24XX_I2C2_IRQ, }, 5982004290fSPaul Walmsley }; 5992004290fSPaul Walmsley 6002004290fSPaul Walmsley static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { 6012004290fSPaul Walmsley { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, 6022004290fSPaul Walmsley { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, 6032004290fSPaul Walmsley }; 6042004290fSPaul Walmsley 6052004290fSPaul Walmsley static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = { 6062004290fSPaul Walmsley &omap2430_l4_core__i2c2, 6072004290fSPaul Walmsley }; 6082004290fSPaul Walmsley 6092004290fSPaul Walmsley static struct omap_hwmod omap2430_i2c2_hwmod = { 6102004290fSPaul Walmsley .name = "i2c2", 6112004290fSPaul Walmsley .mpu_irqs = i2c2_mpu_irqs, 6122004290fSPaul Walmsley .mpu_irqs_cnt = ARRAY_SIZE(i2c2_mpu_irqs), 6132004290fSPaul Walmsley .sdma_reqs = i2c2_sdma_reqs, 6142004290fSPaul Walmsley .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), 6152004290fSPaul Walmsley .main_clk = "i2chs2_fck", 6162004290fSPaul Walmsley .prcm = { 6172004290fSPaul Walmsley .omap2 = { 6182004290fSPaul Walmsley .module_offs = CORE_MOD, 6192004290fSPaul Walmsley .prcm_reg_id = 1, 6202004290fSPaul Walmsley .module_bit = OMAP2430_EN_I2CHS2_SHIFT, 6212004290fSPaul Walmsley .idlest_reg_id = 1, 6222004290fSPaul Walmsley .idlest_idle_bit = OMAP2430_ST_I2CHS2_SHIFT, 6232004290fSPaul Walmsley }, 6242004290fSPaul Walmsley }, 6252004290fSPaul Walmsley .slaves = omap2430_i2c2_slaves, 6262004290fSPaul Walmsley .slaves_cnt = ARRAY_SIZE(omap2430_i2c2_slaves), 6272004290fSPaul Walmsley .class = &i2c_class, 62850ebb777SBenoit Cousson .dev_attr = &i2c_dev_attr, 6292004290fSPaul Walmsley .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 6302004290fSPaul Walmsley }; 6312004290fSPaul Walmsley 632aeac0e44SVaradarajan, Charulatha /* l4_wkup -> gpio1 */ 633aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_addr_space omap2430_gpio1_addr_space[] = { 634aeac0e44SVaradarajan, Charulatha { 635aeac0e44SVaradarajan, Charulatha .pa_start = 0x4900C000, 636aeac0e44SVaradarajan, Charulatha .pa_end = 0x4900C1ff, 637aeac0e44SVaradarajan, Charulatha .flags = ADDR_TYPE_RT 638aeac0e44SVaradarajan, Charulatha }, 639aeac0e44SVaradarajan, Charulatha }; 640aeac0e44SVaradarajan, Charulatha 641aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio1 = { 642aeac0e44SVaradarajan, Charulatha .master = &omap2430_l4_wkup_hwmod, 643aeac0e44SVaradarajan, Charulatha .slave = &omap2430_gpio1_hwmod, 644aeac0e44SVaradarajan, Charulatha .clk = "gpios_ick", 645aeac0e44SVaradarajan, Charulatha .addr = omap2430_gpio1_addr_space, 646aeac0e44SVaradarajan, Charulatha .addr_cnt = ARRAY_SIZE(omap2430_gpio1_addr_space), 647aeac0e44SVaradarajan, Charulatha .user = OCP_USER_MPU | OCP_USER_SDMA, 648aeac0e44SVaradarajan, Charulatha }; 649aeac0e44SVaradarajan, Charulatha 650aeac0e44SVaradarajan, Charulatha /* l4_wkup -> gpio2 */ 651aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_addr_space omap2430_gpio2_addr_space[] = { 652aeac0e44SVaradarajan, Charulatha { 653aeac0e44SVaradarajan, Charulatha .pa_start = 0x4900E000, 654aeac0e44SVaradarajan, Charulatha .pa_end = 0x4900E1ff, 655aeac0e44SVaradarajan, Charulatha .flags = ADDR_TYPE_RT 656aeac0e44SVaradarajan, Charulatha }, 657aeac0e44SVaradarajan, Charulatha }; 658aeac0e44SVaradarajan, Charulatha 659aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio2 = { 660aeac0e44SVaradarajan, Charulatha .master = &omap2430_l4_wkup_hwmod, 661aeac0e44SVaradarajan, Charulatha .slave = &omap2430_gpio2_hwmod, 662aeac0e44SVaradarajan, Charulatha .clk = "gpios_ick", 663aeac0e44SVaradarajan, Charulatha .addr = omap2430_gpio2_addr_space, 664aeac0e44SVaradarajan, Charulatha .addr_cnt = ARRAY_SIZE(omap2430_gpio2_addr_space), 665aeac0e44SVaradarajan, Charulatha .user = OCP_USER_MPU | OCP_USER_SDMA, 666aeac0e44SVaradarajan, Charulatha }; 667aeac0e44SVaradarajan, Charulatha 668aeac0e44SVaradarajan, Charulatha /* l4_wkup -> gpio3 */ 669aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_addr_space omap2430_gpio3_addr_space[] = { 670aeac0e44SVaradarajan, Charulatha { 671aeac0e44SVaradarajan, Charulatha .pa_start = 0x49010000, 672aeac0e44SVaradarajan, Charulatha .pa_end = 0x490101ff, 673aeac0e44SVaradarajan, Charulatha .flags = ADDR_TYPE_RT 674aeac0e44SVaradarajan, Charulatha }, 675aeac0e44SVaradarajan, Charulatha }; 676aeac0e44SVaradarajan, Charulatha 677aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio3 = { 678aeac0e44SVaradarajan, Charulatha .master = &omap2430_l4_wkup_hwmod, 679aeac0e44SVaradarajan, Charulatha .slave = &omap2430_gpio3_hwmod, 680aeac0e44SVaradarajan, Charulatha .clk = "gpios_ick", 681aeac0e44SVaradarajan, Charulatha .addr = omap2430_gpio3_addr_space, 682aeac0e44SVaradarajan, Charulatha .addr_cnt = ARRAY_SIZE(omap2430_gpio3_addr_space), 683aeac0e44SVaradarajan, Charulatha .user = OCP_USER_MPU | OCP_USER_SDMA, 684aeac0e44SVaradarajan, Charulatha }; 685aeac0e44SVaradarajan, Charulatha 686aeac0e44SVaradarajan, Charulatha /* l4_wkup -> gpio4 */ 687aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_addr_space omap2430_gpio4_addr_space[] = { 688aeac0e44SVaradarajan, Charulatha { 689aeac0e44SVaradarajan, Charulatha .pa_start = 0x49012000, 690aeac0e44SVaradarajan, Charulatha .pa_end = 0x490121ff, 691aeac0e44SVaradarajan, Charulatha .flags = ADDR_TYPE_RT 692aeac0e44SVaradarajan, Charulatha }, 693aeac0e44SVaradarajan, Charulatha }; 694aeac0e44SVaradarajan, Charulatha 695aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio4 = { 696aeac0e44SVaradarajan, Charulatha .master = &omap2430_l4_wkup_hwmod, 697aeac0e44SVaradarajan, Charulatha .slave = &omap2430_gpio4_hwmod, 698aeac0e44SVaradarajan, Charulatha .clk = "gpios_ick", 699aeac0e44SVaradarajan, Charulatha .addr = omap2430_gpio4_addr_space, 700aeac0e44SVaradarajan, Charulatha .addr_cnt = ARRAY_SIZE(omap2430_gpio4_addr_space), 701aeac0e44SVaradarajan, Charulatha .user = OCP_USER_MPU | OCP_USER_SDMA, 702aeac0e44SVaradarajan, Charulatha }; 703aeac0e44SVaradarajan, Charulatha 704aeac0e44SVaradarajan, Charulatha /* l4_core -> gpio5 */ 705aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_addr_space omap2430_gpio5_addr_space[] = { 706aeac0e44SVaradarajan, Charulatha { 707aeac0e44SVaradarajan, Charulatha .pa_start = 0x480B6000, 708aeac0e44SVaradarajan, Charulatha .pa_end = 0x480B61ff, 709aeac0e44SVaradarajan, Charulatha .flags = ADDR_TYPE_RT 710aeac0e44SVaradarajan, Charulatha }, 711aeac0e44SVaradarajan, Charulatha }; 712aeac0e44SVaradarajan, Charulatha 713aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_ocp_if omap2430_l4_core__gpio5 = { 714aeac0e44SVaradarajan, Charulatha .master = &omap2430_l4_core_hwmod, 715aeac0e44SVaradarajan, Charulatha .slave = &omap2430_gpio5_hwmod, 716aeac0e44SVaradarajan, Charulatha .clk = "gpio5_ick", 717aeac0e44SVaradarajan, Charulatha .addr = omap2430_gpio5_addr_space, 718aeac0e44SVaradarajan, Charulatha .addr_cnt = ARRAY_SIZE(omap2430_gpio5_addr_space), 719aeac0e44SVaradarajan, Charulatha .user = OCP_USER_MPU | OCP_USER_SDMA, 720aeac0e44SVaradarajan, Charulatha }; 721aeac0e44SVaradarajan, Charulatha 722aeac0e44SVaradarajan, Charulatha /* gpio dev_attr */ 723aeac0e44SVaradarajan, Charulatha static struct omap_gpio_dev_attr gpio_dev_attr = { 724aeac0e44SVaradarajan, Charulatha .bank_width = 32, 725aeac0e44SVaradarajan, Charulatha .dbck_flag = false, 726aeac0e44SVaradarajan, Charulatha }; 727aeac0e44SVaradarajan, Charulatha 728aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_class_sysconfig omap243x_gpio_sysc = { 729aeac0e44SVaradarajan, Charulatha .rev_offs = 0x0000, 730aeac0e44SVaradarajan, Charulatha .sysc_offs = 0x0010, 731aeac0e44SVaradarajan, Charulatha .syss_offs = 0x0014, 732aeac0e44SVaradarajan, Charulatha .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE | 733aeac0e44SVaradarajan, Charulatha SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), 734aeac0e44SVaradarajan, Charulatha .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), 735aeac0e44SVaradarajan, Charulatha .sysc_fields = &omap_hwmod_sysc_type1, 736aeac0e44SVaradarajan, Charulatha }; 737aeac0e44SVaradarajan, Charulatha 738aeac0e44SVaradarajan, Charulatha /* 739aeac0e44SVaradarajan, Charulatha * 'gpio' class 740aeac0e44SVaradarajan, Charulatha * general purpose io module 741aeac0e44SVaradarajan, Charulatha */ 742aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_class omap243x_gpio_hwmod_class = { 743aeac0e44SVaradarajan, Charulatha .name = "gpio", 744aeac0e44SVaradarajan, Charulatha .sysc = &omap243x_gpio_sysc, 745aeac0e44SVaradarajan, Charulatha .rev = 0, 746aeac0e44SVaradarajan, Charulatha }; 747aeac0e44SVaradarajan, Charulatha 748aeac0e44SVaradarajan, Charulatha /* gpio1 */ 749aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_irq_info omap243x_gpio1_irqs[] = { 750aeac0e44SVaradarajan, Charulatha { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */ 751aeac0e44SVaradarajan, Charulatha }; 752aeac0e44SVaradarajan, Charulatha 753aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = { 754aeac0e44SVaradarajan, Charulatha &omap2430_l4_wkup__gpio1, 755aeac0e44SVaradarajan, Charulatha }; 756aeac0e44SVaradarajan, Charulatha 757aeac0e44SVaradarajan, Charulatha static struct omap_hwmod omap2430_gpio1_hwmod = { 758aeac0e44SVaradarajan, Charulatha .name = "gpio1", 759aeac0e44SVaradarajan, Charulatha .mpu_irqs = omap243x_gpio1_irqs, 760aeac0e44SVaradarajan, Charulatha .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio1_irqs), 761aeac0e44SVaradarajan, Charulatha .main_clk = "gpios_fck", 762aeac0e44SVaradarajan, Charulatha .prcm = { 763aeac0e44SVaradarajan, Charulatha .omap2 = { 764aeac0e44SVaradarajan, Charulatha .prcm_reg_id = 1, 765aeac0e44SVaradarajan, Charulatha .module_bit = OMAP24XX_EN_GPIOS_SHIFT, 766aeac0e44SVaradarajan, Charulatha .module_offs = WKUP_MOD, 767aeac0e44SVaradarajan, Charulatha .idlest_reg_id = 1, 768aeac0e44SVaradarajan, Charulatha .idlest_idle_bit = OMAP24XX_EN_GPIOS_SHIFT, 769aeac0e44SVaradarajan, Charulatha }, 770aeac0e44SVaradarajan, Charulatha }, 771aeac0e44SVaradarajan, Charulatha .slaves = omap2430_gpio1_slaves, 772aeac0e44SVaradarajan, Charulatha .slaves_cnt = ARRAY_SIZE(omap2430_gpio1_slaves), 773aeac0e44SVaradarajan, Charulatha .class = &omap243x_gpio_hwmod_class, 774aeac0e44SVaradarajan, Charulatha .dev_attr = &gpio_dev_attr, 775aeac0e44SVaradarajan, Charulatha .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 776aeac0e44SVaradarajan, Charulatha }; 777aeac0e44SVaradarajan, Charulatha 778aeac0e44SVaradarajan, Charulatha /* gpio2 */ 779aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_irq_info omap243x_gpio2_irqs[] = { 780aeac0e44SVaradarajan, Charulatha { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */ 781aeac0e44SVaradarajan, Charulatha }; 782aeac0e44SVaradarajan, Charulatha 783aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_ocp_if *omap2430_gpio2_slaves[] = { 784aeac0e44SVaradarajan, Charulatha &omap2430_l4_wkup__gpio2, 785aeac0e44SVaradarajan, Charulatha }; 786aeac0e44SVaradarajan, Charulatha 787aeac0e44SVaradarajan, Charulatha static struct omap_hwmod omap2430_gpio2_hwmod = { 788aeac0e44SVaradarajan, Charulatha .name = "gpio2", 789aeac0e44SVaradarajan, Charulatha .mpu_irqs = omap243x_gpio2_irqs, 790aeac0e44SVaradarajan, Charulatha .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio2_irqs), 791aeac0e44SVaradarajan, Charulatha .main_clk = "gpios_fck", 792aeac0e44SVaradarajan, Charulatha .prcm = { 793aeac0e44SVaradarajan, Charulatha .omap2 = { 794aeac0e44SVaradarajan, Charulatha .prcm_reg_id = 1, 795aeac0e44SVaradarajan, Charulatha .module_bit = OMAP24XX_EN_GPIOS_SHIFT, 796aeac0e44SVaradarajan, Charulatha .module_offs = WKUP_MOD, 797aeac0e44SVaradarajan, Charulatha .idlest_reg_id = 1, 798aeac0e44SVaradarajan, Charulatha .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT, 799aeac0e44SVaradarajan, Charulatha }, 800aeac0e44SVaradarajan, Charulatha }, 801aeac0e44SVaradarajan, Charulatha .slaves = omap2430_gpio2_slaves, 802aeac0e44SVaradarajan, Charulatha .slaves_cnt = ARRAY_SIZE(omap2430_gpio2_slaves), 803aeac0e44SVaradarajan, Charulatha .class = &omap243x_gpio_hwmod_class, 804aeac0e44SVaradarajan, Charulatha .dev_attr = &gpio_dev_attr, 805aeac0e44SVaradarajan, Charulatha .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 806aeac0e44SVaradarajan, Charulatha }; 807aeac0e44SVaradarajan, Charulatha 808aeac0e44SVaradarajan, Charulatha /* gpio3 */ 809aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_irq_info omap243x_gpio3_irqs[] = { 810aeac0e44SVaradarajan, Charulatha { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */ 811aeac0e44SVaradarajan, Charulatha }; 812aeac0e44SVaradarajan, Charulatha 813aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_ocp_if *omap2430_gpio3_slaves[] = { 814aeac0e44SVaradarajan, Charulatha &omap2430_l4_wkup__gpio3, 815aeac0e44SVaradarajan, Charulatha }; 816aeac0e44SVaradarajan, Charulatha 817aeac0e44SVaradarajan, Charulatha static struct omap_hwmod omap2430_gpio3_hwmod = { 818aeac0e44SVaradarajan, Charulatha .name = "gpio3", 819aeac0e44SVaradarajan, Charulatha .mpu_irqs = omap243x_gpio3_irqs, 820aeac0e44SVaradarajan, Charulatha .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio3_irqs), 821aeac0e44SVaradarajan, Charulatha .main_clk = "gpios_fck", 822aeac0e44SVaradarajan, Charulatha .prcm = { 823aeac0e44SVaradarajan, Charulatha .omap2 = { 824aeac0e44SVaradarajan, Charulatha .prcm_reg_id = 1, 825aeac0e44SVaradarajan, Charulatha .module_bit = OMAP24XX_EN_GPIOS_SHIFT, 826aeac0e44SVaradarajan, Charulatha .module_offs = WKUP_MOD, 827aeac0e44SVaradarajan, Charulatha .idlest_reg_id = 1, 828aeac0e44SVaradarajan, Charulatha .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT, 829aeac0e44SVaradarajan, Charulatha }, 830aeac0e44SVaradarajan, Charulatha }, 831aeac0e44SVaradarajan, Charulatha .slaves = omap2430_gpio3_slaves, 832aeac0e44SVaradarajan, Charulatha .slaves_cnt = ARRAY_SIZE(omap2430_gpio3_slaves), 833aeac0e44SVaradarajan, Charulatha .class = &omap243x_gpio_hwmod_class, 834aeac0e44SVaradarajan, Charulatha .dev_attr = &gpio_dev_attr, 835aeac0e44SVaradarajan, Charulatha .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 836aeac0e44SVaradarajan, Charulatha }; 837aeac0e44SVaradarajan, Charulatha 838aeac0e44SVaradarajan, Charulatha /* gpio4 */ 839aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_irq_info omap243x_gpio4_irqs[] = { 840aeac0e44SVaradarajan, Charulatha { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */ 841aeac0e44SVaradarajan, Charulatha }; 842aeac0e44SVaradarajan, Charulatha 843aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_ocp_if *omap2430_gpio4_slaves[] = { 844aeac0e44SVaradarajan, Charulatha &omap2430_l4_wkup__gpio4, 845aeac0e44SVaradarajan, Charulatha }; 846aeac0e44SVaradarajan, Charulatha 847aeac0e44SVaradarajan, Charulatha static struct omap_hwmod omap2430_gpio4_hwmod = { 848aeac0e44SVaradarajan, Charulatha .name = "gpio4", 849aeac0e44SVaradarajan, Charulatha .mpu_irqs = omap243x_gpio4_irqs, 850aeac0e44SVaradarajan, Charulatha .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio4_irqs), 851aeac0e44SVaradarajan, Charulatha .main_clk = "gpios_fck", 852aeac0e44SVaradarajan, Charulatha .prcm = { 853aeac0e44SVaradarajan, Charulatha .omap2 = { 854aeac0e44SVaradarajan, Charulatha .prcm_reg_id = 1, 855aeac0e44SVaradarajan, Charulatha .module_bit = OMAP24XX_EN_GPIOS_SHIFT, 856aeac0e44SVaradarajan, Charulatha .module_offs = WKUP_MOD, 857aeac0e44SVaradarajan, Charulatha .idlest_reg_id = 1, 858aeac0e44SVaradarajan, Charulatha .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT, 859aeac0e44SVaradarajan, Charulatha }, 860aeac0e44SVaradarajan, Charulatha }, 861aeac0e44SVaradarajan, Charulatha .slaves = omap2430_gpio4_slaves, 862aeac0e44SVaradarajan, Charulatha .slaves_cnt = ARRAY_SIZE(omap2430_gpio4_slaves), 863aeac0e44SVaradarajan, Charulatha .class = &omap243x_gpio_hwmod_class, 864aeac0e44SVaradarajan, Charulatha .dev_attr = &gpio_dev_attr, 865aeac0e44SVaradarajan, Charulatha .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 866aeac0e44SVaradarajan, Charulatha }; 867aeac0e44SVaradarajan, Charulatha 868aeac0e44SVaradarajan, Charulatha /* gpio5 */ 869aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_irq_info omap243x_gpio5_irqs[] = { 870aeac0e44SVaradarajan, Charulatha { .irq = 33 }, /* INT_24XX_GPIO_BANK5 */ 871aeac0e44SVaradarajan, Charulatha }; 872aeac0e44SVaradarajan, Charulatha 873aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_ocp_if *omap2430_gpio5_slaves[] = { 874aeac0e44SVaradarajan, Charulatha &omap2430_l4_core__gpio5, 875aeac0e44SVaradarajan, Charulatha }; 876aeac0e44SVaradarajan, Charulatha 877aeac0e44SVaradarajan, Charulatha static struct omap_hwmod omap2430_gpio5_hwmod = { 878aeac0e44SVaradarajan, Charulatha .name = "gpio5", 879aeac0e44SVaradarajan, Charulatha .mpu_irqs = omap243x_gpio5_irqs, 880aeac0e44SVaradarajan, Charulatha .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio5_irqs), 881aeac0e44SVaradarajan, Charulatha .main_clk = "gpio5_fck", 882aeac0e44SVaradarajan, Charulatha .prcm = { 883aeac0e44SVaradarajan, Charulatha .omap2 = { 884aeac0e44SVaradarajan, Charulatha .prcm_reg_id = 2, 885aeac0e44SVaradarajan, Charulatha .module_bit = OMAP2430_EN_GPIO5_SHIFT, 886aeac0e44SVaradarajan, Charulatha .module_offs = CORE_MOD, 887aeac0e44SVaradarajan, Charulatha .idlest_reg_id = 2, 888aeac0e44SVaradarajan, Charulatha .idlest_idle_bit = OMAP2430_ST_GPIO5_SHIFT, 889aeac0e44SVaradarajan, Charulatha }, 890aeac0e44SVaradarajan, Charulatha }, 891aeac0e44SVaradarajan, Charulatha .slaves = omap2430_gpio5_slaves, 892aeac0e44SVaradarajan, Charulatha .slaves_cnt = ARRAY_SIZE(omap2430_gpio5_slaves), 893aeac0e44SVaradarajan, Charulatha .class = &omap243x_gpio_hwmod_class, 894aeac0e44SVaradarajan, Charulatha .dev_attr = &gpio_dev_attr, 895aeac0e44SVaradarajan, Charulatha .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 896aeac0e44SVaradarajan, Charulatha }; 897aeac0e44SVaradarajan, Charulatha 89882cbd1aeSG, Manjunath Kondaiah /* dma_system */ 89982cbd1aeSG, Manjunath Kondaiah static struct omap_hwmod_class_sysconfig omap2430_dma_sysc = { 90082cbd1aeSG, Manjunath Kondaiah .rev_offs = 0x0000, 90182cbd1aeSG, Manjunath Kondaiah .sysc_offs = 0x002c, 90282cbd1aeSG, Manjunath Kondaiah .syss_offs = 0x0028, 90382cbd1aeSG, Manjunath Kondaiah .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE | 90482cbd1aeSG, Manjunath Kondaiah SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE | 90582cbd1aeSG, Manjunath Kondaiah SYSC_HAS_AUTOIDLE), 90682cbd1aeSG, Manjunath Kondaiah .idlemodes = (MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), 90782cbd1aeSG, Manjunath Kondaiah .sysc_fields = &omap_hwmod_sysc_type1, 90882cbd1aeSG, Manjunath Kondaiah }; 90982cbd1aeSG, Manjunath Kondaiah 91082cbd1aeSG, Manjunath Kondaiah static struct omap_hwmod_class omap2430_dma_hwmod_class = { 91182cbd1aeSG, Manjunath Kondaiah .name = "dma", 91282cbd1aeSG, Manjunath Kondaiah .sysc = &omap2430_dma_sysc, 91382cbd1aeSG, Manjunath Kondaiah }; 91482cbd1aeSG, Manjunath Kondaiah 91582cbd1aeSG, Manjunath Kondaiah /* dma attributes */ 91682cbd1aeSG, Manjunath Kondaiah static struct omap_dma_dev_attr dma_dev_attr = { 91782cbd1aeSG, Manjunath Kondaiah .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY | 91882cbd1aeSG, Manjunath Kondaiah IS_CSSA_32 | IS_CDSA_32 | IS_RW_PRIORITY, 91982cbd1aeSG, Manjunath Kondaiah .lch_count = 32, 92082cbd1aeSG, Manjunath Kondaiah }; 92182cbd1aeSG, Manjunath Kondaiah 92282cbd1aeSG, Manjunath Kondaiah static struct omap_hwmod_irq_info omap2430_dma_system_irqs[] = { 92382cbd1aeSG, Manjunath Kondaiah { .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */ 92482cbd1aeSG, Manjunath Kondaiah { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ 92582cbd1aeSG, Manjunath Kondaiah { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ 92682cbd1aeSG, Manjunath Kondaiah { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ 92782cbd1aeSG, Manjunath Kondaiah }; 92882cbd1aeSG, Manjunath Kondaiah 92982cbd1aeSG, Manjunath Kondaiah static struct omap_hwmod_addr_space omap2430_dma_system_addrs[] = { 93082cbd1aeSG, Manjunath Kondaiah { 93182cbd1aeSG, Manjunath Kondaiah .pa_start = 0x48056000, 93282cbd1aeSG, Manjunath Kondaiah .pa_end = 0x4a0560ff, 93382cbd1aeSG, Manjunath Kondaiah .flags = ADDR_TYPE_RT 93482cbd1aeSG, Manjunath Kondaiah }, 93582cbd1aeSG, Manjunath Kondaiah }; 93682cbd1aeSG, Manjunath Kondaiah 93782cbd1aeSG, Manjunath Kondaiah /* dma_system -> L3 */ 93882cbd1aeSG, Manjunath Kondaiah static struct omap_hwmod_ocp_if omap2430_dma_system__l3 = { 93982cbd1aeSG, Manjunath Kondaiah .master = &omap2430_dma_system_hwmod, 94082cbd1aeSG, Manjunath Kondaiah .slave = &omap2430_l3_main_hwmod, 94182cbd1aeSG, Manjunath Kondaiah .clk = "core_l3_ck", 94282cbd1aeSG, Manjunath Kondaiah .user = OCP_USER_MPU | OCP_USER_SDMA, 94382cbd1aeSG, Manjunath Kondaiah }; 94482cbd1aeSG, Manjunath Kondaiah 94582cbd1aeSG, Manjunath Kondaiah /* dma_system master ports */ 94682cbd1aeSG, Manjunath Kondaiah static struct omap_hwmod_ocp_if *omap2430_dma_system_masters[] = { 94782cbd1aeSG, Manjunath Kondaiah &omap2430_dma_system__l3, 94882cbd1aeSG, Manjunath Kondaiah }; 94982cbd1aeSG, Manjunath Kondaiah 95082cbd1aeSG, Manjunath Kondaiah /* l4_core -> dma_system */ 95182cbd1aeSG, Manjunath Kondaiah static struct omap_hwmod_ocp_if omap2430_l4_core__dma_system = { 95282cbd1aeSG, Manjunath Kondaiah .master = &omap2430_l4_core_hwmod, 95382cbd1aeSG, Manjunath Kondaiah .slave = &omap2430_dma_system_hwmod, 95482cbd1aeSG, Manjunath Kondaiah .clk = "sdma_ick", 95582cbd1aeSG, Manjunath Kondaiah .addr = omap2430_dma_system_addrs, 95682cbd1aeSG, Manjunath Kondaiah .addr_cnt = ARRAY_SIZE(omap2430_dma_system_addrs), 95782cbd1aeSG, Manjunath Kondaiah .user = OCP_USER_MPU | OCP_USER_SDMA, 95882cbd1aeSG, Manjunath Kondaiah }; 95982cbd1aeSG, Manjunath Kondaiah 96082cbd1aeSG, Manjunath Kondaiah /* dma_system slave ports */ 96182cbd1aeSG, Manjunath Kondaiah static struct omap_hwmod_ocp_if *omap2430_dma_system_slaves[] = { 96282cbd1aeSG, Manjunath Kondaiah &omap2430_l4_core__dma_system, 96382cbd1aeSG, Manjunath Kondaiah }; 96482cbd1aeSG, Manjunath Kondaiah 96582cbd1aeSG, Manjunath Kondaiah static struct omap_hwmod omap2430_dma_system_hwmod = { 96682cbd1aeSG, Manjunath Kondaiah .name = "dma", 96782cbd1aeSG, Manjunath Kondaiah .class = &omap2430_dma_hwmod_class, 96882cbd1aeSG, Manjunath Kondaiah .mpu_irqs = omap2430_dma_system_irqs, 96982cbd1aeSG, Manjunath Kondaiah .mpu_irqs_cnt = ARRAY_SIZE(omap2430_dma_system_irqs), 97082cbd1aeSG, Manjunath Kondaiah .main_clk = "core_l3_ck", 97182cbd1aeSG, Manjunath Kondaiah .slaves = omap2430_dma_system_slaves, 97282cbd1aeSG, Manjunath Kondaiah .slaves_cnt = ARRAY_SIZE(omap2430_dma_system_slaves), 97382cbd1aeSG, Manjunath Kondaiah .masters = omap2430_dma_system_masters, 97482cbd1aeSG, Manjunath Kondaiah .masters_cnt = ARRAY_SIZE(omap2430_dma_system_masters), 97582cbd1aeSG, Manjunath Kondaiah .dev_attr = &dma_dev_attr, 97682cbd1aeSG, Manjunath Kondaiah .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 97782cbd1aeSG, Manjunath Kondaiah .flags = HWMOD_NO_IDLEST, 97882cbd1aeSG, Manjunath Kondaiah }; 97982cbd1aeSG, Manjunath Kondaiah 9807f904c78SCharulatha V /* 9817f904c78SCharulatha V * 'mcspi' class 9827f904c78SCharulatha V * multichannel serial port interface (mcspi) / master/slave synchronous serial 9837f904c78SCharulatha V * bus 9847f904c78SCharulatha V */ 9857f904c78SCharulatha V 9867f904c78SCharulatha V static struct omap_hwmod_class_sysconfig omap2430_mcspi_sysc = { 9877f904c78SCharulatha V .rev_offs = 0x0000, 9887f904c78SCharulatha V .sysc_offs = 0x0010, 9897f904c78SCharulatha V .syss_offs = 0x0014, 9907f904c78SCharulatha V .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | 9917f904c78SCharulatha V SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | 9927f904c78SCharulatha V SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), 9937f904c78SCharulatha V .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), 9947f904c78SCharulatha V .sysc_fields = &omap_hwmod_sysc_type1, 9957f904c78SCharulatha V }; 9967f904c78SCharulatha V 9977f904c78SCharulatha V static struct omap_hwmod_class omap2430_mcspi_class = { 9987f904c78SCharulatha V .name = "mcspi", 9997f904c78SCharulatha V .sysc = &omap2430_mcspi_sysc, 10007f904c78SCharulatha V .rev = OMAP2_MCSPI_REV, 10017f904c78SCharulatha V }; 10027f904c78SCharulatha V 10037f904c78SCharulatha V /* mcspi1 */ 10047f904c78SCharulatha V static struct omap_hwmod_irq_info omap2430_mcspi1_mpu_irqs[] = { 10057f904c78SCharulatha V { .irq = 65 }, 10067f904c78SCharulatha V }; 10077f904c78SCharulatha V 10087f904c78SCharulatha V static struct omap_hwmod_dma_info omap2430_mcspi1_sdma_reqs[] = { 10097f904c78SCharulatha V { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ 10107f904c78SCharulatha V { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ 10117f904c78SCharulatha V { .name = "tx1", .dma_req = 37 }, /* DMA_SPI1_TX1 */ 10127f904c78SCharulatha V { .name = "rx1", .dma_req = 38 }, /* DMA_SPI1_RX1 */ 10137f904c78SCharulatha V { .name = "tx2", .dma_req = 39 }, /* DMA_SPI1_TX2 */ 10147f904c78SCharulatha V { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ 10157f904c78SCharulatha V { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ 10167f904c78SCharulatha V { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ 10177f904c78SCharulatha V }; 10187f904c78SCharulatha V 10197f904c78SCharulatha V static struct omap_hwmod_ocp_if *omap2430_mcspi1_slaves[] = { 10207f904c78SCharulatha V &omap2430_l4_core__mcspi1, 10217f904c78SCharulatha V }; 10227f904c78SCharulatha V 10237f904c78SCharulatha V static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { 10247f904c78SCharulatha V .num_chipselect = 4, 10257f904c78SCharulatha V }; 10267f904c78SCharulatha V 10277f904c78SCharulatha V static struct omap_hwmod omap2430_mcspi1_hwmod = { 10287f904c78SCharulatha V .name = "mcspi1_hwmod", 10297f904c78SCharulatha V .mpu_irqs = omap2430_mcspi1_mpu_irqs, 10307f904c78SCharulatha V .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcspi1_mpu_irqs), 10317f904c78SCharulatha V .sdma_reqs = omap2430_mcspi1_sdma_reqs, 10327f904c78SCharulatha V .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi1_sdma_reqs), 10337f904c78SCharulatha V .main_clk = "mcspi1_fck", 10347f904c78SCharulatha V .prcm = { 10357f904c78SCharulatha V .omap2 = { 10367f904c78SCharulatha V .module_offs = CORE_MOD, 10377f904c78SCharulatha V .prcm_reg_id = 1, 10387f904c78SCharulatha V .module_bit = OMAP24XX_EN_MCSPI1_SHIFT, 10397f904c78SCharulatha V .idlest_reg_id = 1, 10407f904c78SCharulatha V .idlest_idle_bit = OMAP24XX_ST_MCSPI1_SHIFT, 10417f904c78SCharulatha V }, 10427f904c78SCharulatha V }, 10437f904c78SCharulatha V .slaves = omap2430_mcspi1_slaves, 10447f904c78SCharulatha V .slaves_cnt = ARRAY_SIZE(omap2430_mcspi1_slaves), 10457f904c78SCharulatha V .class = &omap2430_mcspi_class, 10467f904c78SCharulatha V .dev_attr = &omap_mcspi1_dev_attr, 10477f904c78SCharulatha V .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 10487f904c78SCharulatha V }; 10497f904c78SCharulatha V 10507f904c78SCharulatha V /* mcspi2 */ 10517f904c78SCharulatha V static struct omap_hwmod_irq_info omap2430_mcspi2_mpu_irqs[] = { 10527f904c78SCharulatha V { .irq = 66 }, 10537f904c78SCharulatha V }; 10547f904c78SCharulatha V 10557f904c78SCharulatha V static struct omap_hwmod_dma_info omap2430_mcspi2_sdma_reqs[] = { 10567f904c78SCharulatha V { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ 10577f904c78SCharulatha V { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ 10587f904c78SCharulatha V { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ 10597f904c78SCharulatha V { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ 10607f904c78SCharulatha V }; 10617f904c78SCharulatha V 10627f904c78SCharulatha V static struct omap_hwmod_ocp_if *omap2430_mcspi2_slaves[] = { 10637f904c78SCharulatha V &omap2430_l4_core__mcspi2, 10647f904c78SCharulatha V }; 10657f904c78SCharulatha V 10667f904c78SCharulatha V static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { 10677f904c78SCharulatha V .num_chipselect = 2, 10687f904c78SCharulatha V }; 10697f904c78SCharulatha V 10707f904c78SCharulatha V static struct omap_hwmod omap2430_mcspi2_hwmod = { 10717f904c78SCharulatha V .name = "mcspi2_hwmod", 10727f904c78SCharulatha V .mpu_irqs = omap2430_mcspi2_mpu_irqs, 10737f904c78SCharulatha V .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcspi2_mpu_irqs), 10747f904c78SCharulatha V .sdma_reqs = omap2430_mcspi2_sdma_reqs, 10757f904c78SCharulatha V .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi2_sdma_reqs), 10767f904c78SCharulatha V .main_clk = "mcspi2_fck", 10777f904c78SCharulatha V .prcm = { 10787f904c78SCharulatha V .omap2 = { 10797f904c78SCharulatha V .module_offs = CORE_MOD, 10807f904c78SCharulatha V .prcm_reg_id = 1, 10817f904c78SCharulatha V .module_bit = OMAP24XX_EN_MCSPI2_SHIFT, 10827f904c78SCharulatha V .idlest_reg_id = 1, 10837f904c78SCharulatha V .idlest_idle_bit = OMAP24XX_ST_MCSPI2_SHIFT, 10847f904c78SCharulatha V }, 10857f904c78SCharulatha V }, 10867f904c78SCharulatha V .slaves = omap2430_mcspi2_slaves, 10877f904c78SCharulatha V .slaves_cnt = ARRAY_SIZE(omap2430_mcspi2_slaves), 10887f904c78SCharulatha V .class = &omap2430_mcspi_class, 10897f904c78SCharulatha V .dev_attr = &omap_mcspi2_dev_attr, 10907f904c78SCharulatha V .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 10917f904c78SCharulatha V }; 10927f904c78SCharulatha V 10937f904c78SCharulatha V /* mcspi3 */ 10947f904c78SCharulatha V static struct omap_hwmod_irq_info omap2430_mcspi3_mpu_irqs[] = { 10957f904c78SCharulatha V { .irq = 91 }, 10967f904c78SCharulatha V }; 10977f904c78SCharulatha V 10987f904c78SCharulatha V static struct omap_hwmod_dma_info omap2430_mcspi3_sdma_reqs[] = { 10997f904c78SCharulatha V { .name = "tx0", .dma_req = 15 }, /* DMA_SPI3_TX0 */ 11007f904c78SCharulatha V { .name = "rx0", .dma_req = 16 }, /* DMA_SPI3_RX0 */ 11017f904c78SCharulatha V { .name = "tx1", .dma_req = 23 }, /* DMA_SPI3_TX1 */ 11027f904c78SCharulatha V { .name = "rx1", .dma_req = 24 }, /* DMA_SPI3_RX1 */ 11037f904c78SCharulatha V }; 11047f904c78SCharulatha V 11057f904c78SCharulatha V static struct omap_hwmod_ocp_if *omap2430_mcspi3_slaves[] = { 11067f904c78SCharulatha V &omap2430_l4_core__mcspi3, 11077f904c78SCharulatha V }; 11087f904c78SCharulatha V 11097f904c78SCharulatha V static struct omap2_mcspi_dev_attr omap_mcspi3_dev_attr = { 11107f904c78SCharulatha V .num_chipselect = 2, 11117f904c78SCharulatha V }; 11127f904c78SCharulatha V 11137f904c78SCharulatha V static struct omap_hwmod omap2430_mcspi3_hwmod = { 11147f904c78SCharulatha V .name = "mcspi3_hwmod", 11157f904c78SCharulatha V .mpu_irqs = omap2430_mcspi3_mpu_irqs, 11167f904c78SCharulatha V .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcspi3_mpu_irqs), 11177f904c78SCharulatha V .sdma_reqs = omap2430_mcspi3_sdma_reqs, 11187f904c78SCharulatha V .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi3_sdma_reqs), 11197f904c78SCharulatha V .main_clk = "mcspi3_fck", 11207f904c78SCharulatha V .prcm = { 11217f904c78SCharulatha V .omap2 = { 11227f904c78SCharulatha V .module_offs = CORE_MOD, 11237f904c78SCharulatha V .prcm_reg_id = 2, 11247f904c78SCharulatha V .module_bit = OMAP2430_EN_MCSPI3_SHIFT, 11257f904c78SCharulatha V .idlest_reg_id = 2, 11267f904c78SCharulatha V .idlest_idle_bit = OMAP2430_ST_MCSPI3_SHIFT, 11277f904c78SCharulatha V }, 11287f904c78SCharulatha V }, 11297f904c78SCharulatha V .slaves = omap2430_mcspi3_slaves, 11307f904c78SCharulatha V .slaves_cnt = ARRAY_SIZE(omap2430_mcspi3_slaves), 11317f904c78SCharulatha V .class = &omap2430_mcspi_class, 11327f904c78SCharulatha V .dev_attr = &omap_mcspi3_dev_attr, 11337f904c78SCharulatha V .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 11347f904c78SCharulatha V }; 11357f904c78SCharulatha V 11367359154eSPaul Walmsley static __initdata struct omap_hwmod *omap2430_hwmods[] = { 11374a7cf90aSKevin Hilman &omap2430_l3_main_hwmod, 11387359154eSPaul Walmsley &omap2430_l4_core_hwmod, 11397359154eSPaul Walmsley &omap2430_l4_wkup_hwmod, 11407359154eSPaul Walmsley &omap2430_mpu_hwmod, 114108072acfSPaul Walmsley &omap2430_iva_hwmod, 1142165e2161SVaradarajan, Charulatha &omap2430_wd_timer2_hwmod, 1143046465b7SKevin Hilman &omap2430_uart1_hwmod, 1144046465b7SKevin Hilman &omap2430_uart2_hwmod, 1145046465b7SKevin Hilman &omap2430_uart3_hwmod, 11462004290fSPaul Walmsley &omap2430_i2c1_hwmod, 11472004290fSPaul Walmsley &omap2430_i2c2_hwmod, 1148aeac0e44SVaradarajan, Charulatha 1149aeac0e44SVaradarajan, Charulatha /* gpio class */ 1150aeac0e44SVaradarajan, Charulatha &omap2430_gpio1_hwmod, 1151aeac0e44SVaradarajan, Charulatha &omap2430_gpio2_hwmod, 1152aeac0e44SVaradarajan, Charulatha &omap2430_gpio3_hwmod, 1153aeac0e44SVaradarajan, Charulatha &omap2430_gpio4_hwmod, 1154aeac0e44SVaradarajan, Charulatha &omap2430_gpio5_hwmod, 115582cbd1aeSG, Manjunath Kondaiah 115682cbd1aeSG, Manjunath Kondaiah /* dma_system class*/ 115782cbd1aeSG, Manjunath Kondaiah &omap2430_dma_system_hwmod, 11587f904c78SCharulatha V 11597f904c78SCharulatha V /* mcspi class */ 11607f904c78SCharulatha V &omap2430_mcspi1_hwmod, 11617f904c78SCharulatha V &omap2430_mcspi2_hwmod, 11627f904c78SCharulatha V &omap2430_mcspi3_hwmod, 11637359154eSPaul Walmsley NULL, 11647359154eSPaul Walmsley }; 11657359154eSPaul Walmsley 11667359154eSPaul Walmsley int __init omap2430_hwmod_init(void) 11677359154eSPaul Walmsley { 11687359154eSPaul Walmsley return omap_hwmod_init(omap2430_hwmods); 11697359154eSPaul Walmsley } 1170