17359154eSPaul Walmsley /* 27359154eSPaul Walmsley * omap_hwmod_2430_data.c - hardware modules present on the OMAP2430 chips 37359154eSPaul Walmsley * 478183f3fSPaul Walmsley * Copyright (C) 2009-2011 Nokia Corporation 50a78c5c5SPaul Walmsley * Copyright (C) 2012 Texas Instruments, Inc. 67359154eSPaul Walmsley * Paul Walmsley 77359154eSPaul Walmsley * 87359154eSPaul Walmsley * This program is free software; you can redistribute it and/or modify 97359154eSPaul Walmsley * it under the terms of the GNU General Public License version 2 as 107359154eSPaul Walmsley * published by the Free Software Foundation. 117359154eSPaul Walmsley * 127359154eSPaul Walmsley * XXX handle crossbar/shared link difference for L3? 137359154eSPaul Walmsley * XXX these should be marked initdata for multi-OMAP kernels 147359154eSPaul Walmsley */ 153a8761c0STony Lindgren 1679fc540fSWolfram Sang #include <linux/platform_data/i2c-omap.h> 1755143438SAndreas Fenkart #include <linux/platform_data/hsmmc-omap.h> 1845c3eb7dSTony Lindgren #include <linux/omap-dma.h> 192a296c8fSTony Lindgren 202a296c8fSTony Lindgren #include "omap_hwmod.h" 211e0f51a9STony Lindgren #include "l3_2xxx.h" 227359154eSPaul Walmsley 23dbc04161STony Lindgren #include "soc.h" 2443b40992SPaul Walmsley #include "omap_hwmod_common_data.h" 257359154eSPaul Walmsley #include "prm-regbits-24xx.h" 26165e2161SVaradarajan, Charulatha #include "cm-regbits-24xx.h" 273a8761c0STony Lindgren #include "i2c.h" 28ff2516fbSPaul Walmsley #include "wd_timer.h" 297359154eSPaul Walmsley 307359154eSPaul Walmsley /* 317359154eSPaul Walmsley * OMAP2430 hardware module integration data 327359154eSPaul Walmsley * 33844a3b63SPaul Walmsley * All of the data in this section should be autogeneratable from the 347359154eSPaul Walmsley * TI hardware database or other technical documentation. Data that 357359154eSPaul Walmsley * is driver-specific or driver-kernel integration-specific belongs 367359154eSPaul Walmsley * elsewhere. 377359154eSPaul Walmsley */ 387359154eSPaul Walmsley 39844a3b63SPaul Walmsley /* 40844a3b63SPaul Walmsley * IP blocks 41844a3b63SPaul Walmsley */ 42de56dbb6SSenthilvadivu Guruswamy 43844a3b63SPaul Walmsley /* IVA2 (IVA2) */ 443af35fbcSPaul Walmsley static struct omap_hwmod_rst_info omap2430_iva_resets[] = { 453af35fbcSPaul Walmsley { .name = "logic", .rst_shift = 0 }, 463af35fbcSPaul Walmsley { .name = "mmu", .rst_shift = 1 }, 473af35fbcSPaul Walmsley }; 483af35fbcSPaul Walmsley 4908072acfSPaul Walmsley static struct omap_hwmod omap2430_iva_hwmod = { 5008072acfSPaul Walmsley .name = "iva", 5108072acfSPaul Walmsley .class = &iva_hwmod_class, 523af35fbcSPaul Walmsley .clkdm_name = "dsp_clkdm", 533af35fbcSPaul Walmsley .rst_lines = omap2430_iva_resets, 543af35fbcSPaul Walmsley .rst_lines_cnt = ARRAY_SIZE(omap2430_iva_resets), 553af35fbcSPaul Walmsley .main_clk = "dsp_fck", 5608072acfSPaul Walmsley }; 5708072acfSPaul Walmsley 582004290fSPaul Walmsley /* I2C common */ 592004290fSPaul Walmsley static struct omap_hwmod_class_sysconfig i2c_sysc = { 602004290fSPaul Walmsley .rev_offs = 0x00, 612004290fSPaul Walmsley .sysc_offs = 0x20, 622004290fSPaul Walmsley .syss_offs = 0x10, 63d73d65faSAvinash.H.M .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | 64d73d65faSAvinash.H.M SYSS_HAS_RESET_STATUS), 652004290fSPaul Walmsley .sysc_fields = &omap_hwmod_sysc_type1, 662004290fSPaul Walmsley }; 672004290fSPaul Walmsley 682004290fSPaul Walmsley static struct omap_hwmod_class i2c_class = { 692004290fSPaul Walmsley .name = "i2c", 702004290fSPaul Walmsley .sysc = &i2c_sysc, 71db791a75SAndy Green .rev = OMAP_I2C_IP_VERSION_1, 726d3c55fdSAvinash.H.M .reset = &omap_i2c_reset, 732004290fSPaul Walmsley }; 742004290fSPaul Walmsley 7550ebb777SBenoit Cousson /* I2C1 */ 762004290fSPaul Walmsley static struct omap_hwmod omap2430_i2c1_hwmod = { 772004290fSPaul Walmsley .name = "i2c1", 783e600522SAndy Green .flags = HWMOD_16BIT_REG, 792004290fSPaul Walmsley .main_clk = "i2chs1_fck", 802004290fSPaul Walmsley .prcm = { 812004290fSPaul Walmsley .omap2 = { 822004290fSPaul Walmsley /* 832004290fSPaul Walmsley * NOTE: The CM_FCLKEN* and CM_ICLKEN* for 842004290fSPaul Walmsley * I2CHS IP's do not follow the usual pattern. 852004290fSPaul Walmsley * prcm_reg_id alone cannot be used to program 862004290fSPaul Walmsley * the iclk and fclk. Needs to be handled using 8725985edcSLucas De Marchi * additional flags when clk handling is moved 882004290fSPaul Walmsley * to hwmod framework. 892004290fSPaul Walmsley */ 902004290fSPaul Walmsley .module_offs = CORE_MOD, 912004290fSPaul Walmsley .idlest_reg_id = 1, 922004290fSPaul Walmsley .idlest_idle_bit = OMAP2430_ST_I2CHS1_SHIFT, 932004290fSPaul Walmsley }, 942004290fSPaul Walmsley }, 952004290fSPaul Walmsley .class = &i2c_class, 962004290fSPaul Walmsley }; 972004290fSPaul Walmsley 982004290fSPaul Walmsley /* I2C2 */ 992004290fSPaul Walmsley static struct omap_hwmod omap2430_i2c2_hwmod = { 1002004290fSPaul Walmsley .name = "i2c2", 1013e600522SAndy Green .flags = HWMOD_16BIT_REG, 1022004290fSPaul Walmsley .main_clk = "i2chs2_fck", 1032004290fSPaul Walmsley .prcm = { 1042004290fSPaul Walmsley .omap2 = { 1052004290fSPaul Walmsley .module_offs = CORE_MOD, 1062004290fSPaul Walmsley .idlest_reg_id = 1, 1072004290fSPaul Walmsley .idlest_idle_bit = OMAP2430_ST_I2CHS2_SHIFT, 1082004290fSPaul Walmsley }, 1092004290fSPaul Walmsley }, 1102004290fSPaul Walmsley .class = &i2c_class, 1112004290fSPaul Walmsley }; 1122004290fSPaul Walmsley 113aeac0e44SVaradarajan, Charulatha /* gpio5 */ 114aeac0e44SVaradarajan, Charulatha static struct omap_hwmod omap2430_gpio5_hwmod = { 115aeac0e44SVaradarajan, Charulatha .name = "gpio5", 116f95440caSAvinash.H.M .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 117aeac0e44SVaradarajan, Charulatha .main_clk = "gpio5_fck", 118aeac0e44SVaradarajan, Charulatha .prcm = { 119aeac0e44SVaradarajan, Charulatha .omap2 = { 120aeac0e44SVaradarajan, Charulatha .module_offs = CORE_MOD, 121aeac0e44SVaradarajan, Charulatha .idlest_reg_id = 2, 122aeac0e44SVaradarajan, Charulatha .idlest_idle_bit = OMAP2430_ST_GPIO5_SHIFT, 123aeac0e44SVaradarajan, Charulatha }, 124aeac0e44SVaradarajan, Charulatha }, 125273b9465SPaul Walmsley .class = &omap2xxx_gpio_hwmod_class, 126aeac0e44SVaradarajan, Charulatha }; 127aeac0e44SVaradarajan, Charulatha 12882cbd1aeSG, Manjunath Kondaiah /* dma attributes */ 12982cbd1aeSG, Manjunath Kondaiah static struct omap_dma_dev_attr dma_dev_attr = { 13082cbd1aeSG, Manjunath Kondaiah .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY | 13182cbd1aeSG, Manjunath Kondaiah IS_CSSA_32 | IS_CDSA_32 | IS_RW_PRIORITY, 13282cbd1aeSG, Manjunath Kondaiah .lch_count = 32, 13382cbd1aeSG, Manjunath Kondaiah }; 13482cbd1aeSG, Manjunath Kondaiah 13582cbd1aeSG, Manjunath Kondaiah static struct omap_hwmod omap2430_dma_system_hwmod = { 13682cbd1aeSG, Manjunath Kondaiah .name = "dma", 137273b9465SPaul Walmsley .class = &omap2xxx_dma_hwmod_class, 13882cbd1aeSG, Manjunath Kondaiah .main_clk = "core_l3_ck", 13982cbd1aeSG, Manjunath Kondaiah .dev_attr = &dma_dev_attr, 14082cbd1aeSG, Manjunath Kondaiah .flags = HWMOD_NO_IDLEST, 14182cbd1aeSG, Manjunath Kondaiah }; 14282cbd1aeSG, Manjunath Kondaiah 143fca1ab55SOmar Ramirez Luna /* mailbox */ 144fca1ab55SOmar Ramirez Luna static struct omap_hwmod omap2430_mailbox_hwmod = { 145fca1ab55SOmar Ramirez Luna .name = "mailbox", 146273b9465SPaul Walmsley .class = &omap2xxx_mailbox_hwmod_class, 147fca1ab55SOmar Ramirez Luna .main_clk = "mailboxes_ick", 148fca1ab55SOmar Ramirez Luna .prcm = { 149fca1ab55SOmar Ramirez Luna .omap2 = { 150fca1ab55SOmar Ramirez Luna .module_offs = CORE_MOD, 151fca1ab55SOmar Ramirez Luna .idlest_reg_id = 1, 152fca1ab55SOmar Ramirez Luna .idlest_idle_bit = OMAP24XX_ST_MAILBOXES_SHIFT, 153fca1ab55SOmar Ramirez Luna }, 154fca1ab55SOmar Ramirez Luna }, 155fca1ab55SOmar Ramirez Luna }; 156fca1ab55SOmar Ramirez Luna 1577f904c78SCharulatha V /* mcspi3 */ 1587f904c78SCharulatha V static struct omap_hwmod omap2430_mcspi3_hwmod = { 159bec93811SPaul Walmsley .name = "mcspi3", 1607f904c78SCharulatha V .main_clk = "mcspi3_fck", 1617f904c78SCharulatha V .prcm = { 1627f904c78SCharulatha V .omap2 = { 1637f904c78SCharulatha V .module_offs = CORE_MOD, 1647f904c78SCharulatha V .idlest_reg_id = 2, 1657f904c78SCharulatha V .idlest_idle_bit = OMAP2430_ST_MCSPI3_SHIFT, 1667f904c78SCharulatha V }, 1677f904c78SCharulatha V }, 168273b9465SPaul Walmsley .class = &omap2xxx_mcspi_class, 1697f904c78SCharulatha V }; 1707f904c78SCharulatha V 171844a3b63SPaul Walmsley /* usbhsotg */ 17244d02acfSHema HK static struct omap_hwmod_class_sysconfig omap2430_usbhsotg_sysc = { 17344d02acfSHema HK .rev_offs = 0x0400, 17444d02acfSHema HK .sysc_offs = 0x0404, 17544d02acfSHema HK .syss_offs = 0x0408, 17644d02acfSHema HK .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE| 17744d02acfSHema HK SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | 17844d02acfSHema HK SYSC_HAS_AUTOIDLE), 17944d02acfSHema HK .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | 18044d02acfSHema HK MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), 18144d02acfSHema HK .sysc_fields = &omap_hwmod_sysc_type1, 18244d02acfSHema HK }; 18344d02acfSHema HK 18444d02acfSHema HK static struct omap_hwmod_class usbotg_class = { 18544d02acfSHema HK .name = "usbotg", 18644d02acfSHema HK .sysc = &omap2430_usbhsotg_sysc, 18744d02acfSHema HK }; 18844d02acfSHema HK 18944d02acfSHema HK /* usb_otg_hs */ 19044d02acfSHema HK static struct omap_hwmod omap2430_usbhsotg_hwmod = { 19144d02acfSHema HK .name = "usb_otg_hs", 19244d02acfSHema HK .main_clk = "usbhs_ick", 19344d02acfSHema HK .prcm = { 19444d02acfSHema HK .omap2 = { 19544d02acfSHema HK .module_offs = CORE_MOD, 19644d02acfSHema HK .idlest_reg_id = 1, 19744d02acfSHema HK .idlest_idle_bit = OMAP2430_ST_USBHS_SHIFT, 19844d02acfSHema HK }, 19944d02acfSHema HK }, 20044d02acfSHema HK .class = &usbotg_class, 20144d02acfSHema HK /* 20244d02acfSHema HK * Erratum ID: i479 idle_req / idle_ack mechanism potentially 20344d02acfSHema HK * broken when autoidle is enabled 20444d02acfSHema HK * workaround is to disable the autoidle bit at module level. 20544d02acfSHema HK */ 20644d02acfSHema HK .flags = HWMOD_NO_OCP_AUTOIDLE | HWMOD_SWSUP_SIDLE 20744d02acfSHema HK | HWMOD_SWSUP_MSTANDBY, 20844d02acfSHema HK }; 20944d02acfSHema HK 21037801b3dSCharulatha V /* 21137801b3dSCharulatha V * 'mcbsp' class 21237801b3dSCharulatha V * multi channel buffered serial port controller 21337801b3dSCharulatha V */ 21404aa67deSTony Lindgren 21537801b3dSCharulatha V static struct omap_hwmod_class_sysconfig omap2430_mcbsp_sysc = { 21637801b3dSCharulatha V .rev_offs = 0x007C, 21737801b3dSCharulatha V .sysc_offs = 0x008C, 21837801b3dSCharulatha V .sysc_flags = (SYSC_HAS_SOFTRESET), 21937801b3dSCharulatha V .sysc_fields = &omap_hwmod_sysc_type1, 22037801b3dSCharulatha V }; 22137801b3dSCharulatha V 22237801b3dSCharulatha V static struct omap_hwmod_class omap2430_mcbsp_hwmod_class = { 22337801b3dSCharulatha V .name = "mcbsp", 22437801b3dSCharulatha V .sysc = &omap2430_mcbsp_sysc, 22537801b3dSCharulatha V }; 22637801b3dSCharulatha V 227db382a86SPeter Ujfalusi static struct omap_hwmod_opt_clk mcbsp_opt_clks[] = { 228db382a86SPeter Ujfalusi { .role = "pad_fck", .clk = "mcbsp_clks" }, 229db382a86SPeter Ujfalusi { .role = "prcm_fck", .clk = "func_96m_ck" }, 230db382a86SPeter Ujfalusi }; 231db382a86SPeter Ujfalusi 23237801b3dSCharulatha V /* mcbsp1 */ 23337801b3dSCharulatha V static struct omap_hwmod omap2430_mcbsp1_hwmod = { 23437801b3dSCharulatha V .name = "mcbsp1", 23537801b3dSCharulatha V .class = &omap2430_mcbsp_hwmod_class, 23637801b3dSCharulatha V .main_clk = "mcbsp1_fck", 23737801b3dSCharulatha V .prcm = { 23837801b3dSCharulatha V .omap2 = { 23937801b3dSCharulatha V .module_offs = CORE_MOD, 24037801b3dSCharulatha V .idlest_reg_id = 1, 24137801b3dSCharulatha V .idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT, 24237801b3dSCharulatha V }, 24337801b3dSCharulatha V }, 244db382a86SPeter Ujfalusi .opt_clks = mcbsp_opt_clks, 245db382a86SPeter Ujfalusi .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks), 24637801b3dSCharulatha V }; 24737801b3dSCharulatha V 24837801b3dSCharulatha V /* mcbsp2 */ 24937801b3dSCharulatha V static struct omap_hwmod omap2430_mcbsp2_hwmod = { 25037801b3dSCharulatha V .name = "mcbsp2", 25137801b3dSCharulatha V .class = &omap2430_mcbsp_hwmod_class, 25237801b3dSCharulatha V .main_clk = "mcbsp2_fck", 25337801b3dSCharulatha V .prcm = { 25437801b3dSCharulatha V .omap2 = { 25537801b3dSCharulatha V .module_offs = CORE_MOD, 25637801b3dSCharulatha V .idlest_reg_id = 1, 25737801b3dSCharulatha V .idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT, 25837801b3dSCharulatha V }, 25937801b3dSCharulatha V }, 260db382a86SPeter Ujfalusi .opt_clks = mcbsp_opt_clks, 261db382a86SPeter Ujfalusi .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks), 26237801b3dSCharulatha V }; 26337801b3dSCharulatha V 26437801b3dSCharulatha V /* mcbsp3 */ 26537801b3dSCharulatha V static struct omap_hwmod omap2430_mcbsp3_hwmod = { 26637801b3dSCharulatha V .name = "mcbsp3", 26737801b3dSCharulatha V .class = &omap2430_mcbsp_hwmod_class, 26837801b3dSCharulatha V .main_clk = "mcbsp3_fck", 26937801b3dSCharulatha V .prcm = { 27037801b3dSCharulatha V .omap2 = { 27137801b3dSCharulatha V .module_offs = CORE_MOD, 27237801b3dSCharulatha V .idlest_reg_id = 2, 27337801b3dSCharulatha V .idlest_idle_bit = OMAP2430_ST_MCBSP3_SHIFT, 27437801b3dSCharulatha V }, 27537801b3dSCharulatha V }, 276db382a86SPeter Ujfalusi .opt_clks = mcbsp_opt_clks, 277db382a86SPeter Ujfalusi .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks), 27837801b3dSCharulatha V }; 27937801b3dSCharulatha V 28037801b3dSCharulatha V /* mcbsp4 */ 28137801b3dSCharulatha V static struct omap_hwmod omap2430_mcbsp4_hwmod = { 28237801b3dSCharulatha V .name = "mcbsp4", 28337801b3dSCharulatha V .class = &omap2430_mcbsp_hwmod_class, 28437801b3dSCharulatha V .main_clk = "mcbsp4_fck", 28537801b3dSCharulatha V .prcm = { 28637801b3dSCharulatha V .omap2 = { 28737801b3dSCharulatha V .module_offs = CORE_MOD, 28837801b3dSCharulatha V .idlest_reg_id = 2, 28937801b3dSCharulatha V .idlest_idle_bit = OMAP2430_ST_MCBSP4_SHIFT, 29037801b3dSCharulatha V }, 29137801b3dSCharulatha V }, 292db382a86SPeter Ujfalusi .opt_clks = mcbsp_opt_clks, 293db382a86SPeter Ujfalusi .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks), 29437801b3dSCharulatha V }; 29537801b3dSCharulatha V 29637801b3dSCharulatha V /* mcbsp5 */ 29737801b3dSCharulatha V static struct omap_hwmod omap2430_mcbsp5_hwmod = { 29837801b3dSCharulatha V .name = "mcbsp5", 29937801b3dSCharulatha V .class = &omap2430_mcbsp_hwmod_class, 30037801b3dSCharulatha V .main_clk = "mcbsp5_fck", 30137801b3dSCharulatha V .prcm = { 30237801b3dSCharulatha V .omap2 = { 30337801b3dSCharulatha V .module_offs = CORE_MOD, 30437801b3dSCharulatha V .idlest_reg_id = 2, 30537801b3dSCharulatha V .idlest_idle_bit = OMAP2430_ST_MCBSP5_SHIFT, 30637801b3dSCharulatha V }, 30737801b3dSCharulatha V }, 308db382a86SPeter Ujfalusi .opt_clks = mcbsp_opt_clks, 309db382a86SPeter Ujfalusi .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks), 31037801b3dSCharulatha V }; 31104aa67deSTony Lindgren 312bce06f37SPaul Walmsley /* MMC/SD/SDIO common */ 313bce06f37SPaul Walmsley static struct omap_hwmod_class_sysconfig omap2430_mmc_sysc = { 314bce06f37SPaul Walmsley .rev_offs = 0x1fc, 315bce06f37SPaul Walmsley .sysc_offs = 0x10, 316bce06f37SPaul Walmsley .syss_offs = 0x14, 317bce06f37SPaul Walmsley .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | 318bce06f37SPaul Walmsley SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | 319bce06f37SPaul Walmsley SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), 320bce06f37SPaul Walmsley .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), 321bce06f37SPaul Walmsley .sysc_fields = &omap_hwmod_sysc_type1, 322bce06f37SPaul Walmsley }; 323bce06f37SPaul Walmsley 324bce06f37SPaul Walmsley static struct omap_hwmod_class omap2430_mmc_class = { 325bce06f37SPaul Walmsley .name = "mmc", 326bce06f37SPaul Walmsley .sysc = &omap2430_mmc_sysc, 327bce06f37SPaul Walmsley }; 328bce06f37SPaul Walmsley 329bce06f37SPaul Walmsley /* MMC/SD/SDIO1 */ 330bce06f37SPaul Walmsley static struct omap_hwmod_opt_clk omap2430_mmc1_opt_clks[] = { 331bce06f37SPaul Walmsley { .role = "dbck", .clk = "mmchsdb1_fck" }, 332bce06f37SPaul Walmsley }; 333bce06f37SPaul Walmsley 33455143438SAndreas Fenkart static struct omap_hsmmc_dev_attr mmc1_dev_attr = { 3356ab8946fSKishore Kadiyala .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT, 3366ab8946fSKishore Kadiyala }; 3376ab8946fSKishore Kadiyala 338bce06f37SPaul Walmsley static struct omap_hwmod omap2430_mmc1_hwmod = { 339bce06f37SPaul Walmsley .name = "mmc1", 340bce06f37SPaul Walmsley .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 341bce06f37SPaul Walmsley .opt_clks = omap2430_mmc1_opt_clks, 342bce06f37SPaul Walmsley .opt_clks_cnt = ARRAY_SIZE(omap2430_mmc1_opt_clks), 343bce06f37SPaul Walmsley .main_clk = "mmchs1_fck", 344bce06f37SPaul Walmsley .prcm = { 345bce06f37SPaul Walmsley .omap2 = { 346bce06f37SPaul Walmsley .module_offs = CORE_MOD, 347bce06f37SPaul Walmsley .idlest_reg_id = 2, 348bce06f37SPaul Walmsley .idlest_idle_bit = OMAP2430_ST_MMCHS1_SHIFT, 349bce06f37SPaul Walmsley }, 350bce06f37SPaul Walmsley }, 3516ab8946fSKishore Kadiyala .dev_attr = &mmc1_dev_attr, 352bce06f37SPaul Walmsley .class = &omap2430_mmc_class, 353bce06f37SPaul Walmsley }; 354bce06f37SPaul Walmsley 355bce06f37SPaul Walmsley /* MMC/SD/SDIO2 */ 356bce06f37SPaul Walmsley static struct omap_hwmod_opt_clk omap2430_mmc2_opt_clks[] = { 357bce06f37SPaul Walmsley { .role = "dbck", .clk = "mmchsdb2_fck" }, 358bce06f37SPaul Walmsley }; 359bce06f37SPaul Walmsley 360bce06f37SPaul Walmsley static struct omap_hwmod omap2430_mmc2_hwmod = { 361bce06f37SPaul Walmsley .name = "mmc2", 362bce06f37SPaul Walmsley .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 363bce06f37SPaul Walmsley .opt_clks = omap2430_mmc2_opt_clks, 364bce06f37SPaul Walmsley .opt_clks_cnt = ARRAY_SIZE(omap2430_mmc2_opt_clks), 365bce06f37SPaul Walmsley .main_clk = "mmchs2_fck", 366bce06f37SPaul Walmsley .prcm = { 367bce06f37SPaul Walmsley .omap2 = { 368bce06f37SPaul Walmsley .module_offs = CORE_MOD, 369bce06f37SPaul Walmsley .idlest_reg_id = 2, 370bce06f37SPaul Walmsley .idlest_idle_bit = OMAP2430_ST_MMCHS2_SHIFT, 371bce06f37SPaul Walmsley }, 372bce06f37SPaul Walmsley }, 373bce06f37SPaul Walmsley .class = &omap2430_mmc_class, 374bce06f37SPaul Walmsley }; 375046465b7SKevin Hilman 376f32bd778SPaul Walmsley /* HDQ1W/1-wire */ 377f32bd778SPaul Walmsley static struct omap_hwmod omap2430_hdq1w_hwmod = { 378f32bd778SPaul Walmsley .name = "hdq1w", 379f32bd778SPaul Walmsley .main_clk = "hdq_fck", 380f32bd778SPaul Walmsley .prcm = { 381f32bd778SPaul Walmsley .omap2 = { 382f32bd778SPaul Walmsley .module_offs = CORE_MOD, 383f32bd778SPaul Walmsley .idlest_reg_id = 1, 384f32bd778SPaul Walmsley .idlest_idle_bit = OMAP24XX_ST_HDQ_SHIFT, 385f32bd778SPaul Walmsley }, 386f32bd778SPaul Walmsley }, 387f32bd778SPaul Walmsley .class = &omap2_hdq1w_class, 388f32bd778SPaul Walmsley }; 389f32bd778SPaul Walmsley 390844a3b63SPaul Walmsley /* 391844a3b63SPaul Walmsley * interfaces 392844a3b63SPaul Walmsley */ 393844a3b63SPaul Walmsley 394844a3b63SPaul Walmsley /* L3 -> L4_CORE interface */ 395844a3b63SPaul Walmsley /* l3_core -> usbhsotg interface */ 396844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_usbhsotg__l3 = { 397844a3b63SPaul Walmsley .master = &omap2430_usbhsotg_hwmod, 398cb48427eSPaul Walmsley .slave = &omap2xxx_l3_main_hwmod, 399844a3b63SPaul Walmsley .clk = "core_l3_ck", 400844a3b63SPaul Walmsley .user = OCP_USER_MPU, 401844a3b63SPaul Walmsley }; 402844a3b63SPaul Walmsley 403844a3b63SPaul Walmsley /* L4 CORE -> I2C1 interface */ 404844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__i2c1 = { 405cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 406844a3b63SPaul Walmsley .slave = &omap2430_i2c1_hwmod, 407844a3b63SPaul Walmsley .clk = "i2c1_ick", 408844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 409844a3b63SPaul Walmsley }; 410844a3b63SPaul Walmsley 411844a3b63SPaul Walmsley /* L4 CORE -> I2C2 interface */ 412844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__i2c2 = { 413cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 414844a3b63SPaul Walmsley .slave = &omap2430_i2c2_hwmod, 415844a3b63SPaul Walmsley .clk = "i2c2_ick", 416844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 417844a3b63SPaul Walmsley }; 418844a3b63SPaul Walmsley 419844a3b63SPaul Walmsley /* l4_core ->usbhsotg interface */ 420844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__usbhsotg = { 421cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 422844a3b63SPaul Walmsley .slave = &omap2430_usbhsotg_hwmod, 423844a3b63SPaul Walmsley .clk = "usb_l4_ick", 424844a3b63SPaul Walmsley .user = OCP_USER_MPU, 425844a3b63SPaul Walmsley }; 426844a3b63SPaul Walmsley 427844a3b63SPaul Walmsley /* L4 CORE -> MMC1 interface */ 428844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__mmc1 = { 429cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 430844a3b63SPaul Walmsley .slave = &omap2430_mmc1_hwmod, 431844a3b63SPaul Walmsley .clk = "mmchs1_ick", 432844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 433844a3b63SPaul Walmsley }; 434844a3b63SPaul Walmsley 435844a3b63SPaul Walmsley /* L4 CORE -> MMC2 interface */ 436844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__mmc2 = { 437cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 438844a3b63SPaul Walmsley .slave = &omap2430_mmc2_hwmod, 439844a3b63SPaul Walmsley .clk = "mmchs2_ick", 440844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 441844a3b63SPaul Walmsley }; 442844a3b63SPaul Walmsley 443844a3b63SPaul Walmsley /* l4 core -> mcspi3 interface */ 444844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi3 = { 445cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 446844a3b63SPaul Walmsley .slave = &omap2430_mcspi3_hwmod, 447844a3b63SPaul Walmsley .clk = "mcspi3_ick", 448844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 449844a3b63SPaul Walmsley }; 450844a3b63SPaul Walmsley 451844a3b63SPaul Walmsley /* IVA2 <- L3 interface */ 452844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l3__iva = { 453cb48427eSPaul Walmsley .master = &omap2xxx_l3_main_hwmod, 454844a3b63SPaul Walmsley .slave = &omap2430_iva_hwmod, 4553af35fbcSPaul Walmsley .clk = "core_l3_ck", 456844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 457844a3b63SPaul Walmsley }; 458844a3b63SPaul Walmsley 459844a3b63SPaul Walmsley /* l4_wkup -> timer1 */ 460844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_wkup__timer1 = { 461cb48427eSPaul Walmsley .master = &omap2xxx_l4_wkup_hwmod, 462cb48427eSPaul Walmsley .slave = &omap2xxx_timer1_hwmod, 463844a3b63SPaul Walmsley .clk = "gpt1_ick", 464844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 465844a3b63SPaul Walmsley }; 466844a3b63SPaul Walmsley 467844a3b63SPaul Walmsley /* l4_wkup -> wd_timer2 */ 468844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = { 469cb48427eSPaul Walmsley .master = &omap2xxx_l4_wkup_hwmod, 470cb48427eSPaul Walmsley .slave = &omap2xxx_wd_timer2_hwmod, 471844a3b63SPaul Walmsley .clk = "mpu_wdt_ick", 472844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 473844a3b63SPaul Walmsley }; 474844a3b63SPaul Walmsley 475844a3b63SPaul Walmsley /* l4_wkup -> gpio1 */ 476844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio1 = { 477cb48427eSPaul Walmsley .master = &omap2xxx_l4_wkup_hwmod, 478cb48427eSPaul Walmsley .slave = &omap2xxx_gpio1_hwmod, 479844a3b63SPaul Walmsley .clk = "gpios_ick", 480844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 481844a3b63SPaul Walmsley }; 482844a3b63SPaul Walmsley 483844a3b63SPaul Walmsley /* l4_wkup -> gpio2 */ 484844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio2 = { 485cb48427eSPaul Walmsley .master = &omap2xxx_l4_wkup_hwmod, 486cb48427eSPaul Walmsley .slave = &omap2xxx_gpio2_hwmod, 487844a3b63SPaul Walmsley .clk = "gpios_ick", 488844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 489844a3b63SPaul Walmsley }; 490844a3b63SPaul Walmsley 491844a3b63SPaul Walmsley /* l4_wkup -> gpio3 */ 492844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio3 = { 493cb48427eSPaul Walmsley .master = &omap2xxx_l4_wkup_hwmod, 494cb48427eSPaul Walmsley .slave = &omap2xxx_gpio3_hwmod, 495844a3b63SPaul Walmsley .clk = "gpios_ick", 496844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 497844a3b63SPaul Walmsley }; 498844a3b63SPaul Walmsley 499844a3b63SPaul Walmsley /* l4_wkup -> gpio4 */ 500844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio4 = { 501cb48427eSPaul Walmsley .master = &omap2xxx_l4_wkup_hwmod, 502cb48427eSPaul Walmsley .slave = &omap2xxx_gpio4_hwmod, 503844a3b63SPaul Walmsley .clk = "gpios_ick", 504844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 505844a3b63SPaul Walmsley }; 506844a3b63SPaul Walmsley 507844a3b63SPaul Walmsley /* l4_core -> gpio5 */ 508844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__gpio5 = { 509cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 510844a3b63SPaul Walmsley .slave = &omap2430_gpio5_hwmod, 511844a3b63SPaul Walmsley .clk = "gpio5_ick", 512844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 513844a3b63SPaul Walmsley }; 514844a3b63SPaul Walmsley 515844a3b63SPaul Walmsley /* dma_system -> L3 */ 516844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_dma_system__l3 = { 517844a3b63SPaul Walmsley .master = &omap2430_dma_system_hwmod, 518cb48427eSPaul Walmsley .slave = &omap2xxx_l3_main_hwmod, 519844a3b63SPaul Walmsley .clk = "core_l3_ck", 520844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 521844a3b63SPaul Walmsley }; 522844a3b63SPaul Walmsley 523844a3b63SPaul Walmsley /* l4_core -> dma_system */ 524844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__dma_system = { 525cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 526844a3b63SPaul Walmsley .slave = &omap2430_dma_system_hwmod, 527844a3b63SPaul Walmsley .clk = "sdma_ick", 528844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 529844a3b63SPaul Walmsley }; 530844a3b63SPaul Walmsley 531844a3b63SPaul Walmsley /* l4_core -> mailbox */ 532844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__mailbox = { 533cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 534844a3b63SPaul Walmsley .slave = &omap2430_mailbox_hwmod, 535844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 536844a3b63SPaul Walmsley }; 537844a3b63SPaul Walmsley 538844a3b63SPaul Walmsley /* l4_core -> mcbsp1 */ 539844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp1 = { 540cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 541844a3b63SPaul Walmsley .slave = &omap2430_mcbsp1_hwmod, 542844a3b63SPaul Walmsley .clk = "mcbsp1_ick", 543844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 544844a3b63SPaul Walmsley }; 545844a3b63SPaul Walmsley 546844a3b63SPaul Walmsley /* l4_core -> mcbsp2 */ 547844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp2 = { 548cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 549844a3b63SPaul Walmsley .slave = &omap2430_mcbsp2_hwmod, 550844a3b63SPaul Walmsley .clk = "mcbsp2_ick", 551844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 552844a3b63SPaul Walmsley }; 553844a3b63SPaul Walmsley 554844a3b63SPaul Walmsley /* l4_core -> mcbsp3 */ 555844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp3 = { 556cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 557844a3b63SPaul Walmsley .slave = &omap2430_mcbsp3_hwmod, 558844a3b63SPaul Walmsley .clk = "mcbsp3_ick", 559844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 560844a3b63SPaul Walmsley }; 561844a3b63SPaul Walmsley 562844a3b63SPaul Walmsley /* l4_core -> mcbsp4 */ 563844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp4 = { 564cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 565844a3b63SPaul Walmsley .slave = &omap2430_mcbsp4_hwmod, 566844a3b63SPaul Walmsley .clk = "mcbsp4_ick", 567844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 568844a3b63SPaul Walmsley }; 569844a3b63SPaul Walmsley 570844a3b63SPaul Walmsley /* l4_core -> mcbsp5 */ 571844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp5 = { 572cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 573844a3b63SPaul Walmsley .slave = &omap2430_mcbsp5_hwmod, 574844a3b63SPaul Walmsley .clk = "mcbsp5_ick", 575844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 576844a3b63SPaul Walmsley }; 577844a3b63SPaul Walmsley 578f32bd778SPaul Walmsley /* l4_core -> hdq1w */ 579f32bd778SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__hdq1w = { 580f32bd778SPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 581f32bd778SPaul Walmsley .slave = &omap2430_hdq1w_hwmod, 582f32bd778SPaul Walmsley .clk = "hdq_ick", 583f32bd778SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 584f32bd778SPaul Walmsley .flags = OMAP_FIREWALL_L4 | OCPIF_SWSUP_IDLE, 585f32bd778SPaul Walmsley }; 586f32bd778SPaul Walmsley 587c8d82ff6SVaibhav Hiremath /* l4_wkup -> 32ksync_counter */ 588c8d82ff6SVaibhav Hiremath static struct omap_hwmod_ocp_if omap2430_l4_wkup__counter_32k = { 589c8d82ff6SVaibhav Hiremath .master = &omap2xxx_l4_wkup_hwmod, 590c8d82ff6SVaibhav Hiremath .slave = &omap2xxx_counter_32k_hwmod, 591c8d82ff6SVaibhav Hiremath .clk = "sync_32k_ick", 592c8d82ff6SVaibhav Hiremath .user = OCP_USER_MPU | OCP_USER_SDMA, 593c8d82ff6SVaibhav Hiremath }; 594c8d82ff6SVaibhav Hiremath 59549484a60SAfzal Mohammed static struct omap_hwmod_ocp_if omap2430_l3__gpmc = { 59649484a60SAfzal Mohammed .master = &omap2xxx_l3_main_hwmod, 59749484a60SAfzal Mohammed .slave = &omap2xxx_gpmc_hwmod, 59849484a60SAfzal Mohammed .clk = "core_l3_ck", 59949484a60SAfzal Mohammed .user = OCP_USER_MPU | OCP_USER_SDMA, 60049484a60SAfzal Mohammed }; 60149484a60SAfzal Mohammed 6020a78c5c5SPaul Walmsley static struct omap_hwmod_ocp_if *omap2430_hwmod_ocp_ifs[] __initdata = { 6036a29755fSPaul Walmsley &omap2xxx_l3_main__l4_core, 6046a29755fSPaul Walmsley &omap2xxx_mpu__l3_main, 6056a29755fSPaul Walmsley &omap2xxx_dss__l3, 6060a78c5c5SPaul Walmsley &omap2430_usbhsotg__l3, 6070a78c5c5SPaul Walmsley &omap2430_l4_core__i2c1, 6080a78c5c5SPaul Walmsley &omap2430_l4_core__i2c2, 6096a29755fSPaul Walmsley &omap2xxx_l4_core__l4_wkup, 6100a78c5c5SPaul Walmsley &omap2_l4_core__uart1, 6110a78c5c5SPaul Walmsley &omap2_l4_core__uart2, 6120a78c5c5SPaul Walmsley &omap2_l4_core__uart3, 6130a78c5c5SPaul Walmsley &omap2430_l4_core__usbhsotg, 6140a78c5c5SPaul Walmsley &omap2430_l4_core__mmc1, 6150a78c5c5SPaul Walmsley &omap2430_l4_core__mmc2, 6166a29755fSPaul Walmsley &omap2xxx_l4_core__mcspi1, 6176a29755fSPaul Walmsley &omap2xxx_l4_core__mcspi2, 6180a78c5c5SPaul Walmsley &omap2430_l4_core__mcspi3, 6190a78c5c5SPaul Walmsley &omap2430_l3__iva, 6200a78c5c5SPaul Walmsley &omap2430_l4_wkup__timer1, 6216a29755fSPaul Walmsley &omap2xxx_l4_core__timer2, 6226a29755fSPaul Walmsley &omap2xxx_l4_core__timer3, 6236a29755fSPaul Walmsley &omap2xxx_l4_core__timer4, 6246a29755fSPaul Walmsley &omap2xxx_l4_core__timer5, 6256a29755fSPaul Walmsley &omap2xxx_l4_core__timer6, 6266a29755fSPaul Walmsley &omap2xxx_l4_core__timer7, 6276a29755fSPaul Walmsley &omap2xxx_l4_core__timer8, 6286a29755fSPaul Walmsley &omap2xxx_l4_core__timer9, 6296a29755fSPaul Walmsley &omap2xxx_l4_core__timer10, 6306a29755fSPaul Walmsley &omap2xxx_l4_core__timer11, 6316a29755fSPaul Walmsley &omap2xxx_l4_core__timer12, 6320a78c5c5SPaul Walmsley &omap2430_l4_wkup__wd_timer2, 6336a29755fSPaul Walmsley &omap2xxx_l4_core__dss, 6346a29755fSPaul Walmsley &omap2xxx_l4_core__dss_dispc, 6356a29755fSPaul Walmsley &omap2xxx_l4_core__dss_rfbi, 6366a29755fSPaul Walmsley &omap2xxx_l4_core__dss_venc, 6370a78c5c5SPaul Walmsley &omap2430_l4_wkup__gpio1, 6380a78c5c5SPaul Walmsley &omap2430_l4_wkup__gpio2, 6390a78c5c5SPaul Walmsley &omap2430_l4_wkup__gpio3, 6400a78c5c5SPaul Walmsley &omap2430_l4_wkup__gpio4, 6410a78c5c5SPaul Walmsley &omap2430_l4_core__gpio5, 6420a78c5c5SPaul Walmsley &omap2430_dma_system__l3, 6430a78c5c5SPaul Walmsley &omap2430_l4_core__dma_system, 6440a78c5c5SPaul Walmsley &omap2430_l4_core__mailbox, 6450a78c5c5SPaul Walmsley &omap2430_l4_core__mcbsp1, 6460a78c5c5SPaul Walmsley &omap2430_l4_core__mcbsp2, 6470a78c5c5SPaul Walmsley &omap2430_l4_core__mcbsp3, 6480a78c5c5SPaul Walmsley &omap2430_l4_core__mcbsp4, 6490a78c5c5SPaul Walmsley &omap2430_l4_core__mcbsp5, 650f32bd778SPaul Walmsley &omap2430_l4_core__hdq1w, 651e9b0a2fbSPaul Walmsley &omap2xxx_l4_core__rng, 652e569e994SMark A. Greer &omap2xxx_l4_core__sham, 653660ffd6bSMark A. Greer &omap2xxx_l4_core__aes, 654c8d82ff6SVaibhav Hiremath &omap2430_l4_wkup__counter_32k, 65549484a60SAfzal Mohammed &omap2430_l3__gpmc, 6567359154eSPaul Walmsley NULL, 6577359154eSPaul Walmsley }; 6587359154eSPaul Walmsley 6597359154eSPaul Walmsley int __init omap2430_hwmod_init(void) 6607359154eSPaul Walmsley { 6619ebfd285SKevin Hilman omap_hwmod_init(); 6620a78c5c5SPaul Walmsley return omap_hwmod_register_links(omap2430_hwmod_ocp_ifs); 6637359154eSPaul Walmsley } 664