17359154eSPaul Walmsley /* 27359154eSPaul Walmsley * omap_hwmod_2430_data.c - hardware modules present on the OMAP2430 chips 37359154eSPaul Walmsley * 478183f3fSPaul Walmsley * Copyright (C) 2009-2011 Nokia Corporation 57359154eSPaul Walmsley * Paul Walmsley 67359154eSPaul Walmsley * 77359154eSPaul Walmsley * This program is free software; you can redistribute it and/or modify 87359154eSPaul Walmsley * it under the terms of the GNU General Public License version 2 as 97359154eSPaul Walmsley * published by the Free Software Foundation. 107359154eSPaul Walmsley * 117359154eSPaul Walmsley * XXX handle crossbar/shared link difference for L3? 127359154eSPaul Walmsley * XXX these should be marked initdata for multi-OMAP kernels 137359154eSPaul Walmsley */ 147359154eSPaul Walmsley #include <plat/omap_hwmod.h> 157359154eSPaul Walmsley #include <mach/irqs.h> 167359154eSPaul Walmsley #include <plat/cpu.h> 177359154eSPaul Walmsley #include <plat/dma.h> 18046465b7SKevin Hilman #include <plat/serial.h> 192004290fSPaul Walmsley #include <plat/i2c.h> 20aeac0e44SVaradarajan, Charulatha #include <plat/gpio.h> 2137801b3dSCharulatha V #include <plat/mcbsp.h> 227f904c78SCharulatha V #include <plat/mcspi.h> 23b6b58229SThara Gopinath #include <plat/dmtimer.h> 246ab8946fSKishore Kadiyala #include <plat/mmc.h> 25de56dbb6SSenthilvadivu Guruswamy #include <plat/l3_2xxx.h> 267359154eSPaul Walmsley 2743b40992SPaul Walmsley #include "omap_hwmod_common_data.h" 2843b40992SPaul Walmsley 297359154eSPaul Walmsley #include "prm-regbits-24xx.h" 30165e2161SVaradarajan, Charulatha #include "cm-regbits-24xx.h" 31ff2516fbSPaul Walmsley #include "wd_timer.h" 327359154eSPaul Walmsley 337359154eSPaul Walmsley /* 347359154eSPaul Walmsley * OMAP2430 hardware module integration data 357359154eSPaul Walmsley * 367359154eSPaul Walmsley * ALl of the data in this section should be autogeneratable from the 377359154eSPaul Walmsley * TI hardware database or other technical documentation. Data that 387359154eSPaul Walmsley * is driver-specific or driver-kernel integration-specific belongs 397359154eSPaul Walmsley * elsewhere. 407359154eSPaul Walmsley */ 417359154eSPaul Walmsley 427359154eSPaul Walmsley static struct omap_hwmod omap2430_mpu_hwmod; 4308072acfSPaul Walmsley static struct omap_hwmod omap2430_iva_hwmod; 444a7cf90aSKevin Hilman static struct omap_hwmod omap2430_l3_main_hwmod; 457359154eSPaul Walmsley static struct omap_hwmod omap2430_l4_core_hwmod; 46de56dbb6SSenthilvadivu Guruswamy static struct omap_hwmod omap2430_dss_core_hwmod; 47de56dbb6SSenthilvadivu Guruswamy static struct omap_hwmod omap2430_dss_dispc_hwmod; 48de56dbb6SSenthilvadivu Guruswamy static struct omap_hwmod omap2430_dss_rfbi_hwmod; 49de56dbb6SSenthilvadivu Guruswamy static struct omap_hwmod omap2430_dss_venc_hwmod; 50165e2161SVaradarajan, Charulatha static struct omap_hwmod omap2430_wd_timer2_hwmod; 51aeac0e44SVaradarajan, Charulatha static struct omap_hwmod omap2430_gpio1_hwmod; 52aeac0e44SVaradarajan, Charulatha static struct omap_hwmod omap2430_gpio2_hwmod; 53aeac0e44SVaradarajan, Charulatha static struct omap_hwmod omap2430_gpio3_hwmod; 54aeac0e44SVaradarajan, Charulatha static struct omap_hwmod omap2430_gpio4_hwmod; 55aeac0e44SVaradarajan, Charulatha static struct omap_hwmod omap2430_gpio5_hwmod; 5682cbd1aeSG, Manjunath Kondaiah static struct omap_hwmod omap2430_dma_system_hwmod; 5737801b3dSCharulatha V static struct omap_hwmod omap2430_mcbsp1_hwmod; 5837801b3dSCharulatha V static struct omap_hwmod omap2430_mcbsp2_hwmod; 5937801b3dSCharulatha V static struct omap_hwmod omap2430_mcbsp3_hwmod; 6037801b3dSCharulatha V static struct omap_hwmod omap2430_mcbsp4_hwmod; 6137801b3dSCharulatha V static struct omap_hwmod omap2430_mcbsp5_hwmod; 627f904c78SCharulatha V static struct omap_hwmod omap2430_mcspi1_hwmod; 637f904c78SCharulatha V static struct omap_hwmod omap2430_mcspi2_hwmod; 647f904c78SCharulatha V static struct omap_hwmod omap2430_mcspi3_hwmod; 65bce06f37SPaul Walmsley static struct omap_hwmod omap2430_mmc1_hwmod; 66bce06f37SPaul Walmsley static struct omap_hwmod omap2430_mmc2_hwmod; 677359154eSPaul Walmsley 687359154eSPaul Walmsley /* L3 -> L4_CORE interface */ 694a7cf90aSKevin Hilman static struct omap_hwmod_ocp_if omap2430_l3_main__l4_core = { 704a7cf90aSKevin Hilman .master = &omap2430_l3_main_hwmod, 717359154eSPaul Walmsley .slave = &omap2430_l4_core_hwmod, 727359154eSPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 737359154eSPaul Walmsley }; 747359154eSPaul Walmsley 757359154eSPaul Walmsley /* MPU -> L3 interface */ 764a7cf90aSKevin Hilman static struct omap_hwmod_ocp_if omap2430_mpu__l3_main = { 777359154eSPaul Walmsley .master = &omap2430_mpu_hwmod, 784a7cf90aSKevin Hilman .slave = &omap2430_l3_main_hwmod, 797359154eSPaul Walmsley .user = OCP_USER_MPU, 807359154eSPaul Walmsley }; 817359154eSPaul Walmsley 827359154eSPaul Walmsley /* Slave interfaces on the L3 interconnect */ 834a7cf90aSKevin Hilman static struct omap_hwmod_ocp_if *omap2430_l3_main_slaves[] = { 844a7cf90aSKevin Hilman &omap2430_mpu__l3_main, 857359154eSPaul Walmsley }; 867359154eSPaul Walmsley 87de56dbb6SSenthilvadivu Guruswamy /* DSS -> l3 */ 88de56dbb6SSenthilvadivu Guruswamy static struct omap_hwmod_ocp_if omap2430_dss__l3 = { 89de56dbb6SSenthilvadivu Guruswamy .master = &omap2430_dss_core_hwmod, 90de56dbb6SSenthilvadivu Guruswamy .slave = &omap2430_l3_main_hwmod, 91de56dbb6SSenthilvadivu Guruswamy .fw = { 92de56dbb6SSenthilvadivu Guruswamy .omap2 = { 93de56dbb6SSenthilvadivu Guruswamy .l3_perm_bit = OMAP2_L3_CORE_FW_CONNID_DSS, 94de56dbb6SSenthilvadivu Guruswamy .flags = OMAP_FIREWALL_L3, 95de56dbb6SSenthilvadivu Guruswamy } 96de56dbb6SSenthilvadivu Guruswamy }, 97de56dbb6SSenthilvadivu Guruswamy .user = OCP_USER_MPU | OCP_USER_SDMA, 98de56dbb6SSenthilvadivu Guruswamy }; 99de56dbb6SSenthilvadivu Guruswamy 1007359154eSPaul Walmsley /* Master interfaces on the L3 interconnect */ 1014a7cf90aSKevin Hilman static struct omap_hwmod_ocp_if *omap2430_l3_main_masters[] = { 1024a7cf90aSKevin Hilman &omap2430_l3_main__l4_core, 1037359154eSPaul Walmsley }; 1047359154eSPaul Walmsley 1057359154eSPaul Walmsley /* L3 */ 1064a7cf90aSKevin Hilman static struct omap_hwmod omap2430_l3_main_hwmod = { 107fa98347eSBenoit Cousson .name = "l3_main", 10843b40992SPaul Walmsley .class = &l3_hwmod_class, 1094a7cf90aSKevin Hilman .masters = omap2430_l3_main_masters, 1104a7cf90aSKevin Hilman .masters_cnt = ARRAY_SIZE(omap2430_l3_main_masters), 1114a7cf90aSKevin Hilman .slaves = omap2430_l3_main_slaves, 1124a7cf90aSKevin Hilman .slaves_cnt = ARRAY_SIZE(omap2430_l3_main_slaves), 1132eb1875dSKevin Hilman .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 1142eb1875dSKevin Hilman .flags = HWMOD_NO_IDLEST, 1157359154eSPaul Walmsley }; 1167359154eSPaul Walmsley 1177359154eSPaul Walmsley static struct omap_hwmod omap2430_l4_wkup_hwmod; 118046465b7SKevin Hilman static struct omap_hwmod omap2430_uart1_hwmod; 119046465b7SKevin Hilman static struct omap_hwmod omap2430_uart2_hwmod; 120046465b7SKevin Hilman static struct omap_hwmod omap2430_uart3_hwmod; 1212004290fSPaul Walmsley static struct omap_hwmod omap2430_i2c1_hwmod; 1222004290fSPaul Walmsley static struct omap_hwmod omap2430_i2c2_hwmod; 1232004290fSPaul Walmsley 12444d02acfSHema HK static struct omap_hwmod omap2430_usbhsotg_hwmod; 12544d02acfSHema HK 12644d02acfSHema HK /* l3_core -> usbhsotg interface */ 12744d02acfSHema HK static struct omap_hwmod_ocp_if omap2430_usbhsotg__l3 = { 12844d02acfSHema HK .master = &omap2430_usbhsotg_hwmod, 12944d02acfSHema HK .slave = &omap2430_l3_main_hwmod, 13044d02acfSHema HK .clk = "core_l3_ck", 13144d02acfSHema HK .user = OCP_USER_MPU, 13244d02acfSHema HK }; 13344d02acfSHema HK 1342004290fSPaul Walmsley /* I2C IP block address space length (in bytes) */ 1352004290fSPaul Walmsley #define OMAP2_I2C_AS_LEN 128 1362004290fSPaul Walmsley 1372004290fSPaul Walmsley /* L4 CORE -> I2C1 interface */ 1382004290fSPaul Walmsley static struct omap_hwmod_addr_space omap2430_i2c1_addr_space[] = { 1392004290fSPaul Walmsley { 1402004290fSPaul Walmsley .pa_start = 0x48070000, 1412004290fSPaul Walmsley .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN - 1, 1422004290fSPaul Walmsley .flags = ADDR_TYPE_RT, 1432004290fSPaul Walmsley }, 14478183f3fSPaul Walmsley { } 1452004290fSPaul Walmsley }; 1462004290fSPaul Walmsley 1472004290fSPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__i2c1 = { 1482004290fSPaul Walmsley .master = &omap2430_l4_core_hwmod, 1492004290fSPaul Walmsley .slave = &omap2430_i2c1_hwmod, 1502004290fSPaul Walmsley .clk = "i2c1_ick", 1512004290fSPaul Walmsley .addr = omap2430_i2c1_addr_space, 1522004290fSPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 1532004290fSPaul Walmsley }; 1542004290fSPaul Walmsley 1552004290fSPaul Walmsley /* L4 CORE -> I2C2 interface */ 1562004290fSPaul Walmsley static struct omap_hwmod_addr_space omap2430_i2c2_addr_space[] = { 1572004290fSPaul Walmsley { 1582004290fSPaul Walmsley .pa_start = 0x48072000, 1592004290fSPaul Walmsley .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN - 1, 1602004290fSPaul Walmsley .flags = ADDR_TYPE_RT, 1612004290fSPaul Walmsley }, 16278183f3fSPaul Walmsley { } 1632004290fSPaul Walmsley }; 1642004290fSPaul Walmsley 1652004290fSPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__i2c2 = { 1662004290fSPaul Walmsley .master = &omap2430_l4_core_hwmod, 1672004290fSPaul Walmsley .slave = &omap2430_i2c2_hwmod, 1682004290fSPaul Walmsley .clk = "i2c2_ick", 1692004290fSPaul Walmsley .addr = omap2430_i2c2_addr_space, 1702004290fSPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 1712004290fSPaul Walmsley }; 1727359154eSPaul Walmsley 1737359154eSPaul Walmsley /* L4_CORE -> L4_WKUP interface */ 1747359154eSPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__l4_wkup = { 1757359154eSPaul Walmsley .master = &omap2430_l4_core_hwmod, 1767359154eSPaul Walmsley .slave = &omap2430_l4_wkup_hwmod, 1777359154eSPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 1787359154eSPaul Walmsley }; 1797359154eSPaul Walmsley 180046465b7SKevin Hilman /* L4 CORE -> UART1 interface */ 181046465b7SKevin Hilman static struct omap_hwmod_addr_space omap2430_uart1_addr_space[] = { 182046465b7SKevin Hilman { 183046465b7SKevin Hilman .pa_start = OMAP2_UART1_BASE, 184046465b7SKevin Hilman .pa_end = OMAP2_UART1_BASE + SZ_8K - 1, 185046465b7SKevin Hilman .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, 186046465b7SKevin Hilman }, 18778183f3fSPaul Walmsley { } 188046465b7SKevin Hilman }; 189046465b7SKevin Hilman 190046465b7SKevin Hilman static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = { 191046465b7SKevin Hilman .master = &omap2430_l4_core_hwmod, 192046465b7SKevin Hilman .slave = &omap2430_uart1_hwmod, 193046465b7SKevin Hilman .clk = "uart1_ick", 194046465b7SKevin Hilman .addr = omap2430_uart1_addr_space, 195046465b7SKevin Hilman .user = OCP_USER_MPU | OCP_USER_SDMA, 196046465b7SKevin Hilman }; 197046465b7SKevin Hilman 198046465b7SKevin Hilman /* L4 CORE -> UART2 interface */ 199046465b7SKevin Hilman static struct omap_hwmod_addr_space omap2430_uart2_addr_space[] = { 200046465b7SKevin Hilman { 201046465b7SKevin Hilman .pa_start = OMAP2_UART2_BASE, 202046465b7SKevin Hilman .pa_end = OMAP2_UART2_BASE + SZ_1K - 1, 203046465b7SKevin Hilman .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, 204046465b7SKevin Hilman }, 20578183f3fSPaul Walmsley { } 206046465b7SKevin Hilman }; 207046465b7SKevin Hilman 208046465b7SKevin Hilman static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = { 209046465b7SKevin Hilman .master = &omap2430_l4_core_hwmod, 210046465b7SKevin Hilman .slave = &omap2430_uart2_hwmod, 211046465b7SKevin Hilman .clk = "uart2_ick", 212046465b7SKevin Hilman .addr = omap2430_uart2_addr_space, 213046465b7SKevin Hilman .user = OCP_USER_MPU | OCP_USER_SDMA, 214046465b7SKevin Hilman }; 215046465b7SKevin Hilman 216046465b7SKevin Hilman /* L4 PER -> UART3 interface */ 217046465b7SKevin Hilman static struct omap_hwmod_addr_space omap2430_uart3_addr_space[] = { 218046465b7SKevin Hilman { 219046465b7SKevin Hilman .pa_start = OMAP2_UART3_BASE, 220046465b7SKevin Hilman .pa_end = OMAP2_UART3_BASE + SZ_1K - 1, 221046465b7SKevin Hilman .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, 222046465b7SKevin Hilman }, 22378183f3fSPaul Walmsley { } 224046465b7SKevin Hilman }; 225046465b7SKevin Hilman 226046465b7SKevin Hilman static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { 227046465b7SKevin Hilman .master = &omap2430_l4_core_hwmod, 228046465b7SKevin Hilman .slave = &omap2430_uart3_hwmod, 229046465b7SKevin Hilman .clk = "uart3_ick", 230046465b7SKevin Hilman .addr = omap2430_uart3_addr_space, 231046465b7SKevin Hilman .user = OCP_USER_MPU | OCP_USER_SDMA, 232046465b7SKevin Hilman }; 233046465b7SKevin Hilman 23444d02acfSHema HK /* 23544d02acfSHema HK * usbhsotg interface data 23644d02acfSHema HK */ 23744d02acfSHema HK static struct omap_hwmod_addr_space omap2430_usbhsotg_addrs[] = { 23844d02acfSHema HK { 23944d02acfSHema HK .pa_start = OMAP243X_HS_BASE, 24044d02acfSHema HK .pa_end = OMAP243X_HS_BASE + SZ_4K - 1, 24144d02acfSHema HK .flags = ADDR_TYPE_RT 24244d02acfSHema HK }, 24344d02acfSHema HK }; 24444d02acfSHema HK 24544d02acfSHema HK /* l4_core ->usbhsotg interface */ 24644d02acfSHema HK static struct omap_hwmod_ocp_if omap2430_l4_core__usbhsotg = { 24744d02acfSHema HK .master = &omap2430_l4_core_hwmod, 24844d02acfSHema HK .slave = &omap2430_usbhsotg_hwmod, 24944d02acfSHema HK .clk = "usb_l4_ick", 25044d02acfSHema HK .addr = omap2430_usbhsotg_addrs, 25144d02acfSHema HK .user = OCP_USER_MPU, 25244d02acfSHema HK }; 25344d02acfSHema HK 25444d02acfSHema HK static struct omap_hwmod_ocp_if *omap2430_usbhsotg_masters[] = { 25544d02acfSHema HK &omap2430_usbhsotg__l3, 25644d02acfSHema HK }; 25744d02acfSHema HK 25844d02acfSHema HK static struct omap_hwmod_ocp_if *omap2430_usbhsotg_slaves[] = { 25944d02acfSHema HK &omap2430_l4_core__usbhsotg, 26044d02acfSHema HK }; 26144d02acfSHema HK 262bce06f37SPaul Walmsley /* L4 CORE -> MMC1 interface */ 263bce06f37SPaul Walmsley static struct omap_hwmod_addr_space omap2430_mmc1_addr_space[] = { 264bce06f37SPaul Walmsley { 265bce06f37SPaul Walmsley .pa_start = 0x4809c000, 266bce06f37SPaul Walmsley .pa_end = 0x4809c1ff, 267bce06f37SPaul Walmsley .flags = ADDR_TYPE_RT, 268bce06f37SPaul Walmsley }, 26978183f3fSPaul Walmsley { } 270bce06f37SPaul Walmsley }; 271bce06f37SPaul Walmsley 272bce06f37SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__mmc1 = { 273bce06f37SPaul Walmsley .master = &omap2430_l4_core_hwmod, 274bce06f37SPaul Walmsley .slave = &omap2430_mmc1_hwmod, 275bce06f37SPaul Walmsley .clk = "mmchs1_ick", 276bce06f37SPaul Walmsley .addr = omap2430_mmc1_addr_space, 277bce06f37SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 278bce06f37SPaul Walmsley }; 279bce06f37SPaul Walmsley 280bce06f37SPaul Walmsley /* L4 CORE -> MMC2 interface */ 281bce06f37SPaul Walmsley static struct omap_hwmod_addr_space omap2430_mmc2_addr_space[] = { 282bce06f37SPaul Walmsley { 283bce06f37SPaul Walmsley .pa_start = 0x480b4000, 284bce06f37SPaul Walmsley .pa_end = 0x480b41ff, 285bce06f37SPaul Walmsley .flags = ADDR_TYPE_RT, 286bce06f37SPaul Walmsley }, 28778183f3fSPaul Walmsley { } 288bce06f37SPaul Walmsley }; 289bce06f37SPaul Walmsley 290bce06f37SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__mmc2 = { 291bce06f37SPaul Walmsley .master = &omap2430_l4_core_hwmod, 292bce06f37SPaul Walmsley .slave = &omap2430_mmc2_hwmod, 293bce06f37SPaul Walmsley .clk = "mmchs2_ick", 29478183f3fSPaul Walmsley .addr = omap2430_mmc2_addr_space, 295bce06f37SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 296bce06f37SPaul Walmsley }; 297bce06f37SPaul Walmsley 2987359154eSPaul Walmsley /* Slave interfaces on the L4_CORE interconnect */ 2997359154eSPaul Walmsley static struct omap_hwmod_ocp_if *omap2430_l4_core_slaves[] = { 3004a7cf90aSKevin Hilman &omap2430_l3_main__l4_core, 3017359154eSPaul Walmsley }; 3027359154eSPaul Walmsley 3037359154eSPaul Walmsley /* Master interfaces on the L4_CORE interconnect */ 3047359154eSPaul Walmsley static struct omap_hwmod_ocp_if *omap2430_l4_core_masters[] = { 3057359154eSPaul Walmsley &omap2430_l4_core__l4_wkup, 306bce06f37SPaul Walmsley &omap2430_l4_core__mmc1, 307bce06f37SPaul Walmsley &omap2430_l4_core__mmc2, 3087359154eSPaul Walmsley }; 3097359154eSPaul Walmsley 3107359154eSPaul Walmsley /* L4 CORE */ 3117359154eSPaul Walmsley static struct omap_hwmod omap2430_l4_core_hwmod = { 312fa98347eSBenoit Cousson .name = "l4_core", 31343b40992SPaul Walmsley .class = &l4_hwmod_class, 3147359154eSPaul Walmsley .masters = omap2430_l4_core_masters, 3157359154eSPaul Walmsley .masters_cnt = ARRAY_SIZE(omap2430_l4_core_masters), 3167359154eSPaul Walmsley .slaves = omap2430_l4_core_slaves, 3177359154eSPaul Walmsley .slaves_cnt = ARRAY_SIZE(omap2430_l4_core_slaves), 3182eb1875dSKevin Hilman .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 3192eb1875dSKevin Hilman .flags = HWMOD_NO_IDLEST, 3207359154eSPaul Walmsley }; 3217359154eSPaul Walmsley 3227359154eSPaul Walmsley /* Slave interfaces on the L4_WKUP interconnect */ 3237359154eSPaul Walmsley static struct omap_hwmod_ocp_if *omap2430_l4_wkup_slaves[] = { 3247359154eSPaul Walmsley &omap2430_l4_core__l4_wkup, 325046465b7SKevin Hilman &omap2_l4_core__uart1, 326046465b7SKevin Hilman &omap2_l4_core__uart2, 327046465b7SKevin Hilman &omap2_l4_core__uart3, 3287359154eSPaul Walmsley }; 3297359154eSPaul Walmsley 3307359154eSPaul Walmsley /* Master interfaces on the L4_WKUP interconnect */ 3317359154eSPaul Walmsley static struct omap_hwmod_ocp_if *omap2430_l4_wkup_masters[] = { 3327359154eSPaul Walmsley }; 3337359154eSPaul Walmsley 3347f904c78SCharulatha V /* l4 core -> mcspi1 interface */ 3357f904c78SCharulatha V static struct omap_hwmod_addr_space omap2430_mcspi1_addr_space[] = { 3367f904c78SCharulatha V { 3377f904c78SCharulatha V .pa_start = 0x48098000, 3387f904c78SCharulatha V .pa_end = 0x480980ff, 3397f904c78SCharulatha V .flags = ADDR_TYPE_RT, 3407f904c78SCharulatha V }, 34178183f3fSPaul Walmsley { } 3427f904c78SCharulatha V }; 3437f904c78SCharulatha V 3447f904c78SCharulatha V static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi1 = { 3457f904c78SCharulatha V .master = &omap2430_l4_core_hwmod, 3467f904c78SCharulatha V .slave = &omap2430_mcspi1_hwmod, 3477f904c78SCharulatha V .clk = "mcspi1_ick", 3487f904c78SCharulatha V .addr = omap2430_mcspi1_addr_space, 3497f904c78SCharulatha V .user = OCP_USER_MPU | OCP_USER_SDMA, 3507f904c78SCharulatha V }; 3517f904c78SCharulatha V 3527f904c78SCharulatha V /* l4 core -> mcspi2 interface */ 3537f904c78SCharulatha V static struct omap_hwmod_addr_space omap2430_mcspi2_addr_space[] = { 3547f904c78SCharulatha V { 3557f904c78SCharulatha V .pa_start = 0x4809a000, 3567f904c78SCharulatha V .pa_end = 0x4809a0ff, 3577f904c78SCharulatha V .flags = ADDR_TYPE_RT, 3587f904c78SCharulatha V }, 35978183f3fSPaul Walmsley { } 3607f904c78SCharulatha V }; 3617f904c78SCharulatha V 3627f904c78SCharulatha V static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi2 = { 3637f904c78SCharulatha V .master = &omap2430_l4_core_hwmod, 3647f904c78SCharulatha V .slave = &omap2430_mcspi2_hwmod, 3657f904c78SCharulatha V .clk = "mcspi2_ick", 3667f904c78SCharulatha V .addr = omap2430_mcspi2_addr_space, 3677f904c78SCharulatha V .user = OCP_USER_MPU | OCP_USER_SDMA, 3687f904c78SCharulatha V }; 3697f904c78SCharulatha V 3707f904c78SCharulatha V /* l4 core -> mcspi3 interface */ 3717f904c78SCharulatha V static struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[] = { 3727f904c78SCharulatha V { 3737f904c78SCharulatha V .pa_start = 0x480b8000, 3747f904c78SCharulatha V .pa_end = 0x480b80ff, 3757f904c78SCharulatha V .flags = ADDR_TYPE_RT, 3767f904c78SCharulatha V }, 37778183f3fSPaul Walmsley { } 3787f904c78SCharulatha V }; 3797f904c78SCharulatha V 3807f904c78SCharulatha V static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi3 = { 3817f904c78SCharulatha V .master = &omap2430_l4_core_hwmod, 3827f904c78SCharulatha V .slave = &omap2430_mcspi3_hwmod, 3837f904c78SCharulatha V .clk = "mcspi3_ick", 3847f904c78SCharulatha V .addr = omap2430_mcspi3_addr_space, 3857f904c78SCharulatha V .user = OCP_USER_MPU | OCP_USER_SDMA, 3867f904c78SCharulatha V }; 3877f904c78SCharulatha V 3887359154eSPaul Walmsley /* L4 WKUP */ 3897359154eSPaul Walmsley static struct omap_hwmod omap2430_l4_wkup_hwmod = { 390fa98347eSBenoit Cousson .name = "l4_wkup", 39143b40992SPaul Walmsley .class = &l4_hwmod_class, 3927359154eSPaul Walmsley .masters = omap2430_l4_wkup_masters, 3937359154eSPaul Walmsley .masters_cnt = ARRAY_SIZE(omap2430_l4_wkup_masters), 3947359154eSPaul Walmsley .slaves = omap2430_l4_wkup_slaves, 3957359154eSPaul Walmsley .slaves_cnt = ARRAY_SIZE(omap2430_l4_wkup_slaves), 3962eb1875dSKevin Hilman .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 3972eb1875dSKevin Hilman .flags = HWMOD_NO_IDLEST, 3987359154eSPaul Walmsley }; 3997359154eSPaul Walmsley 4007359154eSPaul Walmsley /* Master interfaces on the MPU device */ 4017359154eSPaul Walmsley static struct omap_hwmod_ocp_if *omap2430_mpu_masters[] = { 4024a7cf90aSKevin Hilman &omap2430_mpu__l3_main, 4037359154eSPaul Walmsley }; 4047359154eSPaul Walmsley 4057359154eSPaul Walmsley /* MPU */ 4067359154eSPaul Walmsley static struct omap_hwmod omap2430_mpu_hwmod = { 4075c2c0296SBenoit Cousson .name = "mpu", 40843b40992SPaul Walmsley .class = &mpu_hwmod_class, 4097359154eSPaul Walmsley .main_clk = "mpu_ck", 4107359154eSPaul Walmsley .masters = omap2430_mpu_masters, 4117359154eSPaul Walmsley .masters_cnt = ARRAY_SIZE(omap2430_mpu_masters), 4127359154eSPaul Walmsley .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 4137359154eSPaul Walmsley }; 4147359154eSPaul Walmsley 41508072acfSPaul Walmsley /* 41608072acfSPaul Walmsley * IVA2_1 interface data 41708072acfSPaul Walmsley */ 41808072acfSPaul Walmsley 41908072acfSPaul Walmsley /* IVA2 <- L3 interface */ 42008072acfSPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l3__iva = { 42108072acfSPaul Walmsley .master = &omap2430_l3_main_hwmod, 42208072acfSPaul Walmsley .slave = &omap2430_iva_hwmod, 42308072acfSPaul Walmsley .clk = "dsp_fck", 42408072acfSPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 42508072acfSPaul Walmsley }; 42608072acfSPaul Walmsley 42708072acfSPaul Walmsley static struct omap_hwmod_ocp_if *omap2430_iva_masters[] = { 42808072acfSPaul Walmsley &omap2430_l3__iva, 42908072acfSPaul Walmsley }; 43008072acfSPaul Walmsley 43108072acfSPaul Walmsley /* 43208072acfSPaul Walmsley * IVA2 (IVA2) 43308072acfSPaul Walmsley */ 43408072acfSPaul Walmsley 43508072acfSPaul Walmsley static struct omap_hwmod omap2430_iva_hwmod = { 43608072acfSPaul Walmsley .name = "iva", 43708072acfSPaul Walmsley .class = &iva_hwmod_class, 43808072acfSPaul Walmsley .masters = omap2430_iva_masters, 43908072acfSPaul Walmsley .masters_cnt = ARRAY_SIZE(omap2430_iva_masters), 44008072acfSPaul Walmsley .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) 44108072acfSPaul Walmsley }; 44208072acfSPaul Walmsley 443b6b58229SThara Gopinath /* Timer Common */ 444b6b58229SThara Gopinath static struct omap_hwmod_class_sysconfig omap2430_timer_sysc = { 445b6b58229SThara Gopinath .rev_offs = 0x0000, 446b6b58229SThara Gopinath .sysc_offs = 0x0010, 447b6b58229SThara Gopinath .syss_offs = 0x0014, 448b6b58229SThara Gopinath .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY | 449b6b58229SThara Gopinath SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | 450b6b58229SThara Gopinath SYSC_HAS_AUTOIDLE), 451b6b58229SThara Gopinath .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), 452b6b58229SThara Gopinath .sysc_fields = &omap_hwmod_sysc_type1, 453b6b58229SThara Gopinath }; 454b6b58229SThara Gopinath 455b6b58229SThara Gopinath static struct omap_hwmod_class omap2430_timer_hwmod_class = { 456b6b58229SThara Gopinath .name = "timer", 457b6b58229SThara Gopinath .sysc = &omap2430_timer_sysc, 458b6b58229SThara Gopinath .rev = OMAP_TIMER_IP_VERSION_1, 459b6b58229SThara Gopinath }; 460b6b58229SThara Gopinath 461b6b58229SThara Gopinath /* timer1 */ 462b6b58229SThara Gopinath static struct omap_hwmod omap2430_timer1_hwmod; 463b6b58229SThara Gopinath static struct omap_hwmod_irq_info omap2430_timer1_mpu_irqs[] = { 464b6b58229SThara Gopinath { .irq = 37, }, 465b6b58229SThara Gopinath }; 466b6b58229SThara Gopinath 467b6b58229SThara Gopinath static struct omap_hwmod_addr_space omap2430_timer1_addrs[] = { 468b6b58229SThara Gopinath { 469b6b58229SThara Gopinath .pa_start = 0x49018000, 470b6b58229SThara Gopinath .pa_end = 0x49018000 + SZ_1K - 1, 471b6b58229SThara Gopinath .flags = ADDR_TYPE_RT 472b6b58229SThara Gopinath }, 47378183f3fSPaul Walmsley { } 474b6b58229SThara Gopinath }; 475b6b58229SThara Gopinath 476b6b58229SThara Gopinath /* l4_wkup -> timer1 */ 477b6b58229SThara Gopinath static struct omap_hwmod_ocp_if omap2430_l4_wkup__timer1 = { 478b6b58229SThara Gopinath .master = &omap2430_l4_wkup_hwmod, 479b6b58229SThara Gopinath .slave = &omap2430_timer1_hwmod, 480b6b58229SThara Gopinath .clk = "gpt1_ick", 481b6b58229SThara Gopinath .addr = omap2430_timer1_addrs, 482b6b58229SThara Gopinath .user = OCP_USER_MPU | OCP_USER_SDMA, 483b6b58229SThara Gopinath }; 484b6b58229SThara Gopinath 485b6b58229SThara Gopinath /* timer1 slave port */ 486b6b58229SThara Gopinath static struct omap_hwmod_ocp_if *omap2430_timer1_slaves[] = { 487b6b58229SThara Gopinath &omap2430_l4_wkup__timer1, 488b6b58229SThara Gopinath }; 489b6b58229SThara Gopinath 490b6b58229SThara Gopinath /* timer1 hwmod */ 491b6b58229SThara Gopinath static struct omap_hwmod omap2430_timer1_hwmod = { 492b6b58229SThara Gopinath .name = "timer1", 493b6b58229SThara Gopinath .mpu_irqs = omap2430_timer1_mpu_irqs, 494b6b58229SThara Gopinath .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer1_mpu_irqs), 495b6b58229SThara Gopinath .main_clk = "gpt1_fck", 496b6b58229SThara Gopinath .prcm = { 497b6b58229SThara Gopinath .omap2 = { 498b6b58229SThara Gopinath .prcm_reg_id = 1, 499b6b58229SThara Gopinath .module_bit = OMAP24XX_EN_GPT1_SHIFT, 500b6b58229SThara Gopinath .module_offs = WKUP_MOD, 501b6b58229SThara Gopinath .idlest_reg_id = 1, 502b6b58229SThara Gopinath .idlest_idle_bit = OMAP24XX_ST_GPT1_SHIFT, 503b6b58229SThara Gopinath }, 504b6b58229SThara Gopinath }, 505b6b58229SThara Gopinath .slaves = omap2430_timer1_slaves, 506b6b58229SThara Gopinath .slaves_cnt = ARRAY_SIZE(omap2430_timer1_slaves), 507b6b58229SThara Gopinath .class = &omap2430_timer_hwmod_class, 508b6b58229SThara Gopinath .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) 509b6b58229SThara Gopinath }; 510b6b58229SThara Gopinath 511b6b58229SThara Gopinath /* timer2 */ 512b6b58229SThara Gopinath static struct omap_hwmod omap2430_timer2_hwmod; 513b6b58229SThara Gopinath static struct omap_hwmod_irq_info omap2430_timer2_mpu_irqs[] = { 514b6b58229SThara Gopinath { .irq = 38, }, 515b6b58229SThara Gopinath }; 516b6b58229SThara Gopinath 517b6b58229SThara Gopinath static struct omap_hwmod_addr_space omap2430_timer2_addrs[] = { 518b6b58229SThara Gopinath { 519b6b58229SThara Gopinath .pa_start = 0x4802a000, 520b6b58229SThara Gopinath .pa_end = 0x4802a000 + SZ_1K - 1, 521b6b58229SThara Gopinath .flags = ADDR_TYPE_RT 522b6b58229SThara Gopinath }, 52378183f3fSPaul Walmsley { } 524b6b58229SThara Gopinath }; 525b6b58229SThara Gopinath 526b6b58229SThara Gopinath /* l4_core -> timer2 */ 527b6b58229SThara Gopinath static struct omap_hwmod_ocp_if omap2430_l4_core__timer2 = { 528b6b58229SThara Gopinath .master = &omap2430_l4_core_hwmod, 529b6b58229SThara Gopinath .slave = &omap2430_timer2_hwmod, 530b6b58229SThara Gopinath .clk = "gpt2_ick", 531b6b58229SThara Gopinath .addr = omap2430_timer2_addrs, 532b6b58229SThara Gopinath .user = OCP_USER_MPU | OCP_USER_SDMA, 533b6b58229SThara Gopinath }; 534b6b58229SThara Gopinath 535b6b58229SThara Gopinath /* timer2 slave port */ 536b6b58229SThara Gopinath static struct omap_hwmod_ocp_if *omap2430_timer2_slaves[] = { 537b6b58229SThara Gopinath &omap2430_l4_core__timer2, 538b6b58229SThara Gopinath }; 539b6b58229SThara Gopinath 540b6b58229SThara Gopinath /* timer2 hwmod */ 541b6b58229SThara Gopinath static struct omap_hwmod omap2430_timer2_hwmod = { 542b6b58229SThara Gopinath .name = "timer2", 543b6b58229SThara Gopinath .mpu_irqs = omap2430_timer2_mpu_irqs, 544b6b58229SThara Gopinath .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer2_mpu_irqs), 545b6b58229SThara Gopinath .main_clk = "gpt2_fck", 546b6b58229SThara Gopinath .prcm = { 547b6b58229SThara Gopinath .omap2 = { 548b6b58229SThara Gopinath .prcm_reg_id = 1, 549b6b58229SThara Gopinath .module_bit = OMAP24XX_EN_GPT2_SHIFT, 550b6b58229SThara Gopinath .module_offs = CORE_MOD, 551b6b58229SThara Gopinath .idlest_reg_id = 1, 552b6b58229SThara Gopinath .idlest_idle_bit = OMAP24XX_ST_GPT2_SHIFT, 553b6b58229SThara Gopinath }, 554b6b58229SThara Gopinath }, 555b6b58229SThara Gopinath .slaves = omap2430_timer2_slaves, 556b6b58229SThara Gopinath .slaves_cnt = ARRAY_SIZE(omap2430_timer2_slaves), 557b6b58229SThara Gopinath .class = &omap2430_timer_hwmod_class, 558b6b58229SThara Gopinath .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) 559b6b58229SThara Gopinath }; 560b6b58229SThara Gopinath 561b6b58229SThara Gopinath /* timer3 */ 562b6b58229SThara Gopinath static struct omap_hwmod omap2430_timer3_hwmod; 563b6b58229SThara Gopinath static struct omap_hwmod_irq_info omap2430_timer3_mpu_irqs[] = { 564b6b58229SThara Gopinath { .irq = 39, }, 565b6b58229SThara Gopinath }; 566b6b58229SThara Gopinath 567b6b58229SThara Gopinath static struct omap_hwmod_addr_space omap2430_timer3_addrs[] = { 568b6b58229SThara Gopinath { 569b6b58229SThara Gopinath .pa_start = 0x48078000, 570b6b58229SThara Gopinath .pa_end = 0x48078000 + SZ_1K - 1, 571b6b58229SThara Gopinath .flags = ADDR_TYPE_RT 572b6b58229SThara Gopinath }, 57378183f3fSPaul Walmsley { } 574b6b58229SThara Gopinath }; 575b6b58229SThara Gopinath 576b6b58229SThara Gopinath /* l4_core -> timer3 */ 577b6b58229SThara Gopinath static struct omap_hwmod_ocp_if omap2430_l4_core__timer3 = { 578b6b58229SThara Gopinath .master = &omap2430_l4_core_hwmod, 579b6b58229SThara Gopinath .slave = &omap2430_timer3_hwmod, 580b6b58229SThara Gopinath .clk = "gpt3_ick", 581b6b58229SThara Gopinath .addr = omap2430_timer3_addrs, 582b6b58229SThara Gopinath .user = OCP_USER_MPU | OCP_USER_SDMA, 583b6b58229SThara Gopinath }; 584b6b58229SThara Gopinath 585b6b58229SThara Gopinath /* timer3 slave port */ 586b6b58229SThara Gopinath static struct omap_hwmod_ocp_if *omap2430_timer3_slaves[] = { 587b6b58229SThara Gopinath &omap2430_l4_core__timer3, 588b6b58229SThara Gopinath }; 589b6b58229SThara Gopinath 590b6b58229SThara Gopinath /* timer3 hwmod */ 591b6b58229SThara Gopinath static struct omap_hwmod omap2430_timer3_hwmod = { 592b6b58229SThara Gopinath .name = "timer3", 593b6b58229SThara Gopinath .mpu_irqs = omap2430_timer3_mpu_irqs, 594b6b58229SThara Gopinath .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer3_mpu_irqs), 595b6b58229SThara Gopinath .main_clk = "gpt3_fck", 596b6b58229SThara Gopinath .prcm = { 597b6b58229SThara Gopinath .omap2 = { 598b6b58229SThara Gopinath .prcm_reg_id = 1, 599b6b58229SThara Gopinath .module_bit = OMAP24XX_EN_GPT3_SHIFT, 600b6b58229SThara Gopinath .module_offs = CORE_MOD, 601b6b58229SThara Gopinath .idlest_reg_id = 1, 602b6b58229SThara Gopinath .idlest_idle_bit = OMAP24XX_ST_GPT3_SHIFT, 603b6b58229SThara Gopinath }, 604b6b58229SThara Gopinath }, 605b6b58229SThara Gopinath .slaves = omap2430_timer3_slaves, 606b6b58229SThara Gopinath .slaves_cnt = ARRAY_SIZE(omap2430_timer3_slaves), 607b6b58229SThara Gopinath .class = &omap2430_timer_hwmod_class, 608b6b58229SThara Gopinath .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) 609b6b58229SThara Gopinath }; 610b6b58229SThara Gopinath 611b6b58229SThara Gopinath /* timer4 */ 612b6b58229SThara Gopinath static struct omap_hwmod omap2430_timer4_hwmod; 613b6b58229SThara Gopinath static struct omap_hwmod_irq_info omap2430_timer4_mpu_irqs[] = { 614b6b58229SThara Gopinath { .irq = 40, }, 615b6b58229SThara Gopinath }; 616b6b58229SThara Gopinath 617b6b58229SThara Gopinath static struct omap_hwmod_addr_space omap2430_timer4_addrs[] = { 618b6b58229SThara Gopinath { 619b6b58229SThara Gopinath .pa_start = 0x4807a000, 620b6b58229SThara Gopinath .pa_end = 0x4807a000 + SZ_1K - 1, 621b6b58229SThara Gopinath .flags = ADDR_TYPE_RT 622b6b58229SThara Gopinath }, 62378183f3fSPaul Walmsley { } 624b6b58229SThara Gopinath }; 625b6b58229SThara Gopinath 626b6b58229SThara Gopinath /* l4_core -> timer4 */ 627b6b58229SThara Gopinath static struct omap_hwmod_ocp_if omap2430_l4_core__timer4 = { 628b6b58229SThara Gopinath .master = &omap2430_l4_core_hwmod, 629b6b58229SThara Gopinath .slave = &omap2430_timer4_hwmod, 630b6b58229SThara Gopinath .clk = "gpt4_ick", 631b6b58229SThara Gopinath .addr = omap2430_timer4_addrs, 632b6b58229SThara Gopinath .user = OCP_USER_MPU | OCP_USER_SDMA, 633b6b58229SThara Gopinath }; 634b6b58229SThara Gopinath 635b6b58229SThara Gopinath /* timer4 slave port */ 636b6b58229SThara Gopinath static struct omap_hwmod_ocp_if *omap2430_timer4_slaves[] = { 637b6b58229SThara Gopinath &omap2430_l4_core__timer4, 638b6b58229SThara Gopinath }; 639b6b58229SThara Gopinath 640b6b58229SThara Gopinath /* timer4 hwmod */ 641b6b58229SThara Gopinath static struct omap_hwmod omap2430_timer4_hwmod = { 642b6b58229SThara Gopinath .name = "timer4", 643b6b58229SThara Gopinath .mpu_irqs = omap2430_timer4_mpu_irqs, 644b6b58229SThara Gopinath .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer4_mpu_irqs), 645b6b58229SThara Gopinath .main_clk = "gpt4_fck", 646b6b58229SThara Gopinath .prcm = { 647b6b58229SThara Gopinath .omap2 = { 648b6b58229SThara Gopinath .prcm_reg_id = 1, 649b6b58229SThara Gopinath .module_bit = OMAP24XX_EN_GPT4_SHIFT, 650b6b58229SThara Gopinath .module_offs = CORE_MOD, 651b6b58229SThara Gopinath .idlest_reg_id = 1, 652b6b58229SThara Gopinath .idlest_idle_bit = OMAP24XX_ST_GPT4_SHIFT, 653b6b58229SThara Gopinath }, 654b6b58229SThara Gopinath }, 655b6b58229SThara Gopinath .slaves = omap2430_timer4_slaves, 656b6b58229SThara Gopinath .slaves_cnt = ARRAY_SIZE(omap2430_timer4_slaves), 657b6b58229SThara Gopinath .class = &omap2430_timer_hwmod_class, 658b6b58229SThara Gopinath .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) 659b6b58229SThara Gopinath }; 660b6b58229SThara Gopinath 661b6b58229SThara Gopinath /* timer5 */ 662b6b58229SThara Gopinath static struct omap_hwmod omap2430_timer5_hwmod; 663b6b58229SThara Gopinath static struct omap_hwmod_irq_info omap2430_timer5_mpu_irqs[] = { 664b6b58229SThara Gopinath { .irq = 41, }, 665b6b58229SThara Gopinath }; 666b6b58229SThara Gopinath 667b6b58229SThara Gopinath static struct omap_hwmod_addr_space omap2430_timer5_addrs[] = { 668b6b58229SThara Gopinath { 669b6b58229SThara Gopinath .pa_start = 0x4807c000, 670b6b58229SThara Gopinath .pa_end = 0x4807c000 + SZ_1K - 1, 671b6b58229SThara Gopinath .flags = ADDR_TYPE_RT 672b6b58229SThara Gopinath }, 67378183f3fSPaul Walmsley { } 674b6b58229SThara Gopinath }; 675b6b58229SThara Gopinath 676b6b58229SThara Gopinath /* l4_core -> timer5 */ 677b6b58229SThara Gopinath static struct omap_hwmod_ocp_if omap2430_l4_core__timer5 = { 678b6b58229SThara Gopinath .master = &omap2430_l4_core_hwmod, 679b6b58229SThara Gopinath .slave = &omap2430_timer5_hwmod, 680b6b58229SThara Gopinath .clk = "gpt5_ick", 681b6b58229SThara Gopinath .addr = omap2430_timer5_addrs, 682b6b58229SThara Gopinath .user = OCP_USER_MPU | OCP_USER_SDMA, 683b6b58229SThara Gopinath }; 684b6b58229SThara Gopinath 685b6b58229SThara Gopinath /* timer5 slave port */ 686b6b58229SThara Gopinath static struct omap_hwmod_ocp_if *omap2430_timer5_slaves[] = { 687b6b58229SThara Gopinath &omap2430_l4_core__timer5, 688b6b58229SThara Gopinath }; 689b6b58229SThara Gopinath 690b6b58229SThara Gopinath /* timer5 hwmod */ 691b6b58229SThara Gopinath static struct omap_hwmod omap2430_timer5_hwmod = { 692b6b58229SThara Gopinath .name = "timer5", 693b6b58229SThara Gopinath .mpu_irqs = omap2430_timer5_mpu_irqs, 694b6b58229SThara Gopinath .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer5_mpu_irqs), 695b6b58229SThara Gopinath .main_clk = "gpt5_fck", 696b6b58229SThara Gopinath .prcm = { 697b6b58229SThara Gopinath .omap2 = { 698b6b58229SThara Gopinath .prcm_reg_id = 1, 699b6b58229SThara Gopinath .module_bit = OMAP24XX_EN_GPT5_SHIFT, 700b6b58229SThara Gopinath .module_offs = CORE_MOD, 701b6b58229SThara Gopinath .idlest_reg_id = 1, 702b6b58229SThara Gopinath .idlest_idle_bit = OMAP24XX_ST_GPT5_SHIFT, 703b6b58229SThara Gopinath }, 704b6b58229SThara Gopinath }, 705b6b58229SThara Gopinath .slaves = omap2430_timer5_slaves, 706b6b58229SThara Gopinath .slaves_cnt = ARRAY_SIZE(omap2430_timer5_slaves), 707b6b58229SThara Gopinath .class = &omap2430_timer_hwmod_class, 708b6b58229SThara Gopinath .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) 709b6b58229SThara Gopinath }; 710b6b58229SThara Gopinath 711b6b58229SThara Gopinath /* timer6 */ 712b6b58229SThara Gopinath static struct omap_hwmod omap2430_timer6_hwmod; 713b6b58229SThara Gopinath static struct omap_hwmod_irq_info omap2430_timer6_mpu_irqs[] = { 714b6b58229SThara Gopinath { .irq = 42, }, 715b6b58229SThara Gopinath }; 716b6b58229SThara Gopinath 717b6b58229SThara Gopinath static struct omap_hwmod_addr_space omap2430_timer6_addrs[] = { 718b6b58229SThara Gopinath { 719b6b58229SThara Gopinath .pa_start = 0x4807e000, 720b6b58229SThara Gopinath .pa_end = 0x4807e000 + SZ_1K - 1, 721b6b58229SThara Gopinath .flags = ADDR_TYPE_RT 722b6b58229SThara Gopinath }, 72378183f3fSPaul Walmsley { } 724b6b58229SThara Gopinath }; 725b6b58229SThara Gopinath 726b6b58229SThara Gopinath /* l4_core -> timer6 */ 727b6b58229SThara Gopinath static struct omap_hwmod_ocp_if omap2430_l4_core__timer6 = { 728b6b58229SThara Gopinath .master = &omap2430_l4_core_hwmod, 729b6b58229SThara Gopinath .slave = &omap2430_timer6_hwmod, 730b6b58229SThara Gopinath .clk = "gpt6_ick", 731b6b58229SThara Gopinath .addr = omap2430_timer6_addrs, 732b6b58229SThara Gopinath .user = OCP_USER_MPU | OCP_USER_SDMA, 733b6b58229SThara Gopinath }; 734b6b58229SThara Gopinath 735b6b58229SThara Gopinath /* timer6 slave port */ 736b6b58229SThara Gopinath static struct omap_hwmod_ocp_if *omap2430_timer6_slaves[] = { 737b6b58229SThara Gopinath &omap2430_l4_core__timer6, 738b6b58229SThara Gopinath }; 739b6b58229SThara Gopinath 740b6b58229SThara Gopinath /* timer6 hwmod */ 741b6b58229SThara Gopinath static struct omap_hwmod omap2430_timer6_hwmod = { 742b6b58229SThara Gopinath .name = "timer6", 743b6b58229SThara Gopinath .mpu_irqs = omap2430_timer6_mpu_irqs, 744b6b58229SThara Gopinath .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer6_mpu_irqs), 745b6b58229SThara Gopinath .main_clk = "gpt6_fck", 746b6b58229SThara Gopinath .prcm = { 747b6b58229SThara Gopinath .omap2 = { 748b6b58229SThara Gopinath .prcm_reg_id = 1, 749b6b58229SThara Gopinath .module_bit = OMAP24XX_EN_GPT6_SHIFT, 750b6b58229SThara Gopinath .module_offs = CORE_MOD, 751b6b58229SThara Gopinath .idlest_reg_id = 1, 752b6b58229SThara Gopinath .idlest_idle_bit = OMAP24XX_ST_GPT6_SHIFT, 753b6b58229SThara Gopinath }, 754b6b58229SThara Gopinath }, 755b6b58229SThara Gopinath .slaves = omap2430_timer6_slaves, 756b6b58229SThara Gopinath .slaves_cnt = ARRAY_SIZE(omap2430_timer6_slaves), 757b6b58229SThara Gopinath .class = &omap2430_timer_hwmod_class, 758b6b58229SThara Gopinath .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) 759b6b58229SThara Gopinath }; 760b6b58229SThara Gopinath 761b6b58229SThara Gopinath /* timer7 */ 762b6b58229SThara Gopinath static struct omap_hwmod omap2430_timer7_hwmod; 763b6b58229SThara Gopinath static struct omap_hwmod_irq_info omap2430_timer7_mpu_irqs[] = { 764b6b58229SThara Gopinath { .irq = 43, }, 765b6b58229SThara Gopinath }; 766b6b58229SThara Gopinath 767b6b58229SThara Gopinath static struct omap_hwmod_addr_space omap2430_timer7_addrs[] = { 768b6b58229SThara Gopinath { 769b6b58229SThara Gopinath .pa_start = 0x48080000, 770b6b58229SThara Gopinath .pa_end = 0x48080000 + SZ_1K - 1, 771b6b58229SThara Gopinath .flags = ADDR_TYPE_RT 772b6b58229SThara Gopinath }, 77378183f3fSPaul Walmsley { } 774b6b58229SThara Gopinath }; 775b6b58229SThara Gopinath 776b6b58229SThara Gopinath /* l4_core -> timer7 */ 777b6b58229SThara Gopinath static struct omap_hwmod_ocp_if omap2430_l4_core__timer7 = { 778b6b58229SThara Gopinath .master = &omap2430_l4_core_hwmod, 779b6b58229SThara Gopinath .slave = &omap2430_timer7_hwmod, 780b6b58229SThara Gopinath .clk = "gpt7_ick", 781b6b58229SThara Gopinath .addr = omap2430_timer7_addrs, 782b6b58229SThara Gopinath .user = OCP_USER_MPU | OCP_USER_SDMA, 783b6b58229SThara Gopinath }; 784b6b58229SThara Gopinath 785b6b58229SThara Gopinath /* timer7 slave port */ 786b6b58229SThara Gopinath static struct omap_hwmod_ocp_if *omap2430_timer7_slaves[] = { 787b6b58229SThara Gopinath &omap2430_l4_core__timer7, 788b6b58229SThara Gopinath }; 789b6b58229SThara Gopinath 790b6b58229SThara Gopinath /* timer7 hwmod */ 791b6b58229SThara Gopinath static struct omap_hwmod omap2430_timer7_hwmod = { 792b6b58229SThara Gopinath .name = "timer7", 793b6b58229SThara Gopinath .mpu_irqs = omap2430_timer7_mpu_irqs, 794b6b58229SThara Gopinath .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer7_mpu_irqs), 795b6b58229SThara Gopinath .main_clk = "gpt7_fck", 796b6b58229SThara Gopinath .prcm = { 797b6b58229SThara Gopinath .omap2 = { 798b6b58229SThara Gopinath .prcm_reg_id = 1, 799b6b58229SThara Gopinath .module_bit = OMAP24XX_EN_GPT7_SHIFT, 800b6b58229SThara Gopinath .module_offs = CORE_MOD, 801b6b58229SThara Gopinath .idlest_reg_id = 1, 802b6b58229SThara Gopinath .idlest_idle_bit = OMAP24XX_ST_GPT7_SHIFT, 803b6b58229SThara Gopinath }, 804b6b58229SThara Gopinath }, 805b6b58229SThara Gopinath .slaves = omap2430_timer7_slaves, 806b6b58229SThara Gopinath .slaves_cnt = ARRAY_SIZE(omap2430_timer7_slaves), 807b6b58229SThara Gopinath .class = &omap2430_timer_hwmod_class, 808b6b58229SThara Gopinath .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) 809b6b58229SThara Gopinath }; 810b6b58229SThara Gopinath 811b6b58229SThara Gopinath /* timer8 */ 812b6b58229SThara Gopinath static struct omap_hwmod omap2430_timer8_hwmod; 813b6b58229SThara Gopinath static struct omap_hwmod_irq_info omap2430_timer8_mpu_irqs[] = { 814b6b58229SThara Gopinath { .irq = 44, }, 815b6b58229SThara Gopinath }; 816b6b58229SThara Gopinath 817b6b58229SThara Gopinath static struct omap_hwmod_addr_space omap2430_timer8_addrs[] = { 818b6b58229SThara Gopinath { 819b6b58229SThara Gopinath .pa_start = 0x48082000, 820b6b58229SThara Gopinath .pa_end = 0x48082000 + SZ_1K - 1, 821b6b58229SThara Gopinath .flags = ADDR_TYPE_RT 822b6b58229SThara Gopinath }, 82378183f3fSPaul Walmsley { } 824b6b58229SThara Gopinath }; 825b6b58229SThara Gopinath 826b6b58229SThara Gopinath /* l4_core -> timer8 */ 827b6b58229SThara Gopinath static struct omap_hwmod_ocp_if omap2430_l4_core__timer8 = { 828b6b58229SThara Gopinath .master = &omap2430_l4_core_hwmod, 829b6b58229SThara Gopinath .slave = &omap2430_timer8_hwmod, 830b6b58229SThara Gopinath .clk = "gpt8_ick", 831b6b58229SThara Gopinath .addr = omap2430_timer8_addrs, 832b6b58229SThara Gopinath .user = OCP_USER_MPU | OCP_USER_SDMA, 833b6b58229SThara Gopinath }; 834b6b58229SThara Gopinath 835b6b58229SThara Gopinath /* timer8 slave port */ 836b6b58229SThara Gopinath static struct omap_hwmod_ocp_if *omap2430_timer8_slaves[] = { 837b6b58229SThara Gopinath &omap2430_l4_core__timer8, 838b6b58229SThara Gopinath }; 839b6b58229SThara Gopinath 840b6b58229SThara Gopinath /* timer8 hwmod */ 841b6b58229SThara Gopinath static struct omap_hwmod omap2430_timer8_hwmod = { 842b6b58229SThara Gopinath .name = "timer8", 843b6b58229SThara Gopinath .mpu_irqs = omap2430_timer8_mpu_irqs, 844b6b58229SThara Gopinath .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer8_mpu_irqs), 845b6b58229SThara Gopinath .main_clk = "gpt8_fck", 846b6b58229SThara Gopinath .prcm = { 847b6b58229SThara Gopinath .omap2 = { 848b6b58229SThara Gopinath .prcm_reg_id = 1, 849b6b58229SThara Gopinath .module_bit = OMAP24XX_EN_GPT8_SHIFT, 850b6b58229SThara Gopinath .module_offs = CORE_MOD, 851b6b58229SThara Gopinath .idlest_reg_id = 1, 852b6b58229SThara Gopinath .idlest_idle_bit = OMAP24XX_ST_GPT8_SHIFT, 853b6b58229SThara Gopinath }, 854b6b58229SThara Gopinath }, 855b6b58229SThara Gopinath .slaves = omap2430_timer8_slaves, 856b6b58229SThara Gopinath .slaves_cnt = ARRAY_SIZE(omap2430_timer8_slaves), 857b6b58229SThara Gopinath .class = &omap2430_timer_hwmod_class, 858b6b58229SThara Gopinath .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) 859b6b58229SThara Gopinath }; 860b6b58229SThara Gopinath 861b6b58229SThara Gopinath /* timer9 */ 862b6b58229SThara Gopinath static struct omap_hwmod omap2430_timer9_hwmod; 863b6b58229SThara Gopinath static struct omap_hwmod_irq_info omap2430_timer9_mpu_irqs[] = { 864b6b58229SThara Gopinath { .irq = 45, }, 865b6b58229SThara Gopinath }; 866b6b58229SThara Gopinath 867b6b58229SThara Gopinath static struct omap_hwmod_addr_space omap2430_timer9_addrs[] = { 868b6b58229SThara Gopinath { 869b6b58229SThara Gopinath .pa_start = 0x48084000, 870b6b58229SThara Gopinath .pa_end = 0x48084000 + SZ_1K - 1, 871b6b58229SThara Gopinath .flags = ADDR_TYPE_RT 872b6b58229SThara Gopinath }, 87378183f3fSPaul Walmsley { } 874b6b58229SThara Gopinath }; 875b6b58229SThara Gopinath 876b6b58229SThara Gopinath /* l4_core -> timer9 */ 877b6b58229SThara Gopinath static struct omap_hwmod_ocp_if omap2430_l4_core__timer9 = { 878b6b58229SThara Gopinath .master = &omap2430_l4_core_hwmod, 879b6b58229SThara Gopinath .slave = &omap2430_timer9_hwmod, 880b6b58229SThara Gopinath .clk = "gpt9_ick", 881b6b58229SThara Gopinath .addr = omap2430_timer9_addrs, 882b6b58229SThara Gopinath .user = OCP_USER_MPU | OCP_USER_SDMA, 883b6b58229SThara Gopinath }; 884b6b58229SThara Gopinath 885b6b58229SThara Gopinath /* timer9 slave port */ 886b6b58229SThara Gopinath static struct omap_hwmod_ocp_if *omap2430_timer9_slaves[] = { 887b6b58229SThara Gopinath &omap2430_l4_core__timer9, 888b6b58229SThara Gopinath }; 889b6b58229SThara Gopinath 890b6b58229SThara Gopinath /* timer9 hwmod */ 891b6b58229SThara Gopinath static struct omap_hwmod omap2430_timer9_hwmod = { 892b6b58229SThara Gopinath .name = "timer9", 893b6b58229SThara Gopinath .mpu_irqs = omap2430_timer9_mpu_irqs, 894b6b58229SThara Gopinath .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer9_mpu_irqs), 895b6b58229SThara Gopinath .main_clk = "gpt9_fck", 896b6b58229SThara Gopinath .prcm = { 897b6b58229SThara Gopinath .omap2 = { 898b6b58229SThara Gopinath .prcm_reg_id = 1, 899b6b58229SThara Gopinath .module_bit = OMAP24XX_EN_GPT9_SHIFT, 900b6b58229SThara Gopinath .module_offs = CORE_MOD, 901b6b58229SThara Gopinath .idlest_reg_id = 1, 902b6b58229SThara Gopinath .idlest_idle_bit = OMAP24XX_ST_GPT9_SHIFT, 903b6b58229SThara Gopinath }, 904b6b58229SThara Gopinath }, 905b6b58229SThara Gopinath .slaves = omap2430_timer9_slaves, 906b6b58229SThara Gopinath .slaves_cnt = ARRAY_SIZE(omap2430_timer9_slaves), 907b6b58229SThara Gopinath .class = &omap2430_timer_hwmod_class, 908b6b58229SThara Gopinath .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) 909b6b58229SThara Gopinath }; 910b6b58229SThara Gopinath 911b6b58229SThara Gopinath /* timer10 */ 912b6b58229SThara Gopinath static struct omap_hwmod omap2430_timer10_hwmod; 913b6b58229SThara Gopinath static struct omap_hwmod_irq_info omap2430_timer10_mpu_irqs[] = { 914b6b58229SThara Gopinath { .irq = 46, }, 915b6b58229SThara Gopinath }; 916b6b58229SThara Gopinath 917b6b58229SThara Gopinath static struct omap_hwmod_addr_space omap2430_timer10_addrs[] = { 918b6b58229SThara Gopinath { 919b6b58229SThara Gopinath .pa_start = 0x48086000, 920b6b58229SThara Gopinath .pa_end = 0x48086000 + SZ_1K - 1, 921b6b58229SThara Gopinath .flags = ADDR_TYPE_RT 922b6b58229SThara Gopinath }, 92378183f3fSPaul Walmsley { } 924b6b58229SThara Gopinath }; 925b6b58229SThara Gopinath 926b6b58229SThara Gopinath /* l4_core -> timer10 */ 927b6b58229SThara Gopinath static struct omap_hwmod_ocp_if omap2430_l4_core__timer10 = { 928b6b58229SThara Gopinath .master = &omap2430_l4_core_hwmod, 929b6b58229SThara Gopinath .slave = &omap2430_timer10_hwmod, 930b6b58229SThara Gopinath .clk = "gpt10_ick", 931b6b58229SThara Gopinath .addr = omap2430_timer10_addrs, 932b6b58229SThara Gopinath .user = OCP_USER_MPU | OCP_USER_SDMA, 933b6b58229SThara Gopinath }; 934b6b58229SThara Gopinath 935b6b58229SThara Gopinath /* timer10 slave port */ 936b6b58229SThara Gopinath static struct omap_hwmod_ocp_if *omap2430_timer10_slaves[] = { 937b6b58229SThara Gopinath &omap2430_l4_core__timer10, 938b6b58229SThara Gopinath }; 939b6b58229SThara Gopinath 940b6b58229SThara Gopinath /* timer10 hwmod */ 941b6b58229SThara Gopinath static struct omap_hwmod omap2430_timer10_hwmod = { 942b6b58229SThara Gopinath .name = "timer10", 943b6b58229SThara Gopinath .mpu_irqs = omap2430_timer10_mpu_irqs, 944b6b58229SThara Gopinath .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer10_mpu_irqs), 945b6b58229SThara Gopinath .main_clk = "gpt10_fck", 946b6b58229SThara Gopinath .prcm = { 947b6b58229SThara Gopinath .omap2 = { 948b6b58229SThara Gopinath .prcm_reg_id = 1, 949b6b58229SThara Gopinath .module_bit = OMAP24XX_EN_GPT10_SHIFT, 950b6b58229SThara Gopinath .module_offs = CORE_MOD, 951b6b58229SThara Gopinath .idlest_reg_id = 1, 952b6b58229SThara Gopinath .idlest_idle_bit = OMAP24XX_ST_GPT10_SHIFT, 953b6b58229SThara Gopinath }, 954b6b58229SThara Gopinath }, 955b6b58229SThara Gopinath .slaves = omap2430_timer10_slaves, 956b6b58229SThara Gopinath .slaves_cnt = ARRAY_SIZE(omap2430_timer10_slaves), 957b6b58229SThara Gopinath .class = &omap2430_timer_hwmod_class, 958b6b58229SThara Gopinath .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) 959b6b58229SThara Gopinath }; 960b6b58229SThara Gopinath 961b6b58229SThara Gopinath /* timer11 */ 962b6b58229SThara Gopinath static struct omap_hwmod omap2430_timer11_hwmod; 963b6b58229SThara Gopinath static struct omap_hwmod_irq_info omap2430_timer11_mpu_irqs[] = { 964b6b58229SThara Gopinath { .irq = 47, }, 965b6b58229SThara Gopinath }; 966b6b58229SThara Gopinath 967b6b58229SThara Gopinath static struct omap_hwmod_addr_space omap2430_timer11_addrs[] = { 968b6b58229SThara Gopinath { 969b6b58229SThara Gopinath .pa_start = 0x48088000, 970b6b58229SThara Gopinath .pa_end = 0x48088000 + SZ_1K - 1, 971b6b58229SThara Gopinath .flags = ADDR_TYPE_RT 972b6b58229SThara Gopinath }, 97378183f3fSPaul Walmsley { } 974b6b58229SThara Gopinath }; 975b6b58229SThara Gopinath 976b6b58229SThara Gopinath /* l4_core -> timer11 */ 977b6b58229SThara Gopinath static struct omap_hwmod_ocp_if omap2430_l4_core__timer11 = { 978b6b58229SThara Gopinath .master = &omap2430_l4_core_hwmod, 979b6b58229SThara Gopinath .slave = &omap2430_timer11_hwmod, 980b6b58229SThara Gopinath .clk = "gpt11_ick", 981b6b58229SThara Gopinath .addr = omap2430_timer11_addrs, 982b6b58229SThara Gopinath .user = OCP_USER_MPU | OCP_USER_SDMA, 983b6b58229SThara Gopinath }; 984b6b58229SThara Gopinath 985b6b58229SThara Gopinath /* timer11 slave port */ 986b6b58229SThara Gopinath static struct omap_hwmod_ocp_if *omap2430_timer11_slaves[] = { 987b6b58229SThara Gopinath &omap2430_l4_core__timer11, 988b6b58229SThara Gopinath }; 989b6b58229SThara Gopinath 990b6b58229SThara Gopinath /* timer11 hwmod */ 991b6b58229SThara Gopinath static struct omap_hwmod omap2430_timer11_hwmod = { 992b6b58229SThara Gopinath .name = "timer11", 993b6b58229SThara Gopinath .mpu_irqs = omap2430_timer11_mpu_irqs, 994b6b58229SThara Gopinath .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer11_mpu_irqs), 995b6b58229SThara Gopinath .main_clk = "gpt11_fck", 996b6b58229SThara Gopinath .prcm = { 997b6b58229SThara Gopinath .omap2 = { 998b6b58229SThara Gopinath .prcm_reg_id = 1, 999b6b58229SThara Gopinath .module_bit = OMAP24XX_EN_GPT11_SHIFT, 1000b6b58229SThara Gopinath .module_offs = CORE_MOD, 1001b6b58229SThara Gopinath .idlest_reg_id = 1, 1002b6b58229SThara Gopinath .idlest_idle_bit = OMAP24XX_ST_GPT11_SHIFT, 1003b6b58229SThara Gopinath }, 1004b6b58229SThara Gopinath }, 1005b6b58229SThara Gopinath .slaves = omap2430_timer11_slaves, 1006b6b58229SThara Gopinath .slaves_cnt = ARRAY_SIZE(omap2430_timer11_slaves), 1007b6b58229SThara Gopinath .class = &omap2430_timer_hwmod_class, 1008b6b58229SThara Gopinath .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) 1009b6b58229SThara Gopinath }; 1010b6b58229SThara Gopinath 1011b6b58229SThara Gopinath /* timer12 */ 1012b6b58229SThara Gopinath static struct omap_hwmod omap2430_timer12_hwmod; 1013b6b58229SThara Gopinath static struct omap_hwmod_irq_info omap2430_timer12_mpu_irqs[] = { 1014b6b58229SThara Gopinath { .irq = 48, }, 1015b6b58229SThara Gopinath }; 1016b6b58229SThara Gopinath 1017b6b58229SThara Gopinath static struct omap_hwmod_addr_space omap2430_timer12_addrs[] = { 1018b6b58229SThara Gopinath { 1019b6b58229SThara Gopinath .pa_start = 0x4808a000, 1020b6b58229SThara Gopinath .pa_end = 0x4808a000 + SZ_1K - 1, 1021b6b58229SThara Gopinath .flags = ADDR_TYPE_RT 1022b6b58229SThara Gopinath }, 102378183f3fSPaul Walmsley { } 1024b6b58229SThara Gopinath }; 1025b6b58229SThara Gopinath 1026b6b58229SThara Gopinath /* l4_core -> timer12 */ 1027b6b58229SThara Gopinath static struct omap_hwmod_ocp_if omap2430_l4_core__timer12 = { 1028b6b58229SThara Gopinath .master = &omap2430_l4_core_hwmod, 1029b6b58229SThara Gopinath .slave = &omap2430_timer12_hwmod, 1030b6b58229SThara Gopinath .clk = "gpt12_ick", 1031b6b58229SThara Gopinath .addr = omap2430_timer12_addrs, 1032b6b58229SThara Gopinath .user = OCP_USER_MPU | OCP_USER_SDMA, 1033b6b58229SThara Gopinath }; 1034b6b58229SThara Gopinath 1035b6b58229SThara Gopinath /* timer12 slave port */ 1036b6b58229SThara Gopinath static struct omap_hwmod_ocp_if *omap2430_timer12_slaves[] = { 1037b6b58229SThara Gopinath &omap2430_l4_core__timer12, 1038b6b58229SThara Gopinath }; 1039b6b58229SThara Gopinath 1040b6b58229SThara Gopinath /* timer12 hwmod */ 1041b6b58229SThara Gopinath static struct omap_hwmod omap2430_timer12_hwmod = { 1042b6b58229SThara Gopinath .name = "timer12", 1043b6b58229SThara Gopinath .mpu_irqs = omap2430_timer12_mpu_irqs, 1044b6b58229SThara Gopinath .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer12_mpu_irqs), 1045b6b58229SThara Gopinath .main_clk = "gpt12_fck", 1046b6b58229SThara Gopinath .prcm = { 1047b6b58229SThara Gopinath .omap2 = { 1048b6b58229SThara Gopinath .prcm_reg_id = 1, 1049b6b58229SThara Gopinath .module_bit = OMAP24XX_EN_GPT12_SHIFT, 1050b6b58229SThara Gopinath .module_offs = CORE_MOD, 1051b6b58229SThara Gopinath .idlest_reg_id = 1, 1052b6b58229SThara Gopinath .idlest_idle_bit = OMAP24XX_ST_GPT12_SHIFT, 1053b6b58229SThara Gopinath }, 1054b6b58229SThara Gopinath }, 1055b6b58229SThara Gopinath .slaves = omap2430_timer12_slaves, 1056b6b58229SThara Gopinath .slaves_cnt = ARRAY_SIZE(omap2430_timer12_slaves), 1057b6b58229SThara Gopinath .class = &omap2430_timer_hwmod_class, 1058b6b58229SThara Gopinath .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) 1059b6b58229SThara Gopinath }; 1060b6b58229SThara Gopinath 1061165e2161SVaradarajan, Charulatha /* l4_wkup -> wd_timer2 */ 1062165e2161SVaradarajan, Charulatha static struct omap_hwmod_addr_space omap2430_wd_timer2_addrs[] = { 1063165e2161SVaradarajan, Charulatha { 1064165e2161SVaradarajan, Charulatha .pa_start = 0x49016000, 1065165e2161SVaradarajan, Charulatha .pa_end = 0x4901607f, 1066165e2161SVaradarajan, Charulatha .flags = ADDR_TYPE_RT 1067165e2161SVaradarajan, Charulatha }, 106878183f3fSPaul Walmsley { } 1069165e2161SVaradarajan, Charulatha }; 1070165e2161SVaradarajan, Charulatha 1071165e2161SVaradarajan, Charulatha static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = { 1072165e2161SVaradarajan, Charulatha .master = &omap2430_l4_wkup_hwmod, 1073165e2161SVaradarajan, Charulatha .slave = &omap2430_wd_timer2_hwmod, 1074165e2161SVaradarajan, Charulatha .clk = "mpu_wdt_ick", 1075165e2161SVaradarajan, Charulatha .addr = omap2430_wd_timer2_addrs, 1076165e2161SVaradarajan, Charulatha .user = OCP_USER_MPU | OCP_USER_SDMA, 1077165e2161SVaradarajan, Charulatha }; 1078165e2161SVaradarajan, Charulatha 1079165e2161SVaradarajan, Charulatha /* 1080165e2161SVaradarajan, Charulatha * 'wd_timer' class 1081165e2161SVaradarajan, Charulatha * 32-bit watchdog upward counter that generates a pulse on the reset pin on 1082165e2161SVaradarajan, Charulatha * overflow condition 1083165e2161SVaradarajan, Charulatha */ 1084165e2161SVaradarajan, Charulatha 1085165e2161SVaradarajan, Charulatha static struct omap_hwmod_class_sysconfig omap2430_wd_timer_sysc = { 1086165e2161SVaradarajan, Charulatha .rev_offs = 0x0, 1087165e2161SVaradarajan, Charulatha .sysc_offs = 0x0010, 1088165e2161SVaradarajan, Charulatha .syss_offs = 0x0014, 1089165e2161SVaradarajan, Charulatha .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET | 1090d73d65faSAvinash.H.M SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), 1091165e2161SVaradarajan, Charulatha .sysc_fields = &omap_hwmod_sysc_type1, 1092165e2161SVaradarajan, Charulatha }; 1093165e2161SVaradarajan, Charulatha 1094165e2161SVaradarajan, Charulatha static struct omap_hwmod_class omap2430_wd_timer_hwmod_class = { 1095165e2161SVaradarajan, Charulatha .name = "wd_timer", 1096165e2161SVaradarajan, Charulatha .sysc = &omap2430_wd_timer_sysc, 1097ff2516fbSPaul Walmsley .pre_shutdown = &omap2_wd_timer_disable 1098165e2161SVaradarajan, Charulatha }; 1099165e2161SVaradarajan, Charulatha 1100165e2161SVaradarajan, Charulatha /* wd_timer2 */ 1101165e2161SVaradarajan, Charulatha static struct omap_hwmod_ocp_if *omap2430_wd_timer2_slaves[] = { 1102165e2161SVaradarajan, Charulatha &omap2430_l4_wkup__wd_timer2, 1103165e2161SVaradarajan, Charulatha }; 1104165e2161SVaradarajan, Charulatha 1105165e2161SVaradarajan, Charulatha static struct omap_hwmod omap2430_wd_timer2_hwmod = { 1106165e2161SVaradarajan, Charulatha .name = "wd_timer2", 1107165e2161SVaradarajan, Charulatha .class = &omap2430_wd_timer_hwmod_class, 1108165e2161SVaradarajan, Charulatha .main_clk = "mpu_wdt_fck", 1109165e2161SVaradarajan, Charulatha .prcm = { 1110165e2161SVaradarajan, Charulatha .omap2 = { 1111165e2161SVaradarajan, Charulatha .prcm_reg_id = 1, 1112165e2161SVaradarajan, Charulatha .module_bit = OMAP24XX_EN_MPU_WDT_SHIFT, 1113165e2161SVaradarajan, Charulatha .module_offs = WKUP_MOD, 1114165e2161SVaradarajan, Charulatha .idlest_reg_id = 1, 1115165e2161SVaradarajan, Charulatha .idlest_idle_bit = OMAP24XX_ST_MPU_WDT_SHIFT, 1116165e2161SVaradarajan, Charulatha }, 1117165e2161SVaradarajan, Charulatha }, 1118165e2161SVaradarajan, Charulatha .slaves = omap2430_wd_timer2_slaves, 1119165e2161SVaradarajan, Charulatha .slaves_cnt = ARRAY_SIZE(omap2430_wd_timer2_slaves), 1120165e2161SVaradarajan, Charulatha .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 1121165e2161SVaradarajan, Charulatha }; 1122165e2161SVaradarajan, Charulatha 1123046465b7SKevin Hilman /* UART */ 1124046465b7SKevin Hilman 1125046465b7SKevin Hilman static struct omap_hwmod_class_sysconfig uart_sysc = { 1126046465b7SKevin Hilman .rev_offs = 0x50, 1127046465b7SKevin Hilman .sysc_offs = 0x54, 1128046465b7SKevin Hilman .syss_offs = 0x58, 1129046465b7SKevin Hilman .sysc_flags = (SYSC_HAS_SIDLEMODE | 1130046465b7SKevin Hilman SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | 1131d73d65faSAvinash.H.M SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), 1132046465b7SKevin Hilman .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), 1133046465b7SKevin Hilman .sysc_fields = &omap_hwmod_sysc_type1, 1134046465b7SKevin Hilman }; 1135046465b7SKevin Hilman 1136046465b7SKevin Hilman static struct omap_hwmod_class uart_class = { 1137046465b7SKevin Hilman .name = "uart", 1138046465b7SKevin Hilman .sysc = &uart_sysc, 1139046465b7SKevin Hilman }; 1140046465b7SKevin Hilman 1141046465b7SKevin Hilman /* UART1 */ 1142046465b7SKevin Hilman 1143046465b7SKevin Hilman static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { 1144046465b7SKevin Hilman { .irq = INT_24XX_UART1_IRQ, }, 1145046465b7SKevin Hilman }; 1146046465b7SKevin Hilman 1147046465b7SKevin Hilman static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { 1148046465b7SKevin Hilman { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, 1149046465b7SKevin Hilman { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, 1150046465b7SKevin Hilman }; 1151046465b7SKevin Hilman 1152046465b7SKevin Hilman static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = { 1153046465b7SKevin Hilman &omap2_l4_core__uart1, 1154046465b7SKevin Hilman }; 1155046465b7SKevin Hilman 1156046465b7SKevin Hilman static struct omap_hwmod omap2430_uart1_hwmod = { 1157046465b7SKevin Hilman .name = "uart1", 1158046465b7SKevin Hilman .mpu_irqs = uart1_mpu_irqs, 1159046465b7SKevin Hilman .mpu_irqs_cnt = ARRAY_SIZE(uart1_mpu_irqs), 1160046465b7SKevin Hilman .sdma_reqs = uart1_sdma_reqs, 1161046465b7SKevin Hilman .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), 1162046465b7SKevin Hilman .main_clk = "uart1_fck", 1163046465b7SKevin Hilman .prcm = { 1164046465b7SKevin Hilman .omap2 = { 1165046465b7SKevin Hilman .module_offs = CORE_MOD, 1166046465b7SKevin Hilman .prcm_reg_id = 1, 1167046465b7SKevin Hilman .module_bit = OMAP24XX_EN_UART1_SHIFT, 1168046465b7SKevin Hilman .idlest_reg_id = 1, 1169046465b7SKevin Hilman .idlest_idle_bit = OMAP24XX_EN_UART1_SHIFT, 1170046465b7SKevin Hilman }, 1171046465b7SKevin Hilman }, 1172046465b7SKevin Hilman .slaves = omap2430_uart1_slaves, 1173046465b7SKevin Hilman .slaves_cnt = ARRAY_SIZE(omap2430_uart1_slaves), 1174046465b7SKevin Hilman .class = &uart_class, 1175046465b7SKevin Hilman .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 1176046465b7SKevin Hilman }; 1177046465b7SKevin Hilman 1178046465b7SKevin Hilman /* UART2 */ 1179046465b7SKevin Hilman 1180046465b7SKevin Hilman static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { 1181046465b7SKevin Hilman { .irq = INT_24XX_UART2_IRQ, }, 1182046465b7SKevin Hilman }; 1183046465b7SKevin Hilman 1184046465b7SKevin Hilman static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { 1185046465b7SKevin Hilman { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, 1186046465b7SKevin Hilman { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, 1187046465b7SKevin Hilman }; 1188046465b7SKevin Hilman 1189046465b7SKevin Hilman static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = { 1190046465b7SKevin Hilman &omap2_l4_core__uart2, 1191046465b7SKevin Hilman }; 1192046465b7SKevin Hilman 1193046465b7SKevin Hilman static struct omap_hwmod omap2430_uart2_hwmod = { 1194046465b7SKevin Hilman .name = "uart2", 1195046465b7SKevin Hilman .mpu_irqs = uart2_mpu_irqs, 1196046465b7SKevin Hilman .mpu_irqs_cnt = ARRAY_SIZE(uart2_mpu_irqs), 1197046465b7SKevin Hilman .sdma_reqs = uart2_sdma_reqs, 1198046465b7SKevin Hilman .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), 1199046465b7SKevin Hilman .main_clk = "uart2_fck", 1200046465b7SKevin Hilman .prcm = { 1201046465b7SKevin Hilman .omap2 = { 1202046465b7SKevin Hilman .module_offs = CORE_MOD, 1203046465b7SKevin Hilman .prcm_reg_id = 1, 1204046465b7SKevin Hilman .module_bit = OMAP24XX_EN_UART2_SHIFT, 1205046465b7SKevin Hilman .idlest_reg_id = 1, 1206046465b7SKevin Hilman .idlest_idle_bit = OMAP24XX_EN_UART2_SHIFT, 1207046465b7SKevin Hilman }, 1208046465b7SKevin Hilman }, 1209046465b7SKevin Hilman .slaves = omap2430_uart2_slaves, 1210046465b7SKevin Hilman .slaves_cnt = ARRAY_SIZE(omap2430_uart2_slaves), 1211046465b7SKevin Hilman .class = &uart_class, 1212046465b7SKevin Hilman .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 1213046465b7SKevin Hilman }; 1214046465b7SKevin Hilman 1215046465b7SKevin Hilman /* UART3 */ 1216046465b7SKevin Hilman 1217046465b7SKevin Hilman static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { 1218046465b7SKevin Hilman { .irq = INT_24XX_UART3_IRQ, }, 1219046465b7SKevin Hilman }; 1220046465b7SKevin Hilman 1221046465b7SKevin Hilman static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { 1222046465b7SKevin Hilman { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, 1223046465b7SKevin Hilman { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, 1224046465b7SKevin Hilman }; 1225046465b7SKevin Hilman 1226046465b7SKevin Hilman static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = { 1227046465b7SKevin Hilman &omap2_l4_core__uart3, 1228046465b7SKevin Hilman }; 1229046465b7SKevin Hilman 1230046465b7SKevin Hilman static struct omap_hwmod omap2430_uart3_hwmod = { 1231046465b7SKevin Hilman .name = "uart3", 1232046465b7SKevin Hilman .mpu_irqs = uart3_mpu_irqs, 1233046465b7SKevin Hilman .mpu_irqs_cnt = ARRAY_SIZE(uart3_mpu_irqs), 1234046465b7SKevin Hilman .sdma_reqs = uart3_sdma_reqs, 1235046465b7SKevin Hilman .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), 1236046465b7SKevin Hilman .main_clk = "uart3_fck", 1237046465b7SKevin Hilman .prcm = { 1238046465b7SKevin Hilman .omap2 = { 1239046465b7SKevin Hilman .module_offs = CORE_MOD, 1240046465b7SKevin Hilman .prcm_reg_id = 2, 1241046465b7SKevin Hilman .module_bit = OMAP24XX_EN_UART3_SHIFT, 1242046465b7SKevin Hilman .idlest_reg_id = 2, 1243046465b7SKevin Hilman .idlest_idle_bit = OMAP24XX_EN_UART3_SHIFT, 1244046465b7SKevin Hilman }, 1245046465b7SKevin Hilman }, 1246046465b7SKevin Hilman .slaves = omap2430_uart3_slaves, 1247046465b7SKevin Hilman .slaves_cnt = ARRAY_SIZE(omap2430_uart3_slaves), 1248046465b7SKevin Hilman .class = &uart_class, 1249046465b7SKevin Hilman .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 1250046465b7SKevin Hilman }; 1251046465b7SKevin Hilman 1252de56dbb6SSenthilvadivu Guruswamy /* 1253de56dbb6SSenthilvadivu Guruswamy * 'dss' class 1254de56dbb6SSenthilvadivu Guruswamy * display sub-system 1255de56dbb6SSenthilvadivu Guruswamy */ 1256de56dbb6SSenthilvadivu Guruswamy 1257de56dbb6SSenthilvadivu Guruswamy static struct omap_hwmod_class_sysconfig omap2430_dss_sysc = { 1258de56dbb6SSenthilvadivu Guruswamy .rev_offs = 0x0000, 1259de56dbb6SSenthilvadivu Guruswamy .sysc_offs = 0x0010, 1260de56dbb6SSenthilvadivu Guruswamy .syss_offs = 0x0014, 1261de56dbb6SSenthilvadivu Guruswamy .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), 1262de56dbb6SSenthilvadivu Guruswamy .sysc_fields = &omap_hwmod_sysc_type1, 1263de56dbb6SSenthilvadivu Guruswamy }; 1264de56dbb6SSenthilvadivu Guruswamy 1265de56dbb6SSenthilvadivu Guruswamy static struct omap_hwmod_class omap2430_dss_hwmod_class = { 1266de56dbb6SSenthilvadivu Guruswamy .name = "dss", 1267de56dbb6SSenthilvadivu Guruswamy .sysc = &omap2430_dss_sysc, 1268de56dbb6SSenthilvadivu Guruswamy }; 1269de56dbb6SSenthilvadivu Guruswamy 1270de56dbb6SSenthilvadivu Guruswamy static struct omap_hwmod_dma_info omap2430_dss_sdma_chs[] = { 1271de56dbb6SSenthilvadivu Guruswamy { .name = "dispc", .dma_req = 5 }, 1272de56dbb6SSenthilvadivu Guruswamy }; 1273de56dbb6SSenthilvadivu Guruswamy 1274de56dbb6SSenthilvadivu Guruswamy /* dss */ 1275de56dbb6SSenthilvadivu Guruswamy /* dss master ports */ 1276de56dbb6SSenthilvadivu Guruswamy static struct omap_hwmod_ocp_if *omap2430_dss_masters[] = { 1277de56dbb6SSenthilvadivu Guruswamy &omap2430_dss__l3, 1278de56dbb6SSenthilvadivu Guruswamy }; 1279de56dbb6SSenthilvadivu Guruswamy 1280de56dbb6SSenthilvadivu Guruswamy static struct omap_hwmod_addr_space omap2430_dss_addrs[] = { 1281de56dbb6SSenthilvadivu Guruswamy { 1282de56dbb6SSenthilvadivu Guruswamy .pa_start = 0x48050000, 1283de56dbb6SSenthilvadivu Guruswamy .pa_end = 0x480503FF, 1284de56dbb6SSenthilvadivu Guruswamy .flags = ADDR_TYPE_RT 1285de56dbb6SSenthilvadivu Guruswamy }, 128678183f3fSPaul Walmsley { } 1287de56dbb6SSenthilvadivu Guruswamy }; 1288de56dbb6SSenthilvadivu Guruswamy 1289de56dbb6SSenthilvadivu Guruswamy /* l4_core -> dss */ 1290de56dbb6SSenthilvadivu Guruswamy static struct omap_hwmod_ocp_if omap2430_l4_core__dss = { 1291de56dbb6SSenthilvadivu Guruswamy .master = &omap2430_l4_core_hwmod, 1292de56dbb6SSenthilvadivu Guruswamy .slave = &omap2430_dss_core_hwmod, 1293de56dbb6SSenthilvadivu Guruswamy .clk = "dss_ick", 1294de56dbb6SSenthilvadivu Guruswamy .addr = omap2430_dss_addrs, 1295de56dbb6SSenthilvadivu Guruswamy .user = OCP_USER_MPU | OCP_USER_SDMA, 1296de56dbb6SSenthilvadivu Guruswamy }; 1297de56dbb6SSenthilvadivu Guruswamy 1298de56dbb6SSenthilvadivu Guruswamy /* dss slave ports */ 1299de56dbb6SSenthilvadivu Guruswamy static struct omap_hwmod_ocp_if *omap2430_dss_slaves[] = { 1300de56dbb6SSenthilvadivu Guruswamy &omap2430_l4_core__dss, 1301de56dbb6SSenthilvadivu Guruswamy }; 1302de56dbb6SSenthilvadivu Guruswamy 1303de56dbb6SSenthilvadivu Guruswamy static struct omap_hwmod_opt_clk dss_opt_clks[] = { 1304de56dbb6SSenthilvadivu Guruswamy { .role = "tv_clk", .clk = "dss_54m_fck" }, 1305de56dbb6SSenthilvadivu Guruswamy { .role = "sys_clk", .clk = "dss2_fck" }, 1306de56dbb6SSenthilvadivu Guruswamy }; 1307de56dbb6SSenthilvadivu Guruswamy 1308de56dbb6SSenthilvadivu Guruswamy static struct omap_hwmod omap2430_dss_core_hwmod = { 1309de56dbb6SSenthilvadivu Guruswamy .name = "dss_core", 1310de56dbb6SSenthilvadivu Guruswamy .class = &omap2430_dss_hwmod_class, 1311de56dbb6SSenthilvadivu Guruswamy .main_clk = "dss1_fck", /* instead of dss_fck */ 1312de56dbb6SSenthilvadivu Guruswamy .sdma_reqs = omap2430_dss_sdma_chs, 1313de56dbb6SSenthilvadivu Guruswamy .sdma_reqs_cnt = ARRAY_SIZE(omap2430_dss_sdma_chs), 1314de56dbb6SSenthilvadivu Guruswamy .prcm = { 1315de56dbb6SSenthilvadivu Guruswamy .omap2 = { 1316de56dbb6SSenthilvadivu Guruswamy .prcm_reg_id = 1, 1317de56dbb6SSenthilvadivu Guruswamy .module_bit = OMAP24XX_EN_DSS1_SHIFT, 1318de56dbb6SSenthilvadivu Guruswamy .module_offs = CORE_MOD, 1319de56dbb6SSenthilvadivu Guruswamy .idlest_reg_id = 1, 1320de56dbb6SSenthilvadivu Guruswamy .idlest_stdby_bit = OMAP24XX_ST_DSS_SHIFT, 1321de56dbb6SSenthilvadivu Guruswamy }, 1322de56dbb6SSenthilvadivu Guruswamy }, 1323de56dbb6SSenthilvadivu Guruswamy .opt_clks = dss_opt_clks, 1324de56dbb6SSenthilvadivu Guruswamy .opt_clks_cnt = ARRAY_SIZE(dss_opt_clks), 1325de56dbb6SSenthilvadivu Guruswamy .slaves = omap2430_dss_slaves, 1326de56dbb6SSenthilvadivu Guruswamy .slaves_cnt = ARRAY_SIZE(omap2430_dss_slaves), 1327de56dbb6SSenthilvadivu Guruswamy .masters = omap2430_dss_masters, 1328de56dbb6SSenthilvadivu Guruswamy .masters_cnt = ARRAY_SIZE(omap2430_dss_masters), 1329de56dbb6SSenthilvadivu Guruswamy .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 1330de56dbb6SSenthilvadivu Guruswamy .flags = HWMOD_NO_IDLEST, 1331de56dbb6SSenthilvadivu Guruswamy }; 1332de56dbb6SSenthilvadivu Guruswamy 1333de56dbb6SSenthilvadivu Guruswamy /* 1334de56dbb6SSenthilvadivu Guruswamy * 'dispc' class 1335de56dbb6SSenthilvadivu Guruswamy * display controller 1336de56dbb6SSenthilvadivu Guruswamy */ 1337de56dbb6SSenthilvadivu Guruswamy 1338de56dbb6SSenthilvadivu Guruswamy static struct omap_hwmod_class_sysconfig omap2430_dispc_sysc = { 1339de56dbb6SSenthilvadivu Guruswamy .rev_offs = 0x0000, 1340de56dbb6SSenthilvadivu Guruswamy .sysc_offs = 0x0010, 1341de56dbb6SSenthilvadivu Guruswamy .syss_offs = 0x0014, 1342de56dbb6SSenthilvadivu Guruswamy .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE | 1343de56dbb6SSenthilvadivu Guruswamy SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), 1344de56dbb6SSenthilvadivu Guruswamy .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | 1345de56dbb6SSenthilvadivu Guruswamy MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), 1346de56dbb6SSenthilvadivu Guruswamy .sysc_fields = &omap_hwmod_sysc_type1, 1347de56dbb6SSenthilvadivu Guruswamy }; 1348de56dbb6SSenthilvadivu Guruswamy 1349de56dbb6SSenthilvadivu Guruswamy static struct omap_hwmod_class omap2430_dispc_hwmod_class = { 1350de56dbb6SSenthilvadivu Guruswamy .name = "dispc", 1351de56dbb6SSenthilvadivu Guruswamy .sysc = &omap2430_dispc_sysc, 1352de56dbb6SSenthilvadivu Guruswamy }; 1353de56dbb6SSenthilvadivu Guruswamy 1354affe360dSarchit taneja static struct omap_hwmod_irq_info omap2430_dispc_irqs[] = { 1355affe360dSarchit taneja { .irq = 25 }, 1356affe360dSarchit taneja }; 1357affe360dSarchit taneja 1358de56dbb6SSenthilvadivu Guruswamy static struct omap_hwmod_addr_space omap2430_dss_dispc_addrs[] = { 1359de56dbb6SSenthilvadivu Guruswamy { 1360de56dbb6SSenthilvadivu Guruswamy .pa_start = 0x48050400, 1361de56dbb6SSenthilvadivu Guruswamy .pa_end = 0x480507FF, 1362de56dbb6SSenthilvadivu Guruswamy .flags = ADDR_TYPE_RT 1363de56dbb6SSenthilvadivu Guruswamy }, 136478183f3fSPaul Walmsley { } 1365de56dbb6SSenthilvadivu Guruswamy }; 1366de56dbb6SSenthilvadivu Guruswamy 1367de56dbb6SSenthilvadivu Guruswamy /* l4_core -> dss_dispc */ 1368de56dbb6SSenthilvadivu Guruswamy static struct omap_hwmod_ocp_if omap2430_l4_core__dss_dispc = { 1369de56dbb6SSenthilvadivu Guruswamy .master = &omap2430_l4_core_hwmod, 1370de56dbb6SSenthilvadivu Guruswamy .slave = &omap2430_dss_dispc_hwmod, 1371de56dbb6SSenthilvadivu Guruswamy .clk = "dss_ick", 1372de56dbb6SSenthilvadivu Guruswamy .addr = omap2430_dss_dispc_addrs, 1373de56dbb6SSenthilvadivu Guruswamy .user = OCP_USER_MPU | OCP_USER_SDMA, 1374de56dbb6SSenthilvadivu Guruswamy }; 1375de56dbb6SSenthilvadivu Guruswamy 1376de56dbb6SSenthilvadivu Guruswamy /* dss_dispc slave ports */ 1377de56dbb6SSenthilvadivu Guruswamy static struct omap_hwmod_ocp_if *omap2430_dss_dispc_slaves[] = { 1378de56dbb6SSenthilvadivu Guruswamy &omap2430_l4_core__dss_dispc, 1379de56dbb6SSenthilvadivu Guruswamy }; 1380de56dbb6SSenthilvadivu Guruswamy 1381de56dbb6SSenthilvadivu Guruswamy static struct omap_hwmod omap2430_dss_dispc_hwmod = { 1382de56dbb6SSenthilvadivu Guruswamy .name = "dss_dispc", 1383de56dbb6SSenthilvadivu Guruswamy .class = &omap2430_dispc_hwmod_class, 1384affe360dSarchit taneja .mpu_irqs = omap2430_dispc_irqs, 1385affe360dSarchit taneja .mpu_irqs_cnt = ARRAY_SIZE(omap2430_dispc_irqs), 1386de56dbb6SSenthilvadivu Guruswamy .main_clk = "dss1_fck", 1387de56dbb6SSenthilvadivu Guruswamy .prcm = { 1388de56dbb6SSenthilvadivu Guruswamy .omap2 = { 1389de56dbb6SSenthilvadivu Guruswamy .prcm_reg_id = 1, 1390de56dbb6SSenthilvadivu Guruswamy .module_bit = OMAP24XX_EN_DSS1_SHIFT, 1391de56dbb6SSenthilvadivu Guruswamy .module_offs = CORE_MOD, 1392de56dbb6SSenthilvadivu Guruswamy .idlest_reg_id = 1, 1393de56dbb6SSenthilvadivu Guruswamy .idlest_stdby_bit = OMAP24XX_ST_DSS_SHIFT, 1394de56dbb6SSenthilvadivu Guruswamy }, 1395de56dbb6SSenthilvadivu Guruswamy }, 1396de56dbb6SSenthilvadivu Guruswamy .slaves = omap2430_dss_dispc_slaves, 1397de56dbb6SSenthilvadivu Guruswamy .slaves_cnt = ARRAY_SIZE(omap2430_dss_dispc_slaves), 1398de56dbb6SSenthilvadivu Guruswamy .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 1399de56dbb6SSenthilvadivu Guruswamy .flags = HWMOD_NO_IDLEST, 1400de56dbb6SSenthilvadivu Guruswamy }; 1401de56dbb6SSenthilvadivu Guruswamy 1402de56dbb6SSenthilvadivu Guruswamy /* 1403de56dbb6SSenthilvadivu Guruswamy * 'rfbi' class 1404de56dbb6SSenthilvadivu Guruswamy * remote frame buffer interface 1405de56dbb6SSenthilvadivu Guruswamy */ 1406de56dbb6SSenthilvadivu Guruswamy 1407de56dbb6SSenthilvadivu Guruswamy static struct omap_hwmod_class_sysconfig omap2430_rfbi_sysc = { 1408de56dbb6SSenthilvadivu Guruswamy .rev_offs = 0x0000, 1409de56dbb6SSenthilvadivu Guruswamy .sysc_offs = 0x0010, 1410de56dbb6SSenthilvadivu Guruswamy .syss_offs = 0x0014, 1411de56dbb6SSenthilvadivu Guruswamy .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | 1412de56dbb6SSenthilvadivu Guruswamy SYSC_HAS_AUTOIDLE), 1413de56dbb6SSenthilvadivu Guruswamy .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), 1414de56dbb6SSenthilvadivu Guruswamy .sysc_fields = &omap_hwmod_sysc_type1, 1415de56dbb6SSenthilvadivu Guruswamy }; 1416de56dbb6SSenthilvadivu Guruswamy 1417de56dbb6SSenthilvadivu Guruswamy static struct omap_hwmod_class omap2430_rfbi_hwmod_class = { 1418de56dbb6SSenthilvadivu Guruswamy .name = "rfbi", 1419de56dbb6SSenthilvadivu Guruswamy .sysc = &omap2430_rfbi_sysc, 1420de56dbb6SSenthilvadivu Guruswamy }; 1421de56dbb6SSenthilvadivu Guruswamy 1422de56dbb6SSenthilvadivu Guruswamy static struct omap_hwmod_addr_space omap2430_dss_rfbi_addrs[] = { 1423de56dbb6SSenthilvadivu Guruswamy { 1424de56dbb6SSenthilvadivu Guruswamy .pa_start = 0x48050800, 1425de56dbb6SSenthilvadivu Guruswamy .pa_end = 0x48050BFF, 1426de56dbb6SSenthilvadivu Guruswamy .flags = ADDR_TYPE_RT 1427de56dbb6SSenthilvadivu Guruswamy }, 142878183f3fSPaul Walmsley { } 1429de56dbb6SSenthilvadivu Guruswamy }; 1430de56dbb6SSenthilvadivu Guruswamy 1431de56dbb6SSenthilvadivu Guruswamy /* l4_core -> dss_rfbi */ 1432de56dbb6SSenthilvadivu Guruswamy static struct omap_hwmod_ocp_if omap2430_l4_core__dss_rfbi = { 1433de56dbb6SSenthilvadivu Guruswamy .master = &omap2430_l4_core_hwmod, 1434de56dbb6SSenthilvadivu Guruswamy .slave = &omap2430_dss_rfbi_hwmod, 1435de56dbb6SSenthilvadivu Guruswamy .clk = "dss_ick", 1436de56dbb6SSenthilvadivu Guruswamy .addr = omap2430_dss_rfbi_addrs, 1437de56dbb6SSenthilvadivu Guruswamy .user = OCP_USER_MPU | OCP_USER_SDMA, 1438de56dbb6SSenthilvadivu Guruswamy }; 1439de56dbb6SSenthilvadivu Guruswamy 1440de56dbb6SSenthilvadivu Guruswamy /* dss_rfbi slave ports */ 1441de56dbb6SSenthilvadivu Guruswamy static struct omap_hwmod_ocp_if *omap2430_dss_rfbi_slaves[] = { 1442de56dbb6SSenthilvadivu Guruswamy &omap2430_l4_core__dss_rfbi, 1443de56dbb6SSenthilvadivu Guruswamy }; 1444de56dbb6SSenthilvadivu Guruswamy 1445de56dbb6SSenthilvadivu Guruswamy static struct omap_hwmod omap2430_dss_rfbi_hwmod = { 1446de56dbb6SSenthilvadivu Guruswamy .name = "dss_rfbi", 1447de56dbb6SSenthilvadivu Guruswamy .class = &omap2430_rfbi_hwmod_class, 1448de56dbb6SSenthilvadivu Guruswamy .main_clk = "dss1_fck", 1449de56dbb6SSenthilvadivu Guruswamy .prcm = { 1450de56dbb6SSenthilvadivu Guruswamy .omap2 = { 1451de56dbb6SSenthilvadivu Guruswamy .prcm_reg_id = 1, 1452de56dbb6SSenthilvadivu Guruswamy .module_bit = OMAP24XX_EN_DSS1_SHIFT, 1453de56dbb6SSenthilvadivu Guruswamy .module_offs = CORE_MOD, 1454de56dbb6SSenthilvadivu Guruswamy }, 1455de56dbb6SSenthilvadivu Guruswamy }, 1456de56dbb6SSenthilvadivu Guruswamy .slaves = omap2430_dss_rfbi_slaves, 1457de56dbb6SSenthilvadivu Guruswamy .slaves_cnt = ARRAY_SIZE(omap2430_dss_rfbi_slaves), 1458de56dbb6SSenthilvadivu Guruswamy .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 1459de56dbb6SSenthilvadivu Guruswamy .flags = HWMOD_NO_IDLEST, 1460de56dbb6SSenthilvadivu Guruswamy }; 1461de56dbb6SSenthilvadivu Guruswamy 1462de56dbb6SSenthilvadivu Guruswamy /* 1463de56dbb6SSenthilvadivu Guruswamy * 'venc' class 1464de56dbb6SSenthilvadivu Guruswamy * video encoder 1465de56dbb6SSenthilvadivu Guruswamy */ 1466de56dbb6SSenthilvadivu Guruswamy 1467de56dbb6SSenthilvadivu Guruswamy static struct omap_hwmod_class omap2430_venc_hwmod_class = { 1468de56dbb6SSenthilvadivu Guruswamy .name = "venc", 1469de56dbb6SSenthilvadivu Guruswamy }; 1470de56dbb6SSenthilvadivu Guruswamy 1471de56dbb6SSenthilvadivu Guruswamy /* dss_venc */ 1472de56dbb6SSenthilvadivu Guruswamy static struct omap_hwmod_addr_space omap2430_dss_venc_addrs[] = { 1473de56dbb6SSenthilvadivu Guruswamy { 1474de56dbb6SSenthilvadivu Guruswamy .pa_start = 0x48050C00, 1475de56dbb6SSenthilvadivu Guruswamy .pa_end = 0x48050FFF, 1476de56dbb6SSenthilvadivu Guruswamy .flags = ADDR_TYPE_RT 1477de56dbb6SSenthilvadivu Guruswamy }, 147878183f3fSPaul Walmsley { } 1479de56dbb6SSenthilvadivu Guruswamy }; 1480de56dbb6SSenthilvadivu Guruswamy 1481de56dbb6SSenthilvadivu Guruswamy /* l4_core -> dss_venc */ 1482de56dbb6SSenthilvadivu Guruswamy static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = { 1483de56dbb6SSenthilvadivu Guruswamy .master = &omap2430_l4_core_hwmod, 1484de56dbb6SSenthilvadivu Guruswamy .slave = &omap2430_dss_venc_hwmod, 1485de56dbb6SSenthilvadivu Guruswamy .clk = "dss_54m_fck", 1486de56dbb6SSenthilvadivu Guruswamy .addr = omap2430_dss_venc_addrs, 1487c39bee8aSPaul Walmsley .flags = OCPIF_SWSUP_IDLE, 1488de56dbb6SSenthilvadivu Guruswamy .user = OCP_USER_MPU | OCP_USER_SDMA, 1489de56dbb6SSenthilvadivu Guruswamy }; 1490de56dbb6SSenthilvadivu Guruswamy 1491de56dbb6SSenthilvadivu Guruswamy /* dss_venc slave ports */ 1492de56dbb6SSenthilvadivu Guruswamy static struct omap_hwmod_ocp_if *omap2430_dss_venc_slaves[] = { 1493de56dbb6SSenthilvadivu Guruswamy &omap2430_l4_core__dss_venc, 1494de56dbb6SSenthilvadivu Guruswamy }; 1495de56dbb6SSenthilvadivu Guruswamy 1496de56dbb6SSenthilvadivu Guruswamy static struct omap_hwmod omap2430_dss_venc_hwmod = { 1497de56dbb6SSenthilvadivu Guruswamy .name = "dss_venc", 1498de56dbb6SSenthilvadivu Guruswamy .class = &omap2430_venc_hwmod_class, 1499de56dbb6SSenthilvadivu Guruswamy .main_clk = "dss1_fck", 1500de56dbb6SSenthilvadivu Guruswamy .prcm = { 1501de56dbb6SSenthilvadivu Guruswamy .omap2 = { 1502de56dbb6SSenthilvadivu Guruswamy .prcm_reg_id = 1, 1503de56dbb6SSenthilvadivu Guruswamy .module_bit = OMAP24XX_EN_DSS1_SHIFT, 1504de56dbb6SSenthilvadivu Guruswamy .module_offs = CORE_MOD, 1505de56dbb6SSenthilvadivu Guruswamy }, 1506de56dbb6SSenthilvadivu Guruswamy }, 1507de56dbb6SSenthilvadivu Guruswamy .slaves = omap2430_dss_venc_slaves, 1508de56dbb6SSenthilvadivu Guruswamy .slaves_cnt = ARRAY_SIZE(omap2430_dss_venc_slaves), 1509de56dbb6SSenthilvadivu Guruswamy .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 1510de56dbb6SSenthilvadivu Guruswamy .flags = HWMOD_NO_IDLEST, 1511de56dbb6SSenthilvadivu Guruswamy }; 1512de56dbb6SSenthilvadivu Guruswamy 15132004290fSPaul Walmsley /* I2C common */ 15142004290fSPaul Walmsley static struct omap_hwmod_class_sysconfig i2c_sysc = { 15152004290fSPaul Walmsley .rev_offs = 0x00, 15162004290fSPaul Walmsley .sysc_offs = 0x20, 15172004290fSPaul Walmsley .syss_offs = 0x10, 1518d73d65faSAvinash.H.M .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | 1519d73d65faSAvinash.H.M SYSS_HAS_RESET_STATUS), 15202004290fSPaul Walmsley .sysc_fields = &omap_hwmod_sysc_type1, 15212004290fSPaul Walmsley }; 15222004290fSPaul Walmsley 15232004290fSPaul Walmsley static struct omap_hwmod_class i2c_class = { 15242004290fSPaul Walmsley .name = "i2c", 15252004290fSPaul Walmsley .sysc = &i2c_sysc, 15262004290fSPaul Walmsley }; 15272004290fSPaul Walmsley 152850ebb777SBenoit Cousson static struct omap_i2c_dev_attr i2c_dev_attr = { 15292004290fSPaul Walmsley .fifo_depth = 8, /* bytes */ 15302004290fSPaul Walmsley }; 15312004290fSPaul Walmsley 153250ebb777SBenoit Cousson /* I2C1 */ 153350ebb777SBenoit Cousson 15342004290fSPaul Walmsley static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { 15352004290fSPaul Walmsley { .irq = INT_24XX_I2C1_IRQ, }, 15362004290fSPaul Walmsley }; 15372004290fSPaul Walmsley 15382004290fSPaul Walmsley static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { 15392004290fSPaul Walmsley { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, 15402004290fSPaul Walmsley { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, 15412004290fSPaul Walmsley }; 15422004290fSPaul Walmsley 15432004290fSPaul Walmsley static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = { 15442004290fSPaul Walmsley &omap2430_l4_core__i2c1, 15452004290fSPaul Walmsley }; 15462004290fSPaul Walmsley 15472004290fSPaul Walmsley static struct omap_hwmod omap2430_i2c1_hwmod = { 15482004290fSPaul Walmsley .name = "i2c1", 15492004290fSPaul Walmsley .mpu_irqs = i2c1_mpu_irqs, 15502004290fSPaul Walmsley .mpu_irqs_cnt = ARRAY_SIZE(i2c1_mpu_irqs), 15512004290fSPaul Walmsley .sdma_reqs = i2c1_sdma_reqs, 15522004290fSPaul Walmsley .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), 15532004290fSPaul Walmsley .main_clk = "i2chs1_fck", 15542004290fSPaul Walmsley .prcm = { 15552004290fSPaul Walmsley .omap2 = { 15562004290fSPaul Walmsley /* 15572004290fSPaul Walmsley * NOTE: The CM_FCLKEN* and CM_ICLKEN* for 15582004290fSPaul Walmsley * I2CHS IP's do not follow the usual pattern. 15592004290fSPaul Walmsley * prcm_reg_id alone cannot be used to program 15602004290fSPaul Walmsley * the iclk and fclk. Needs to be handled using 156125985edcSLucas De Marchi * additional flags when clk handling is moved 15622004290fSPaul Walmsley * to hwmod framework. 15632004290fSPaul Walmsley */ 15642004290fSPaul Walmsley .module_offs = CORE_MOD, 15652004290fSPaul Walmsley .prcm_reg_id = 1, 15662004290fSPaul Walmsley .module_bit = OMAP2430_EN_I2CHS1_SHIFT, 15672004290fSPaul Walmsley .idlest_reg_id = 1, 15682004290fSPaul Walmsley .idlest_idle_bit = OMAP2430_ST_I2CHS1_SHIFT, 15692004290fSPaul Walmsley }, 15702004290fSPaul Walmsley }, 15712004290fSPaul Walmsley .slaves = omap2430_i2c1_slaves, 15722004290fSPaul Walmsley .slaves_cnt = ARRAY_SIZE(omap2430_i2c1_slaves), 15732004290fSPaul Walmsley .class = &i2c_class, 157450ebb777SBenoit Cousson .dev_attr = &i2c_dev_attr, 15752004290fSPaul Walmsley .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 15762004290fSPaul Walmsley }; 15772004290fSPaul Walmsley 15782004290fSPaul Walmsley /* I2C2 */ 15792004290fSPaul Walmsley 15802004290fSPaul Walmsley static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { 15812004290fSPaul Walmsley { .irq = INT_24XX_I2C2_IRQ, }, 15822004290fSPaul Walmsley }; 15832004290fSPaul Walmsley 15842004290fSPaul Walmsley static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { 15852004290fSPaul Walmsley { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, 15862004290fSPaul Walmsley { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, 15872004290fSPaul Walmsley }; 15882004290fSPaul Walmsley 15892004290fSPaul Walmsley static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = { 15902004290fSPaul Walmsley &omap2430_l4_core__i2c2, 15912004290fSPaul Walmsley }; 15922004290fSPaul Walmsley 15932004290fSPaul Walmsley static struct omap_hwmod omap2430_i2c2_hwmod = { 15942004290fSPaul Walmsley .name = "i2c2", 15952004290fSPaul Walmsley .mpu_irqs = i2c2_mpu_irqs, 15962004290fSPaul Walmsley .mpu_irqs_cnt = ARRAY_SIZE(i2c2_mpu_irqs), 15972004290fSPaul Walmsley .sdma_reqs = i2c2_sdma_reqs, 15982004290fSPaul Walmsley .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), 15992004290fSPaul Walmsley .main_clk = "i2chs2_fck", 16002004290fSPaul Walmsley .prcm = { 16012004290fSPaul Walmsley .omap2 = { 16022004290fSPaul Walmsley .module_offs = CORE_MOD, 16032004290fSPaul Walmsley .prcm_reg_id = 1, 16042004290fSPaul Walmsley .module_bit = OMAP2430_EN_I2CHS2_SHIFT, 16052004290fSPaul Walmsley .idlest_reg_id = 1, 16062004290fSPaul Walmsley .idlest_idle_bit = OMAP2430_ST_I2CHS2_SHIFT, 16072004290fSPaul Walmsley }, 16082004290fSPaul Walmsley }, 16092004290fSPaul Walmsley .slaves = omap2430_i2c2_slaves, 16102004290fSPaul Walmsley .slaves_cnt = ARRAY_SIZE(omap2430_i2c2_slaves), 16112004290fSPaul Walmsley .class = &i2c_class, 161250ebb777SBenoit Cousson .dev_attr = &i2c_dev_attr, 16132004290fSPaul Walmsley .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 16142004290fSPaul Walmsley }; 16152004290fSPaul Walmsley 1616aeac0e44SVaradarajan, Charulatha /* l4_wkup -> gpio1 */ 1617aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_addr_space omap2430_gpio1_addr_space[] = { 1618aeac0e44SVaradarajan, Charulatha { 1619aeac0e44SVaradarajan, Charulatha .pa_start = 0x4900C000, 1620aeac0e44SVaradarajan, Charulatha .pa_end = 0x4900C1ff, 1621aeac0e44SVaradarajan, Charulatha .flags = ADDR_TYPE_RT 1622aeac0e44SVaradarajan, Charulatha }, 162378183f3fSPaul Walmsley { } 1624aeac0e44SVaradarajan, Charulatha }; 1625aeac0e44SVaradarajan, Charulatha 1626aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio1 = { 1627aeac0e44SVaradarajan, Charulatha .master = &omap2430_l4_wkup_hwmod, 1628aeac0e44SVaradarajan, Charulatha .slave = &omap2430_gpio1_hwmod, 1629aeac0e44SVaradarajan, Charulatha .clk = "gpios_ick", 1630aeac0e44SVaradarajan, Charulatha .addr = omap2430_gpio1_addr_space, 1631aeac0e44SVaradarajan, Charulatha .user = OCP_USER_MPU | OCP_USER_SDMA, 1632aeac0e44SVaradarajan, Charulatha }; 1633aeac0e44SVaradarajan, Charulatha 1634aeac0e44SVaradarajan, Charulatha /* l4_wkup -> gpio2 */ 1635aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_addr_space omap2430_gpio2_addr_space[] = { 1636aeac0e44SVaradarajan, Charulatha { 1637aeac0e44SVaradarajan, Charulatha .pa_start = 0x4900E000, 1638aeac0e44SVaradarajan, Charulatha .pa_end = 0x4900E1ff, 1639aeac0e44SVaradarajan, Charulatha .flags = ADDR_TYPE_RT 1640aeac0e44SVaradarajan, Charulatha }, 164178183f3fSPaul Walmsley { } 1642aeac0e44SVaradarajan, Charulatha }; 1643aeac0e44SVaradarajan, Charulatha 1644aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio2 = { 1645aeac0e44SVaradarajan, Charulatha .master = &omap2430_l4_wkup_hwmod, 1646aeac0e44SVaradarajan, Charulatha .slave = &omap2430_gpio2_hwmod, 1647aeac0e44SVaradarajan, Charulatha .clk = "gpios_ick", 1648aeac0e44SVaradarajan, Charulatha .addr = omap2430_gpio2_addr_space, 1649aeac0e44SVaradarajan, Charulatha .user = OCP_USER_MPU | OCP_USER_SDMA, 1650aeac0e44SVaradarajan, Charulatha }; 1651aeac0e44SVaradarajan, Charulatha 1652aeac0e44SVaradarajan, Charulatha /* l4_wkup -> gpio3 */ 1653aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_addr_space omap2430_gpio3_addr_space[] = { 1654aeac0e44SVaradarajan, Charulatha { 1655aeac0e44SVaradarajan, Charulatha .pa_start = 0x49010000, 1656aeac0e44SVaradarajan, Charulatha .pa_end = 0x490101ff, 1657aeac0e44SVaradarajan, Charulatha .flags = ADDR_TYPE_RT 1658aeac0e44SVaradarajan, Charulatha }, 165978183f3fSPaul Walmsley { } 1660aeac0e44SVaradarajan, Charulatha }; 1661aeac0e44SVaradarajan, Charulatha 1662aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio3 = { 1663aeac0e44SVaradarajan, Charulatha .master = &omap2430_l4_wkup_hwmod, 1664aeac0e44SVaradarajan, Charulatha .slave = &omap2430_gpio3_hwmod, 1665aeac0e44SVaradarajan, Charulatha .clk = "gpios_ick", 1666aeac0e44SVaradarajan, Charulatha .addr = omap2430_gpio3_addr_space, 1667aeac0e44SVaradarajan, Charulatha .user = OCP_USER_MPU | OCP_USER_SDMA, 1668aeac0e44SVaradarajan, Charulatha }; 1669aeac0e44SVaradarajan, Charulatha 1670aeac0e44SVaradarajan, Charulatha /* l4_wkup -> gpio4 */ 1671aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_addr_space omap2430_gpio4_addr_space[] = { 1672aeac0e44SVaradarajan, Charulatha { 1673aeac0e44SVaradarajan, Charulatha .pa_start = 0x49012000, 1674aeac0e44SVaradarajan, Charulatha .pa_end = 0x490121ff, 1675aeac0e44SVaradarajan, Charulatha .flags = ADDR_TYPE_RT 1676aeac0e44SVaradarajan, Charulatha }, 167778183f3fSPaul Walmsley { } 1678aeac0e44SVaradarajan, Charulatha }; 1679aeac0e44SVaradarajan, Charulatha 1680aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio4 = { 1681aeac0e44SVaradarajan, Charulatha .master = &omap2430_l4_wkup_hwmod, 1682aeac0e44SVaradarajan, Charulatha .slave = &omap2430_gpio4_hwmod, 1683aeac0e44SVaradarajan, Charulatha .clk = "gpios_ick", 1684aeac0e44SVaradarajan, Charulatha .addr = omap2430_gpio4_addr_space, 1685aeac0e44SVaradarajan, Charulatha .user = OCP_USER_MPU | OCP_USER_SDMA, 1686aeac0e44SVaradarajan, Charulatha }; 1687aeac0e44SVaradarajan, Charulatha 1688aeac0e44SVaradarajan, Charulatha /* l4_core -> gpio5 */ 1689aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_addr_space omap2430_gpio5_addr_space[] = { 1690aeac0e44SVaradarajan, Charulatha { 1691aeac0e44SVaradarajan, Charulatha .pa_start = 0x480B6000, 1692aeac0e44SVaradarajan, Charulatha .pa_end = 0x480B61ff, 1693aeac0e44SVaradarajan, Charulatha .flags = ADDR_TYPE_RT 1694aeac0e44SVaradarajan, Charulatha }, 169578183f3fSPaul Walmsley { } 1696aeac0e44SVaradarajan, Charulatha }; 1697aeac0e44SVaradarajan, Charulatha 1698aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_ocp_if omap2430_l4_core__gpio5 = { 1699aeac0e44SVaradarajan, Charulatha .master = &omap2430_l4_core_hwmod, 1700aeac0e44SVaradarajan, Charulatha .slave = &omap2430_gpio5_hwmod, 1701aeac0e44SVaradarajan, Charulatha .clk = "gpio5_ick", 1702aeac0e44SVaradarajan, Charulatha .addr = omap2430_gpio5_addr_space, 1703aeac0e44SVaradarajan, Charulatha .user = OCP_USER_MPU | OCP_USER_SDMA, 1704aeac0e44SVaradarajan, Charulatha }; 1705aeac0e44SVaradarajan, Charulatha 1706aeac0e44SVaradarajan, Charulatha /* gpio dev_attr */ 1707aeac0e44SVaradarajan, Charulatha static struct omap_gpio_dev_attr gpio_dev_attr = { 1708aeac0e44SVaradarajan, Charulatha .bank_width = 32, 1709aeac0e44SVaradarajan, Charulatha .dbck_flag = false, 1710aeac0e44SVaradarajan, Charulatha }; 1711aeac0e44SVaradarajan, Charulatha 1712aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_class_sysconfig omap243x_gpio_sysc = { 1713aeac0e44SVaradarajan, Charulatha .rev_offs = 0x0000, 1714aeac0e44SVaradarajan, Charulatha .sysc_offs = 0x0010, 1715aeac0e44SVaradarajan, Charulatha .syss_offs = 0x0014, 1716aeac0e44SVaradarajan, Charulatha .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE | 1717d73d65faSAvinash.H.M SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | 1718d73d65faSAvinash.H.M SYSS_HAS_RESET_STATUS), 1719aeac0e44SVaradarajan, Charulatha .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), 1720aeac0e44SVaradarajan, Charulatha .sysc_fields = &omap_hwmod_sysc_type1, 1721aeac0e44SVaradarajan, Charulatha }; 1722aeac0e44SVaradarajan, Charulatha 1723aeac0e44SVaradarajan, Charulatha /* 1724aeac0e44SVaradarajan, Charulatha * 'gpio' class 1725aeac0e44SVaradarajan, Charulatha * general purpose io module 1726aeac0e44SVaradarajan, Charulatha */ 1727aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_class omap243x_gpio_hwmod_class = { 1728aeac0e44SVaradarajan, Charulatha .name = "gpio", 1729aeac0e44SVaradarajan, Charulatha .sysc = &omap243x_gpio_sysc, 1730aeac0e44SVaradarajan, Charulatha .rev = 0, 1731aeac0e44SVaradarajan, Charulatha }; 1732aeac0e44SVaradarajan, Charulatha 1733aeac0e44SVaradarajan, Charulatha /* gpio1 */ 1734aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_irq_info omap243x_gpio1_irqs[] = { 1735aeac0e44SVaradarajan, Charulatha { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */ 1736aeac0e44SVaradarajan, Charulatha }; 1737aeac0e44SVaradarajan, Charulatha 1738aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = { 1739aeac0e44SVaradarajan, Charulatha &omap2430_l4_wkup__gpio1, 1740aeac0e44SVaradarajan, Charulatha }; 1741aeac0e44SVaradarajan, Charulatha 1742aeac0e44SVaradarajan, Charulatha static struct omap_hwmod omap2430_gpio1_hwmod = { 1743aeac0e44SVaradarajan, Charulatha .name = "gpio1", 1744f95440caSAvinash.H.M .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 1745aeac0e44SVaradarajan, Charulatha .mpu_irqs = omap243x_gpio1_irqs, 1746aeac0e44SVaradarajan, Charulatha .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio1_irqs), 1747aeac0e44SVaradarajan, Charulatha .main_clk = "gpios_fck", 1748aeac0e44SVaradarajan, Charulatha .prcm = { 1749aeac0e44SVaradarajan, Charulatha .omap2 = { 1750aeac0e44SVaradarajan, Charulatha .prcm_reg_id = 1, 1751aeac0e44SVaradarajan, Charulatha .module_bit = OMAP24XX_EN_GPIOS_SHIFT, 1752aeac0e44SVaradarajan, Charulatha .module_offs = WKUP_MOD, 1753aeac0e44SVaradarajan, Charulatha .idlest_reg_id = 1, 1754aeac0e44SVaradarajan, Charulatha .idlest_idle_bit = OMAP24XX_EN_GPIOS_SHIFT, 1755aeac0e44SVaradarajan, Charulatha }, 1756aeac0e44SVaradarajan, Charulatha }, 1757aeac0e44SVaradarajan, Charulatha .slaves = omap2430_gpio1_slaves, 1758aeac0e44SVaradarajan, Charulatha .slaves_cnt = ARRAY_SIZE(omap2430_gpio1_slaves), 1759aeac0e44SVaradarajan, Charulatha .class = &omap243x_gpio_hwmod_class, 1760aeac0e44SVaradarajan, Charulatha .dev_attr = &gpio_dev_attr, 1761aeac0e44SVaradarajan, Charulatha .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 1762aeac0e44SVaradarajan, Charulatha }; 1763aeac0e44SVaradarajan, Charulatha 1764aeac0e44SVaradarajan, Charulatha /* gpio2 */ 1765aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_irq_info omap243x_gpio2_irqs[] = { 1766aeac0e44SVaradarajan, Charulatha { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */ 1767aeac0e44SVaradarajan, Charulatha }; 1768aeac0e44SVaradarajan, Charulatha 1769aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_ocp_if *omap2430_gpio2_slaves[] = { 1770aeac0e44SVaradarajan, Charulatha &omap2430_l4_wkup__gpio2, 1771aeac0e44SVaradarajan, Charulatha }; 1772aeac0e44SVaradarajan, Charulatha 1773aeac0e44SVaradarajan, Charulatha static struct omap_hwmod omap2430_gpio2_hwmod = { 1774aeac0e44SVaradarajan, Charulatha .name = "gpio2", 1775f95440caSAvinash.H.M .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 1776aeac0e44SVaradarajan, Charulatha .mpu_irqs = omap243x_gpio2_irqs, 1777aeac0e44SVaradarajan, Charulatha .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio2_irqs), 1778aeac0e44SVaradarajan, Charulatha .main_clk = "gpios_fck", 1779aeac0e44SVaradarajan, Charulatha .prcm = { 1780aeac0e44SVaradarajan, Charulatha .omap2 = { 1781aeac0e44SVaradarajan, Charulatha .prcm_reg_id = 1, 1782aeac0e44SVaradarajan, Charulatha .module_bit = OMAP24XX_EN_GPIOS_SHIFT, 1783aeac0e44SVaradarajan, Charulatha .module_offs = WKUP_MOD, 1784aeac0e44SVaradarajan, Charulatha .idlest_reg_id = 1, 1785aeac0e44SVaradarajan, Charulatha .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT, 1786aeac0e44SVaradarajan, Charulatha }, 1787aeac0e44SVaradarajan, Charulatha }, 1788aeac0e44SVaradarajan, Charulatha .slaves = omap2430_gpio2_slaves, 1789aeac0e44SVaradarajan, Charulatha .slaves_cnt = ARRAY_SIZE(omap2430_gpio2_slaves), 1790aeac0e44SVaradarajan, Charulatha .class = &omap243x_gpio_hwmod_class, 1791aeac0e44SVaradarajan, Charulatha .dev_attr = &gpio_dev_attr, 1792aeac0e44SVaradarajan, Charulatha .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 1793aeac0e44SVaradarajan, Charulatha }; 1794aeac0e44SVaradarajan, Charulatha 1795aeac0e44SVaradarajan, Charulatha /* gpio3 */ 1796aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_irq_info omap243x_gpio3_irqs[] = { 1797aeac0e44SVaradarajan, Charulatha { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */ 1798aeac0e44SVaradarajan, Charulatha }; 1799aeac0e44SVaradarajan, Charulatha 1800aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_ocp_if *omap2430_gpio3_slaves[] = { 1801aeac0e44SVaradarajan, Charulatha &omap2430_l4_wkup__gpio3, 1802aeac0e44SVaradarajan, Charulatha }; 1803aeac0e44SVaradarajan, Charulatha 1804aeac0e44SVaradarajan, Charulatha static struct omap_hwmod omap2430_gpio3_hwmod = { 1805aeac0e44SVaradarajan, Charulatha .name = "gpio3", 1806f95440caSAvinash.H.M .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 1807aeac0e44SVaradarajan, Charulatha .mpu_irqs = omap243x_gpio3_irqs, 1808aeac0e44SVaradarajan, Charulatha .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio3_irqs), 1809aeac0e44SVaradarajan, Charulatha .main_clk = "gpios_fck", 1810aeac0e44SVaradarajan, Charulatha .prcm = { 1811aeac0e44SVaradarajan, Charulatha .omap2 = { 1812aeac0e44SVaradarajan, Charulatha .prcm_reg_id = 1, 1813aeac0e44SVaradarajan, Charulatha .module_bit = OMAP24XX_EN_GPIOS_SHIFT, 1814aeac0e44SVaradarajan, Charulatha .module_offs = WKUP_MOD, 1815aeac0e44SVaradarajan, Charulatha .idlest_reg_id = 1, 1816aeac0e44SVaradarajan, Charulatha .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT, 1817aeac0e44SVaradarajan, Charulatha }, 1818aeac0e44SVaradarajan, Charulatha }, 1819aeac0e44SVaradarajan, Charulatha .slaves = omap2430_gpio3_slaves, 1820aeac0e44SVaradarajan, Charulatha .slaves_cnt = ARRAY_SIZE(omap2430_gpio3_slaves), 1821aeac0e44SVaradarajan, Charulatha .class = &omap243x_gpio_hwmod_class, 1822aeac0e44SVaradarajan, Charulatha .dev_attr = &gpio_dev_attr, 1823aeac0e44SVaradarajan, Charulatha .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 1824aeac0e44SVaradarajan, Charulatha }; 1825aeac0e44SVaradarajan, Charulatha 1826aeac0e44SVaradarajan, Charulatha /* gpio4 */ 1827aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_irq_info omap243x_gpio4_irqs[] = { 1828aeac0e44SVaradarajan, Charulatha { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */ 1829aeac0e44SVaradarajan, Charulatha }; 1830aeac0e44SVaradarajan, Charulatha 1831aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_ocp_if *omap2430_gpio4_slaves[] = { 1832aeac0e44SVaradarajan, Charulatha &omap2430_l4_wkup__gpio4, 1833aeac0e44SVaradarajan, Charulatha }; 1834aeac0e44SVaradarajan, Charulatha 1835aeac0e44SVaradarajan, Charulatha static struct omap_hwmod omap2430_gpio4_hwmod = { 1836aeac0e44SVaradarajan, Charulatha .name = "gpio4", 1837f95440caSAvinash.H.M .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 1838aeac0e44SVaradarajan, Charulatha .mpu_irqs = omap243x_gpio4_irqs, 1839aeac0e44SVaradarajan, Charulatha .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio4_irqs), 1840aeac0e44SVaradarajan, Charulatha .main_clk = "gpios_fck", 1841aeac0e44SVaradarajan, Charulatha .prcm = { 1842aeac0e44SVaradarajan, Charulatha .omap2 = { 1843aeac0e44SVaradarajan, Charulatha .prcm_reg_id = 1, 1844aeac0e44SVaradarajan, Charulatha .module_bit = OMAP24XX_EN_GPIOS_SHIFT, 1845aeac0e44SVaradarajan, Charulatha .module_offs = WKUP_MOD, 1846aeac0e44SVaradarajan, Charulatha .idlest_reg_id = 1, 1847aeac0e44SVaradarajan, Charulatha .idlest_idle_bit = OMAP24XX_ST_GPIOS_SHIFT, 1848aeac0e44SVaradarajan, Charulatha }, 1849aeac0e44SVaradarajan, Charulatha }, 1850aeac0e44SVaradarajan, Charulatha .slaves = omap2430_gpio4_slaves, 1851aeac0e44SVaradarajan, Charulatha .slaves_cnt = ARRAY_SIZE(omap2430_gpio4_slaves), 1852aeac0e44SVaradarajan, Charulatha .class = &omap243x_gpio_hwmod_class, 1853aeac0e44SVaradarajan, Charulatha .dev_attr = &gpio_dev_attr, 1854aeac0e44SVaradarajan, Charulatha .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 1855aeac0e44SVaradarajan, Charulatha }; 1856aeac0e44SVaradarajan, Charulatha 1857aeac0e44SVaradarajan, Charulatha /* gpio5 */ 1858aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_irq_info omap243x_gpio5_irqs[] = { 1859aeac0e44SVaradarajan, Charulatha { .irq = 33 }, /* INT_24XX_GPIO_BANK5 */ 1860aeac0e44SVaradarajan, Charulatha }; 1861aeac0e44SVaradarajan, Charulatha 1862aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_ocp_if *omap2430_gpio5_slaves[] = { 1863aeac0e44SVaradarajan, Charulatha &omap2430_l4_core__gpio5, 1864aeac0e44SVaradarajan, Charulatha }; 1865aeac0e44SVaradarajan, Charulatha 1866aeac0e44SVaradarajan, Charulatha static struct omap_hwmod omap2430_gpio5_hwmod = { 1867aeac0e44SVaradarajan, Charulatha .name = "gpio5", 1868f95440caSAvinash.H.M .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 1869aeac0e44SVaradarajan, Charulatha .mpu_irqs = omap243x_gpio5_irqs, 1870aeac0e44SVaradarajan, Charulatha .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio5_irqs), 1871aeac0e44SVaradarajan, Charulatha .main_clk = "gpio5_fck", 1872aeac0e44SVaradarajan, Charulatha .prcm = { 1873aeac0e44SVaradarajan, Charulatha .omap2 = { 1874aeac0e44SVaradarajan, Charulatha .prcm_reg_id = 2, 1875aeac0e44SVaradarajan, Charulatha .module_bit = OMAP2430_EN_GPIO5_SHIFT, 1876aeac0e44SVaradarajan, Charulatha .module_offs = CORE_MOD, 1877aeac0e44SVaradarajan, Charulatha .idlest_reg_id = 2, 1878aeac0e44SVaradarajan, Charulatha .idlest_idle_bit = OMAP2430_ST_GPIO5_SHIFT, 1879aeac0e44SVaradarajan, Charulatha }, 1880aeac0e44SVaradarajan, Charulatha }, 1881aeac0e44SVaradarajan, Charulatha .slaves = omap2430_gpio5_slaves, 1882aeac0e44SVaradarajan, Charulatha .slaves_cnt = ARRAY_SIZE(omap2430_gpio5_slaves), 1883aeac0e44SVaradarajan, Charulatha .class = &omap243x_gpio_hwmod_class, 1884aeac0e44SVaradarajan, Charulatha .dev_attr = &gpio_dev_attr, 1885aeac0e44SVaradarajan, Charulatha .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 1886aeac0e44SVaradarajan, Charulatha }; 1887aeac0e44SVaradarajan, Charulatha 188882cbd1aeSG, Manjunath Kondaiah /* dma_system */ 188982cbd1aeSG, Manjunath Kondaiah static struct omap_hwmod_class_sysconfig omap2430_dma_sysc = { 189082cbd1aeSG, Manjunath Kondaiah .rev_offs = 0x0000, 189182cbd1aeSG, Manjunath Kondaiah .sysc_offs = 0x002c, 189282cbd1aeSG, Manjunath Kondaiah .syss_offs = 0x0028, 189382cbd1aeSG, Manjunath Kondaiah .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE | 189482cbd1aeSG, Manjunath Kondaiah SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE | 1895d73d65faSAvinash.H.M SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), 189682cbd1aeSG, Manjunath Kondaiah .idlemodes = (MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), 189782cbd1aeSG, Manjunath Kondaiah .sysc_fields = &omap_hwmod_sysc_type1, 189882cbd1aeSG, Manjunath Kondaiah }; 189982cbd1aeSG, Manjunath Kondaiah 190082cbd1aeSG, Manjunath Kondaiah static struct omap_hwmod_class omap2430_dma_hwmod_class = { 190182cbd1aeSG, Manjunath Kondaiah .name = "dma", 190282cbd1aeSG, Manjunath Kondaiah .sysc = &omap2430_dma_sysc, 190382cbd1aeSG, Manjunath Kondaiah }; 190482cbd1aeSG, Manjunath Kondaiah 190582cbd1aeSG, Manjunath Kondaiah /* dma attributes */ 190682cbd1aeSG, Manjunath Kondaiah static struct omap_dma_dev_attr dma_dev_attr = { 190782cbd1aeSG, Manjunath Kondaiah .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY | 190882cbd1aeSG, Manjunath Kondaiah IS_CSSA_32 | IS_CDSA_32 | IS_RW_PRIORITY, 190982cbd1aeSG, Manjunath Kondaiah .lch_count = 32, 191082cbd1aeSG, Manjunath Kondaiah }; 191182cbd1aeSG, Manjunath Kondaiah 191282cbd1aeSG, Manjunath Kondaiah static struct omap_hwmod_irq_info omap2430_dma_system_irqs[] = { 191382cbd1aeSG, Manjunath Kondaiah { .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */ 191482cbd1aeSG, Manjunath Kondaiah { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ 191582cbd1aeSG, Manjunath Kondaiah { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ 191682cbd1aeSG, Manjunath Kondaiah { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ 191782cbd1aeSG, Manjunath Kondaiah }; 191882cbd1aeSG, Manjunath Kondaiah 191982cbd1aeSG, Manjunath Kondaiah static struct omap_hwmod_addr_space omap2430_dma_system_addrs[] = { 192082cbd1aeSG, Manjunath Kondaiah { 192182cbd1aeSG, Manjunath Kondaiah .pa_start = 0x48056000, 19221286eeb2SBenoit Cousson .pa_end = 0x48056fff, 192382cbd1aeSG, Manjunath Kondaiah .flags = ADDR_TYPE_RT 192482cbd1aeSG, Manjunath Kondaiah }, 192578183f3fSPaul Walmsley { } 192682cbd1aeSG, Manjunath Kondaiah }; 192782cbd1aeSG, Manjunath Kondaiah 192882cbd1aeSG, Manjunath Kondaiah /* dma_system -> L3 */ 192982cbd1aeSG, Manjunath Kondaiah static struct omap_hwmod_ocp_if omap2430_dma_system__l3 = { 193082cbd1aeSG, Manjunath Kondaiah .master = &omap2430_dma_system_hwmod, 193182cbd1aeSG, Manjunath Kondaiah .slave = &omap2430_l3_main_hwmod, 193282cbd1aeSG, Manjunath Kondaiah .clk = "core_l3_ck", 193382cbd1aeSG, Manjunath Kondaiah .user = OCP_USER_MPU | OCP_USER_SDMA, 193482cbd1aeSG, Manjunath Kondaiah }; 193582cbd1aeSG, Manjunath Kondaiah 193682cbd1aeSG, Manjunath Kondaiah /* dma_system master ports */ 193782cbd1aeSG, Manjunath Kondaiah static struct omap_hwmod_ocp_if *omap2430_dma_system_masters[] = { 193882cbd1aeSG, Manjunath Kondaiah &omap2430_dma_system__l3, 193982cbd1aeSG, Manjunath Kondaiah }; 194082cbd1aeSG, Manjunath Kondaiah 194182cbd1aeSG, Manjunath Kondaiah /* l4_core -> dma_system */ 194282cbd1aeSG, Manjunath Kondaiah static struct omap_hwmod_ocp_if omap2430_l4_core__dma_system = { 194382cbd1aeSG, Manjunath Kondaiah .master = &omap2430_l4_core_hwmod, 194482cbd1aeSG, Manjunath Kondaiah .slave = &omap2430_dma_system_hwmod, 194582cbd1aeSG, Manjunath Kondaiah .clk = "sdma_ick", 194682cbd1aeSG, Manjunath Kondaiah .addr = omap2430_dma_system_addrs, 194782cbd1aeSG, Manjunath Kondaiah .user = OCP_USER_MPU | OCP_USER_SDMA, 194882cbd1aeSG, Manjunath Kondaiah }; 194982cbd1aeSG, Manjunath Kondaiah 195082cbd1aeSG, Manjunath Kondaiah /* dma_system slave ports */ 195182cbd1aeSG, Manjunath Kondaiah static struct omap_hwmod_ocp_if *omap2430_dma_system_slaves[] = { 195282cbd1aeSG, Manjunath Kondaiah &omap2430_l4_core__dma_system, 195382cbd1aeSG, Manjunath Kondaiah }; 195482cbd1aeSG, Manjunath Kondaiah 195582cbd1aeSG, Manjunath Kondaiah static struct omap_hwmod omap2430_dma_system_hwmod = { 195682cbd1aeSG, Manjunath Kondaiah .name = "dma", 195782cbd1aeSG, Manjunath Kondaiah .class = &omap2430_dma_hwmod_class, 195882cbd1aeSG, Manjunath Kondaiah .mpu_irqs = omap2430_dma_system_irqs, 195982cbd1aeSG, Manjunath Kondaiah .mpu_irqs_cnt = ARRAY_SIZE(omap2430_dma_system_irqs), 196082cbd1aeSG, Manjunath Kondaiah .main_clk = "core_l3_ck", 196182cbd1aeSG, Manjunath Kondaiah .slaves = omap2430_dma_system_slaves, 196282cbd1aeSG, Manjunath Kondaiah .slaves_cnt = ARRAY_SIZE(omap2430_dma_system_slaves), 196382cbd1aeSG, Manjunath Kondaiah .masters = omap2430_dma_system_masters, 196482cbd1aeSG, Manjunath Kondaiah .masters_cnt = ARRAY_SIZE(omap2430_dma_system_masters), 196582cbd1aeSG, Manjunath Kondaiah .dev_attr = &dma_dev_attr, 196682cbd1aeSG, Manjunath Kondaiah .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 196782cbd1aeSG, Manjunath Kondaiah .flags = HWMOD_NO_IDLEST, 196882cbd1aeSG, Manjunath Kondaiah }; 196982cbd1aeSG, Manjunath Kondaiah 19707f904c78SCharulatha V /* 1971fca1ab55SOmar Ramirez Luna * 'mailbox' class 1972fca1ab55SOmar Ramirez Luna * mailbox module allowing communication between the on-chip processors 1973fca1ab55SOmar Ramirez Luna * using a queued mailbox-interrupt mechanism. 1974fca1ab55SOmar Ramirez Luna */ 1975fca1ab55SOmar Ramirez Luna 1976fca1ab55SOmar Ramirez Luna static struct omap_hwmod_class_sysconfig omap2430_mailbox_sysc = { 1977fca1ab55SOmar Ramirez Luna .rev_offs = 0x000, 1978fca1ab55SOmar Ramirez Luna .sysc_offs = 0x010, 1979fca1ab55SOmar Ramirez Luna .syss_offs = 0x014, 1980fca1ab55SOmar Ramirez Luna .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | 1981fca1ab55SOmar Ramirez Luna SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), 1982fca1ab55SOmar Ramirez Luna .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), 1983fca1ab55SOmar Ramirez Luna .sysc_fields = &omap_hwmod_sysc_type1, 1984fca1ab55SOmar Ramirez Luna }; 1985fca1ab55SOmar Ramirez Luna 1986fca1ab55SOmar Ramirez Luna static struct omap_hwmod_class omap2430_mailbox_hwmod_class = { 1987fca1ab55SOmar Ramirez Luna .name = "mailbox", 1988fca1ab55SOmar Ramirez Luna .sysc = &omap2430_mailbox_sysc, 1989fca1ab55SOmar Ramirez Luna }; 1990fca1ab55SOmar Ramirez Luna 1991fca1ab55SOmar Ramirez Luna /* mailbox */ 1992fca1ab55SOmar Ramirez Luna static struct omap_hwmod omap2430_mailbox_hwmod; 1993fca1ab55SOmar Ramirez Luna static struct omap_hwmod_irq_info omap2430_mailbox_irqs[] = { 1994fca1ab55SOmar Ramirez Luna { .irq = 26 }, 1995fca1ab55SOmar Ramirez Luna }; 1996fca1ab55SOmar Ramirez Luna 1997fca1ab55SOmar Ramirez Luna static struct omap_hwmod_addr_space omap2430_mailbox_addrs[] = { 1998fca1ab55SOmar Ramirez Luna { 1999fca1ab55SOmar Ramirez Luna .pa_start = 0x48094000, 2000fca1ab55SOmar Ramirez Luna .pa_end = 0x480941ff, 2001fca1ab55SOmar Ramirez Luna .flags = ADDR_TYPE_RT, 2002fca1ab55SOmar Ramirez Luna }, 200378183f3fSPaul Walmsley { } 2004fca1ab55SOmar Ramirez Luna }; 2005fca1ab55SOmar Ramirez Luna 2006fca1ab55SOmar Ramirez Luna /* l4_core -> mailbox */ 2007fca1ab55SOmar Ramirez Luna static struct omap_hwmod_ocp_if omap2430_l4_core__mailbox = { 2008fca1ab55SOmar Ramirez Luna .master = &omap2430_l4_core_hwmod, 2009fca1ab55SOmar Ramirez Luna .slave = &omap2430_mailbox_hwmod, 2010fca1ab55SOmar Ramirez Luna .addr = omap2430_mailbox_addrs, 2011fca1ab55SOmar Ramirez Luna .user = OCP_USER_MPU | OCP_USER_SDMA, 2012fca1ab55SOmar Ramirez Luna }; 2013fca1ab55SOmar Ramirez Luna 2014fca1ab55SOmar Ramirez Luna /* mailbox slave ports */ 2015fca1ab55SOmar Ramirez Luna static struct omap_hwmod_ocp_if *omap2430_mailbox_slaves[] = { 2016fca1ab55SOmar Ramirez Luna &omap2430_l4_core__mailbox, 2017fca1ab55SOmar Ramirez Luna }; 2018fca1ab55SOmar Ramirez Luna 2019fca1ab55SOmar Ramirez Luna static struct omap_hwmod omap2430_mailbox_hwmod = { 2020fca1ab55SOmar Ramirez Luna .name = "mailbox", 2021fca1ab55SOmar Ramirez Luna .class = &omap2430_mailbox_hwmod_class, 2022fca1ab55SOmar Ramirez Luna .mpu_irqs = omap2430_mailbox_irqs, 2023fca1ab55SOmar Ramirez Luna .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mailbox_irqs), 2024fca1ab55SOmar Ramirez Luna .main_clk = "mailboxes_ick", 2025fca1ab55SOmar Ramirez Luna .prcm = { 2026fca1ab55SOmar Ramirez Luna .omap2 = { 2027fca1ab55SOmar Ramirez Luna .prcm_reg_id = 1, 2028fca1ab55SOmar Ramirez Luna .module_bit = OMAP24XX_EN_MAILBOXES_SHIFT, 2029fca1ab55SOmar Ramirez Luna .module_offs = CORE_MOD, 2030fca1ab55SOmar Ramirez Luna .idlest_reg_id = 1, 2031fca1ab55SOmar Ramirez Luna .idlest_idle_bit = OMAP24XX_ST_MAILBOXES_SHIFT, 2032fca1ab55SOmar Ramirez Luna }, 2033fca1ab55SOmar Ramirez Luna }, 2034fca1ab55SOmar Ramirez Luna .slaves = omap2430_mailbox_slaves, 2035fca1ab55SOmar Ramirez Luna .slaves_cnt = ARRAY_SIZE(omap2430_mailbox_slaves), 2036fca1ab55SOmar Ramirez Luna .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 2037fca1ab55SOmar Ramirez Luna }; 2038fca1ab55SOmar Ramirez Luna 2039fca1ab55SOmar Ramirez Luna /* 20407f904c78SCharulatha V * 'mcspi' class 20417f904c78SCharulatha V * multichannel serial port interface (mcspi) / master/slave synchronous serial 20427f904c78SCharulatha V * bus 20437f904c78SCharulatha V */ 20447f904c78SCharulatha V 20457f904c78SCharulatha V static struct omap_hwmod_class_sysconfig omap2430_mcspi_sysc = { 20467f904c78SCharulatha V .rev_offs = 0x0000, 20477f904c78SCharulatha V .sysc_offs = 0x0010, 20487f904c78SCharulatha V .syss_offs = 0x0014, 20497f904c78SCharulatha V .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | 20507f904c78SCharulatha V SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | 20517f904c78SCharulatha V SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), 20527f904c78SCharulatha V .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), 20537f904c78SCharulatha V .sysc_fields = &omap_hwmod_sysc_type1, 20547f904c78SCharulatha V }; 20557f904c78SCharulatha V 20567f904c78SCharulatha V static struct omap_hwmod_class omap2430_mcspi_class = { 20577f904c78SCharulatha V .name = "mcspi", 20587f904c78SCharulatha V .sysc = &omap2430_mcspi_sysc, 20597f904c78SCharulatha V .rev = OMAP2_MCSPI_REV, 20607f904c78SCharulatha V }; 20617f904c78SCharulatha V 20627f904c78SCharulatha V /* mcspi1 */ 20637f904c78SCharulatha V static struct omap_hwmod_irq_info omap2430_mcspi1_mpu_irqs[] = { 20647f904c78SCharulatha V { .irq = 65 }, 20657f904c78SCharulatha V }; 20667f904c78SCharulatha V 20677f904c78SCharulatha V static struct omap_hwmod_dma_info omap2430_mcspi1_sdma_reqs[] = { 20687f904c78SCharulatha V { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ 20697f904c78SCharulatha V { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ 20707f904c78SCharulatha V { .name = "tx1", .dma_req = 37 }, /* DMA_SPI1_TX1 */ 20717f904c78SCharulatha V { .name = "rx1", .dma_req = 38 }, /* DMA_SPI1_RX1 */ 20727f904c78SCharulatha V { .name = "tx2", .dma_req = 39 }, /* DMA_SPI1_TX2 */ 20737f904c78SCharulatha V { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ 20747f904c78SCharulatha V { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ 20757f904c78SCharulatha V { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ 20767f904c78SCharulatha V }; 20777f904c78SCharulatha V 20787f904c78SCharulatha V static struct omap_hwmod_ocp_if *omap2430_mcspi1_slaves[] = { 20797f904c78SCharulatha V &omap2430_l4_core__mcspi1, 20807f904c78SCharulatha V }; 20817f904c78SCharulatha V 20827f904c78SCharulatha V static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { 20837f904c78SCharulatha V .num_chipselect = 4, 20847f904c78SCharulatha V }; 20857f904c78SCharulatha V 20867f904c78SCharulatha V static struct omap_hwmod omap2430_mcspi1_hwmod = { 20877f904c78SCharulatha V .name = "mcspi1_hwmod", 20887f904c78SCharulatha V .mpu_irqs = omap2430_mcspi1_mpu_irqs, 20897f904c78SCharulatha V .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcspi1_mpu_irqs), 20907f904c78SCharulatha V .sdma_reqs = omap2430_mcspi1_sdma_reqs, 20917f904c78SCharulatha V .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi1_sdma_reqs), 20927f904c78SCharulatha V .main_clk = "mcspi1_fck", 20937f904c78SCharulatha V .prcm = { 20947f904c78SCharulatha V .omap2 = { 20957f904c78SCharulatha V .module_offs = CORE_MOD, 20967f904c78SCharulatha V .prcm_reg_id = 1, 20977f904c78SCharulatha V .module_bit = OMAP24XX_EN_MCSPI1_SHIFT, 20987f904c78SCharulatha V .idlest_reg_id = 1, 20997f904c78SCharulatha V .idlest_idle_bit = OMAP24XX_ST_MCSPI1_SHIFT, 21007f904c78SCharulatha V }, 21017f904c78SCharulatha V }, 21027f904c78SCharulatha V .slaves = omap2430_mcspi1_slaves, 21037f904c78SCharulatha V .slaves_cnt = ARRAY_SIZE(omap2430_mcspi1_slaves), 21047f904c78SCharulatha V .class = &omap2430_mcspi_class, 21057f904c78SCharulatha V .dev_attr = &omap_mcspi1_dev_attr, 21067f904c78SCharulatha V .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 21077f904c78SCharulatha V }; 21087f904c78SCharulatha V 21097f904c78SCharulatha V /* mcspi2 */ 21107f904c78SCharulatha V static struct omap_hwmod_irq_info omap2430_mcspi2_mpu_irqs[] = { 21117f904c78SCharulatha V { .irq = 66 }, 21127f904c78SCharulatha V }; 21137f904c78SCharulatha V 21147f904c78SCharulatha V static struct omap_hwmod_dma_info omap2430_mcspi2_sdma_reqs[] = { 21157f904c78SCharulatha V { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ 21167f904c78SCharulatha V { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ 21177f904c78SCharulatha V { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ 21187f904c78SCharulatha V { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ 21197f904c78SCharulatha V }; 21207f904c78SCharulatha V 21217f904c78SCharulatha V static struct omap_hwmod_ocp_if *omap2430_mcspi2_slaves[] = { 21227f904c78SCharulatha V &omap2430_l4_core__mcspi2, 21237f904c78SCharulatha V }; 21247f904c78SCharulatha V 21257f904c78SCharulatha V static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { 21267f904c78SCharulatha V .num_chipselect = 2, 21277f904c78SCharulatha V }; 21287f904c78SCharulatha V 21297f904c78SCharulatha V static struct omap_hwmod omap2430_mcspi2_hwmod = { 21307f904c78SCharulatha V .name = "mcspi2_hwmod", 21317f904c78SCharulatha V .mpu_irqs = omap2430_mcspi2_mpu_irqs, 21327f904c78SCharulatha V .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcspi2_mpu_irqs), 21337f904c78SCharulatha V .sdma_reqs = omap2430_mcspi2_sdma_reqs, 21347f904c78SCharulatha V .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi2_sdma_reqs), 21357f904c78SCharulatha V .main_clk = "mcspi2_fck", 21367f904c78SCharulatha V .prcm = { 21377f904c78SCharulatha V .omap2 = { 21387f904c78SCharulatha V .module_offs = CORE_MOD, 21397f904c78SCharulatha V .prcm_reg_id = 1, 21407f904c78SCharulatha V .module_bit = OMAP24XX_EN_MCSPI2_SHIFT, 21417f904c78SCharulatha V .idlest_reg_id = 1, 21427f904c78SCharulatha V .idlest_idle_bit = OMAP24XX_ST_MCSPI2_SHIFT, 21437f904c78SCharulatha V }, 21447f904c78SCharulatha V }, 21457f904c78SCharulatha V .slaves = omap2430_mcspi2_slaves, 21467f904c78SCharulatha V .slaves_cnt = ARRAY_SIZE(omap2430_mcspi2_slaves), 21477f904c78SCharulatha V .class = &omap2430_mcspi_class, 21487f904c78SCharulatha V .dev_attr = &omap_mcspi2_dev_attr, 21497f904c78SCharulatha V .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 21507f904c78SCharulatha V }; 21517f904c78SCharulatha V 21527f904c78SCharulatha V /* mcspi3 */ 21537f904c78SCharulatha V static struct omap_hwmod_irq_info omap2430_mcspi3_mpu_irqs[] = { 21547f904c78SCharulatha V { .irq = 91 }, 21557f904c78SCharulatha V }; 21567f904c78SCharulatha V 21577f904c78SCharulatha V static struct omap_hwmod_dma_info omap2430_mcspi3_sdma_reqs[] = { 21587f904c78SCharulatha V { .name = "tx0", .dma_req = 15 }, /* DMA_SPI3_TX0 */ 21597f904c78SCharulatha V { .name = "rx0", .dma_req = 16 }, /* DMA_SPI3_RX0 */ 21607f904c78SCharulatha V { .name = "tx1", .dma_req = 23 }, /* DMA_SPI3_TX1 */ 21617f904c78SCharulatha V { .name = "rx1", .dma_req = 24 }, /* DMA_SPI3_RX1 */ 21627f904c78SCharulatha V }; 21637f904c78SCharulatha V 21647f904c78SCharulatha V static struct omap_hwmod_ocp_if *omap2430_mcspi3_slaves[] = { 21657f904c78SCharulatha V &omap2430_l4_core__mcspi3, 21667f904c78SCharulatha V }; 21677f904c78SCharulatha V 21687f904c78SCharulatha V static struct omap2_mcspi_dev_attr omap_mcspi3_dev_attr = { 21697f904c78SCharulatha V .num_chipselect = 2, 21707f904c78SCharulatha V }; 21717f904c78SCharulatha V 21727f904c78SCharulatha V static struct omap_hwmod omap2430_mcspi3_hwmod = { 21737f904c78SCharulatha V .name = "mcspi3_hwmod", 21747f904c78SCharulatha V .mpu_irqs = omap2430_mcspi3_mpu_irqs, 21757f904c78SCharulatha V .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcspi3_mpu_irqs), 21767f904c78SCharulatha V .sdma_reqs = omap2430_mcspi3_sdma_reqs, 21777f904c78SCharulatha V .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi3_sdma_reqs), 21787f904c78SCharulatha V .main_clk = "mcspi3_fck", 21797f904c78SCharulatha V .prcm = { 21807f904c78SCharulatha V .omap2 = { 21817f904c78SCharulatha V .module_offs = CORE_MOD, 21827f904c78SCharulatha V .prcm_reg_id = 2, 21837f904c78SCharulatha V .module_bit = OMAP2430_EN_MCSPI3_SHIFT, 21847f904c78SCharulatha V .idlest_reg_id = 2, 21857f904c78SCharulatha V .idlest_idle_bit = OMAP2430_ST_MCSPI3_SHIFT, 21867f904c78SCharulatha V }, 21877f904c78SCharulatha V }, 21887f904c78SCharulatha V .slaves = omap2430_mcspi3_slaves, 21897f904c78SCharulatha V .slaves_cnt = ARRAY_SIZE(omap2430_mcspi3_slaves), 21907f904c78SCharulatha V .class = &omap2430_mcspi_class, 21917f904c78SCharulatha V .dev_attr = &omap_mcspi3_dev_attr, 21927f904c78SCharulatha V .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 21937f904c78SCharulatha V }; 21947f904c78SCharulatha V 219504aa67deSTony Lindgren /* 219644d02acfSHema HK * usbhsotg 219744d02acfSHema HK */ 219844d02acfSHema HK static struct omap_hwmod_class_sysconfig omap2430_usbhsotg_sysc = { 219944d02acfSHema HK .rev_offs = 0x0400, 220044d02acfSHema HK .sysc_offs = 0x0404, 220144d02acfSHema HK .syss_offs = 0x0408, 220244d02acfSHema HK .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE| 220344d02acfSHema HK SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | 220444d02acfSHema HK SYSC_HAS_AUTOIDLE), 220544d02acfSHema HK .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | 220644d02acfSHema HK MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), 220744d02acfSHema HK .sysc_fields = &omap_hwmod_sysc_type1, 220844d02acfSHema HK }; 220944d02acfSHema HK 221044d02acfSHema HK static struct omap_hwmod_class usbotg_class = { 221144d02acfSHema HK .name = "usbotg", 221244d02acfSHema HK .sysc = &omap2430_usbhsotg_sysc, 221344d02acfSHema HK }; 221444d02acfSHema HK 221544d02acfSHema HK /* usb_otg_hs */ 221644d02acfSHema HK static struct omap_hwmod_irq_info omap2430_usbhsotg_mpu_irqs[] = { 221744d02acfSHema HK 221844d02acfSHema HK { .name = "mc", .irq = 92 }, 221944d02acfSHema HK { .name = "dma", .irq = 93 }, 222044d02acfSHema HK }; 222144d02acfSHema HK 222244d02acfSHema HK static struct omap_hwmod omap2430_usbhsotg_hwmod = { 222344d02acfSHema HK .name = "usb_otg_hs", 222444d02acfSHema HK .mpu_irqs = omap2430_usbhsotg_mpu_irqs, 222544d02acfSHema HK .mpu_irqs_cnt = ARRAY_SIZE(omap2430_usbhsotg_mpu_irqs), 222644d02acfSHema HK .main_clk = "usbhs_ick", 222744d02acfSHema HK .prcm = { 222844d02acfSHema HK .omap2 = { 222944d02acfSHema HK .prcm_reg_id = 1, 223044d02acfSHema HK .module_bit = OMAP2430_EN_USBHS_MASK, 223144d02acfSHema HK .module_offs = CORE_MOD, 223244d02acfSHema HK .idlest_reg_id = 1, 223344d02acfSHema HK .idlest_idle_bit = OMAP2430_ST_USBHS_SHIFT, 223444d02acfSHema HK }, 223544d02acfSHema HK }, 223644d02acfSHema HK .masters = omap2430_usbhsotg_masters, 223744d02acfSHema HK .masters_cnt = ARRAY_SIZE(omap2430_usbhsotg_masters), 223844d02acfSHema HK .slaves = omap2430_usbhsotg_slaves, 223944d02acfSHema HK .slaves_cnt = ARRAY_SIZE(omap2430_usbhsotg_slaves), 224044d02acfSHema HK .class = &usbotg_class, 224144d02acfSHema HK /* 224244d02acfSHema HK * Erratum ID: i479 idle_req / idle_ack mechanism potentially 224344d02acfSHema HK * broken when autoidle is enabled 224444d02acfSHema HK * workaround is to disable the autoidle bit at module level. 224544d02acfSHema HK */ 224644d02acfSHema HK .flags = HWMOD_NO_OCP_AUTOIDLE | HWMOD_SWSUP_SIDLE 224744d02acfSHema HK | HWMOD_SWSUP_MSTANDBY, 224844d02acfSHema HK .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) 224944d02acfSHema HK }; 225044d02acfSHema HK 225137801b3dSCharulatha V /* 225237801b3dSCharulatha V * 'mcbsp' class 225337801b3dSCharulatha V * multi channel buffered serial port controller 225437801b3dSCharulatha V */ 225504aa67deSTony Lindgren 225637801b3dSCharulatha V static struct omap_hwmod_class_sysconfig omap2430_mcbsp_sysc = { 225737801b3dSCharulatha V .rev_offs = 0x007C, 225837801b3dSCharulatha V .sysc_offs = 0x008C, 225937801b3dSCharulatha V .sysc_flags = (SYSC_HAS_SOFTRESET), 226037801b3dSCharulatha V .sysc_fields = &omap_hwmod_sysc_type1, 226137801b3dSCharulatha V }; 226237801b3dSCharulatha V 226337801b3dSCharulatha V static struct omap_hwmod_class omap2430_mcbsp_hwmod_class = { 226437801b3dSCharulatha V .name = "mcbsp", 226537801b3dSCharulatha V .sysc = &omap2430_mcbsp_sysc, 226637801b3dSCharulatha V .rev = MCBSP_CONFIG_TYPE2, 226737801b3dSCharulatha V }; 226837801b3dSCharulatha V 226937801b3dSCharulatha V /* mcbsp1 */ 227037801b3dSCharulatha V static struct omap_hwmod_irq_info omap2430_mcbsp1_irqs[] = { 227137801b3dSCharulatha V { .name = "tx", .irq = 59 }, 227237801b3dSCharulatha V { .name = "rx", .irq = 60 }, 227337801b3dSCharulatha V { .name = "ovr", .irq = 61 }, 227437801b3dSCharulatha V { .name = "common", .irq = 64 }, 227537801b3dSCharulatha V }; 227637801b3dSCharulatha V 227737801b3dSCharulatha V static struct omap_hwmod_dma_info omap2430_mcbsp1_sdma_chs[] = { 227837801b3dSCharulatha V { .name = "rx", .dma_req = 32 }, 227937801b3dSCharulatha V { .name = "tx", .dma_req = 31 }, 228037801b3dSCharulatha V }; 228137801b3dSCharulatha V 228237801b3dSCharulatha V static struct omap_hwmod_addr_space omap2430_mcbsp1_addrs[] = { 228337801b3dSCharulatha V { 228437801b3dSCharulatha V .name = "mpu", 228537801b3dSCharulatha V .pa_start = 0x48074000, 228637801b3dSCharulatha V .pa_end = 0x480740ff, 228737801b3dSCharulatha V .flags = ADDR_TYPE_RT 228837801b3dSCharulatha V }, 228978183f3fSPaul Walmsley { } 229037801b3dSCharulatha V }; 229137801b3dSCharulatha V 229237801b3dSCharulatha V /* l4_core -> mcbsp1 */ 229337801b3dSCharulatha V static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp1 = { 229437801b3dSCharulatha V .master = &omap2430_l4_core_hwmod, 229537801b3dSCharulatha V .slave = &omap2430_mcbsp1_hwmod, 229637801b3dSCharulatha V .clk = "mcbsp1_ick", 229737801b3dSCharulatha V .addr = omap2430_mcbsp1_addrs, 229837801b3dSCharulatha V .user = OCP_USER_MPU | OCP_USER_SDMA, 229937801b3dSCharulatha V }; 230037801b3dSCharulatha V 230137801b3dSCharulatha V /* mcbsp1 slave ports */ 230237801b3dSCharulatha V static struct omap_hwmod_ocp_if *omap2430_mcbsp1_slaves[] = { 230337801b3dSCharulatha V &omap2430_l4_core__mcbsp1, 230437801b3dSCharulatha V }; 230537801b3dSCharulatha V 230637801b3dSCharulatha V static struct omap_hwmod omap2430_mcbsp1_hwmod = { 230737801b3dSCharulatha V .name = "mcbsp1", 230837801b3dSCharulatha V .class = &omap2430_mcbsp_hwmod_class, 230937801b3dSCharulatha V .mpu_irqs = omap2430_mcbsp1_irqs, 231037801b3dSCharulatha V .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp1_irqs), 231137801b3dSCharulatha V .sdma_reqs = omap2430_mcbsp1_sdma_chs, 231237801b3dSCharulatha V .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp1_sdma_chs), 231337801b3dSCharulatha V .main_clk = "mcbsp1_fck", 231437801b3dSCharulatha V .prcm = { 231537801b3dSCharulatha V .omap2 = { 231637801b3dSCharulatha V .prcm_reg_id = 1, 231737801b3dSCharulatha V .module_bit = OMAP24XX_EN_MCBSP1_SHIFT, 231837801b3dSCharulatha V .module_offs = CORE_MOD, 231937801b3dSCharulatha V .idlest_reg_id = 1, 232037801b3dSCharulatha V .idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT, 232137801b3dSCharulatha V }, 232237801b3dSCharulatha V }, 232337801b3dSCharulatha V .slaves = omap2430_mcbsp1_slaves, 232437801b3dSCharulatha V .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp1_slaves), 232537801b3dSCharulatha V .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 232637801b3dSCharulatha V }; 232737801b3dSCharulatha V 232837801b3dSCharulatha V /* mcbsp2 */ 232937801b3dSCharulatha V static struct omap_hwmod_irq_info omap2430_mcbsp2_irqs[] = { 233037801b3dSCharulatha V { .name = "tx", .irq = 62 }, 233137801b3dSCharulatha V { .name = "rx", .irq = 63 }, 233237801b3dSCharulatha V { .name = "common", .irq = 16 }, 233337801b3dSCharulatha V }; 233437801b3dSCharulatha V 233537801b3dSCharulatha V static struct omap_hwmod_dma_info omap2430_mcbsp2_sdma_chs[] = { 233637801b3dSCharulatha V { .name = "rx", .dma_req = 34 }, 233737801b3dSCharulatha V { .name = "tx", .dma_req = 33 }, 233837801b3dSCharulatha V }; 233937801b3dSCharulatha V 234037801b3dSCharulatha V static struct omap_hwmod_addr_space omap2430_mcbsp2_addrs[] = { 234137801b3dSCharulatha V { 234237801b3dSCharulatha V .name = "mpu", 234337801b3dSCharulatha V .pa_start = 0x48076000, 234437801b3dSCharulatha V .pa_end = 0x480760ff, 234537801b3dSCharulatha V .flags = ADDR_TYPE_RT 234637801b3dSCharulatha V }, 234778183f3fSPaul Walmsley { } 234837801b3dSCharulatha V }; 234937801b3dSCharulatha V 235037801b3dSCharulatha V /* l4_core -> mcbsp2 */ 235137801b3dSCharulatha V static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp2 = { 235237801b3dSCharulatha V .master = &omap2430_l4_core_hwmod, 235337801b3dSCharulatha V .slave = &omap2430_mcbsp2_hwmod, 235437801b3dSCharulatha V .clk = "mcbsp2_ick", 235537801b3dSCharulatha V .addr = omap2430_mcbsp2_addrs, 235637801b3dSCharulatha V .user = OCP_USER_MPU | OCP_USER_SDMA, 235737801b3dSCharulatha V }; 235837801b3dSCharulatha V 235937801b3dSCharulatha V /* mcbsp2 slave ports */ 236037801b3dSCharulatha V static struct omap_hwmod_ocp_if *omap2430_mcbsp2_slaves[] = { 236137801b3dSCharulatha V &omap2430_l4_core__mcbsp2, 236237801b3dSCharulatha V }; 236337801b3dSCharulatha V 236437801b3dSCharulatha V static struct omap_hwmod omap2430_mcbsp2_hwmod = { 236537801b3dSCharulatha V .name = "mcbsp2", 236637801b3dSCharulatha V .class = &omap2430_mcbsp_hwmod_class, 236737801b3dSCharulatha V .mpu_irqs = omap2430_mcbsp2_irqs, 236837801b3dSCharulatha V .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp2_irqs), 236937801b3dSCharulatha V .sdma_reqs = omap2430_mcbsp2_sdma_chs, 237037801b3dSCharulatha V .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp2_sdma_chs), 237137801b3dSCharulatha V .main_clk = "mcbsp2_fck", 237237801b3dSCharulatha V .prcm = { 237337801b3dSCharulatha V .omap2 = { 237437801b3dSCharulatha V .prcm_reg_id = 1, 237537801b3dSCharulatha V .module_bit = OMAP24XX_EN_MCBSP2_SHIFT, 237637801b3dSCharulatha V .module_offs = CORE_MOD, 237737801b3dSCharulatha V .idlest_reg_id = 1, 237837801b3dSCharulatha V .idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT, 237937801b3dSCharulatha V }, 238037801b3dSCharulatha V }, 238137801b3dSCharulatha V .slaves = omap2430_mcbsp2_slaves, 238237801b3dSCharulatha V .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp2_slaves), 238337801b3dSCharulatha V .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 238437801b3dSCharulatha V }; 238537801b3dSCharulatha V 238637801b3dSCharulatha V /* mcbsp3 */ 238737801b3dSCharulatha V static struct omap_hwmod_irq_info omap2430_mcbsp3_irqs[] = { 238837801b3dSCharulatha V { .name = "tx", .irq = 89 }, 238937801b3dSCharulatha V { .name = "rx", .irq = 90 }, 239037801b3dSCharulatha V { .name = "common", .irq = 17 }, 239137801b3dSCharulatha V }; 239237801b3dSCharulatha V 239337801b3dSCharulatha V static struct omap_hwmod_dma_info omap2430_mcbsp3_sdma_chs[] = { 239437801b3dSCharulatha V { .name = "rx", .dma_req = 18 }, 239537801b3dSCharulatha V { .name = "tx", .dma_req = 17 }, 239637801b3dSCharulatha V }; 239737801b3dSCharulatha V 239837801b3dSCharulatha V static struct omap_hwmod_addr_space omap2430_mcbsp3_addrs[] = { 239937801b3dSCharulatha V { 240037801b3dSCharulatha V .name = "mpu", 240137801b3dSCharulatha V .pa_start = 0x4808C000, 240237801b3dSCharulatha V .pa_end = 0x4808C0ff, 240337801b3dSCharulatha V .flags = ADDR_TYPE_RT 240437801b3dSCharulatha V }, 240578183f3fSPaul Walmsley { } 240637801b3dSCharulatha V }; 240737801b3dSCharulatha V 240837801b3dSCharulatha V /* l4_core -> mcbsp3 */ 240937801b3dSCharulatha V static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp3 = { 241037801b3dSCharulatha V .master = &omap2430_l4_core_hwmod, 241137801b3dSCharulatha V .slave = &omap2430_mcbsp3_hwmod, 241237801b3dSCharulatha V .clk = "mcbsp3_ick", 241337801b3dSCharulatha V .addr = omap2430_mcbsp3_addrs, 241437801b3dSCharulatha V .user = OCP_USER_MPU | OCP_USER_SDMA, 241537801b3dSCharulatha V }; 241637801b3dSCharulatha V 241737801b3dSCharulatha V /* mcbsp3 slave ports */ 241837801b3dSCharulatha V static struct omap_hwmod_ocp_if *omap2430_mcbsp3_slaves[] = { 241937801b3dSCharulatha V &omap2430_l4_core__mcbsp3, 242037801b3dSCharulatha V }; 242137801b3dSCharulatha V 242237801b3dSCharulatha V static struct omap_hwmod omap2430_mcbsp3_hwmod = { 242337801b3dSCharulatha V .name = "mcbsp3", 242437801b3dSCharulatha V .class = &omap2430_mcbsp_hwmod_class, 242537801b3dSCharulatha V .mpu_irqs = omap2430_mcbsp3_irqs, 242637801b3dSCharulatha V .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp3_irqs), 242737801b3dSCharulatha V .sdma_reqs = omap2430_mcbsp3_sdma_chs, 242837801b3dSCharulatha V .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp3_sdma_chs), 242937801b3dSCharulatha V .main_clk = "mcbsp3_fck", 243037801b3dSCharulatha V .prcm = { 243137801b3dSCharulatha V .omap2 = { 243237801b3dSCharulatha V .prcm_reg_id = 1, 243337801b3dSCharulatha V .module_bit = OMAP2430_EN_MCBSP3_SHIFT, 243437801b3dSCharulatha V .module_offs = CORE_MOD, 243537801b3dSCharulatha V .idlest_reg_id = 2, 243637801b3dSCharulatha V .idlest_idle_bit = OMAP2430_ST_MCBSP3_SHIFT, 243737801b3dSCharulatha V }, 243837801b3dSCharulatha V }, 243937801b3dSCharulatha V .slaves = omap2430_mcbsp3_slaves, 244037801b3dSCharulatha V .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp3_slaves), 244137801b3dSCharulatha V .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 244237801b3dSCharulatha V }; 244337801b3dSCharulatha V 244437801b3dSCharulatha V /* mcbsp4 */ 244537801b3dSCharulatha V static struct omap_hwmod_irq_info omap2430_mcbsp4_irqs[] = { 244637801b3dSCharulatha V { .name = "tx", .irq = 54 }, 244737801b3dSCharulatha V { .name = "rx", .irq = 55 }, 244837801b3dSCharulatha V { .name = "common", .irq = 18 }, 244937801b3dSCharulatha V }; 245037801b3dSCharulatha V 245137801b3dSCharulatha V static struct omap_hwmod_dma_info omap2430_mcbsp4_sdma_chs[] = { 245237801b3dSCharulatha V { .name = "rx", .dma_req = 20 }, 245337801b3dSCharulatha V { .name = "tx", .dma_req = 19 }, 245437801b3dSCharulatha V }; 245537801b3dSCharulatha V 245637801b3dSCharulatha V static struct omap_hwmod_addr_space omap2430_mcbsp4_addrs[] = { 245737801b3dSCharulatha V { 245837801b3dSCharulatha V .name = "mpu", 245937801b3dSCharulatha V .pa_start = 0x4808E000, 246037801b3dSCharulatha V .pa_end = 0x4808E0ff, 246137801b3dSCharulatha V .flags = ADDR_TYPE_RT 246237801b3dSCharulatha V }, 246378183f3fSPaul Walmsley { } 246437801b3dSCharulatha V }; 246537801b3dSCharulatha V 246637801b3dSCharulatha V /* l4_core -> mcbsp4 */ 246737801b3dSCharulatha V static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp4 = { 246837801b3dSCharulatha V .master = &omap2430_l4_core_hwmod, 246937801b3dSCharulatha V .slave = &omap2430_mcbsp4_hwmod, 247037801b3dSCharulatha V .clk = "mcbsp4_ick", 247137801b3dSCharulatha V .addr = omap2430_mcbsp4_addrs, 247237801b3dSCharulatha V .user = OCP_USER_MPU | OCP_USER_SDMA, 247337801b3dSCharulatha V }; 247437801b3dSCharulatha V 247537801b3dSCharulatha V /* mcbsp4 slave ports */ 247637801b3dSCharulatha V static struct omap_hwmod_ocp_if *omap2430_mcbsp4_slaves[] = { 247737801b3dSCharulatha V &omap2430_l4_core__mcbsp4, 247837801b3dSCharulatha V }; 247937801b3dSCharulatha V 248037801b3dSCharulatha V static struct omap_hwmod omap2430_mcbsp4_hwmod = { 248137801b3dSCharulatha V .name = "mcbsp4", 248237801b3dSCharulatha V .class = &omap2430_mcbsp_hwmod_class, 248337801b3dSCharulatha V .mpu_irqs = omap2430_mcbsp4_irqs, 248437801b3dSCharulatha V .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp4_irqs), 248537801b3dSCharulatha V .sdma_reqs = omap2430_mcbsp4_sdma_chs, 248637801b3dSCharulatha V .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp4_sdma_chs), 248737801b3dSCharulatha V .main_clk = "mcbsp4_fck", 248837801b3dSCharulatha V .prcm = { 248937801b3dSCharulatha V .omap2 = { 249037801b3dSCharulatha V .prcm_reg_id = 1, 249137801b3dSCharulatha V .module_bit = OMAP2430_EN_MCBSP4_SHIFT, 249237801b3dSCharulatha V .module_offs = CORE_MOD, 249337801b3dSCharulatha V .idlest_reg_id = 2, 249437801b3dSCharulatha V .idlest_idle_bit = OMAP2430_ST_MCBSP4_SHIFT, 249537801b3dSCharulatha V }, 249637801b3dSCharulatha V }, 249737801b3dSCharulatha V .slaves = omap2430_mcbsp4_slaves, 249837801b3dSCharulatha V .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp4_slaves), 249937801b3dSCharulatha V .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 250037801b3dSCharulatha V }; 250137801b3dSCharulatha V 250237801b3dSCharulatha V /* mcbsp5 */ 250337801b3dSCharulatha V static struct omap_hwmod_irq_info omap2430_mcbsp5_irqs[] = { 250437801b3dSCharulatha V { .name = "tx", .irq = 81 }, 250537801b3dSCharulatha V { .name = "rx", .irq = 82 }, 250637801b3dSCharulatha V { .name = "common", .irq = 19 }, 250737801b3dSCharulatha V }; 250837801b3dSCharulatha V 250937801b3dSCharulatha V static struct omap_hwmod_dma_info omap2430_mcbsp5_sdma_chs[] = { 251037801b3dSCharulatha V { .name = "rx", .dma_req = 22 }, 251137801b3dSCharulatha V { .name = "tx", .dma_req = 21 }, 251237801b3dSCharulatha V }; 251337801b3dSCharulatha V 251437801b3dSCharulatha V static struct omap_hwmod_addr_space omap2430_mcbsp5_addrs[] = { 251537801b3dSCharulatha V { 251637801b3dSCharulatha V .name = "mpu", 251737801b3dSCharulatha V .pa_start = 0x48096000, 251837801b3dSCharulatha V .pa_end = 0x480960ff, 251937801b3dSCharulatha V .flags = ADDR_TYPE_RT 252037801b3dSCharulatha V }, 252178183f3fSPaul Walmsley { } 252237801b3dSCharulatha V }; 252337801b3dSCharulatha V 252437801b3dSCharulatha V /* l4_core -> mcbsp5 */ 252537801b3dSCharulatha V static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp5 = { 252637801b3dSCharulatha V .master = &omap2430_l4_core_hwmod, 252737801b3dSCharulatha V .slave = &omap2430_mcbsp5_hwmod, 252837801b3dSCharulatha V .clk = "mcbsp5_ick", 252937801b3dSCharulatha V .addr = omap2430_mcbsp5_addrs, 253037801b3dSCharulatha V .user = OCP_USER_MPU | OCP_USER_SDMA, 253137801b3dSCharulatha V }; 253237801b3dSCharulatha V 253337801b3dSCharulatha V /* mcbsp5 slave ports */ 253437801b3dSCharulatha V static struct omap_hwmod_ocp_if *omap2430_mcbsp5_slaves[] = { 253537801b3dSCharulatha V &omap2430_l4_core__mcbsp5, 253637801b3dSCharulatha V }; 253737801b3dSCharulatha V 253837801b3dSCharulatha V static struct omap_hwmod omap2430_mcbsp5_hwmod = { 253937801b3dSCharulatha V .name = "mcbsp5", 254037801b3dSCharulatha V .class = &omap2430_mcbsp_hwmod_class, 254137801b3dSCharulatha V .mpu_irqs = omap2430_mcbsp5_irqs, 254237801b3dSCharulatha V .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp5_irqs), 254337801b3dSCharulatha V .sdma_reqs = omap2430_mcbsp5_sdma_chs, 254437801b3dSCharulatha V .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp5_sdma_chs), 254537801b3dSCharulatha V .main_clk = "mcbsp5_fck", 254637801b3dSCharulatha V .prcm = { 254737801b3dSCharulatha V .omap2 = { 254837801b3dSCharulatha V .prcm_reg_id = 1, 254937801b3dSCharulatha V .module_bit = OMAP2430_EN_MCBSP5_SHIFT, 255037801b3dSCharulatha V .module_offs = CORE_MOD, 255137801b3dSCharulatha V .idlest_reg_id = 2, 255237801b3dSCharulatha V .idlest_idle_bit = OMAP2430_ST_MCBSP5_SHIFT, 255337801b3dSCharulatha V }, 255437801b3dSCharulatha V }, 255537801b3dSCharulatha V .slaves = omap2430_mcbsp5_slaves, 255637801b3dSCharulatha V .slaves_cnt = ARRAY_SIZE(omap2430_mcbsp5_slaves), 255737801b3dSCharulatha V .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 255837801b3dSCharulatha V }; 255904aa67deSTony Lindgren 2560bce06f37SPaul Walmsley /* MMC/SD/SDIO common */ 2561bce06f37SPaul Walmsley 2562bce06f37SPaul Walmsley static struct omap_hwmod_class_sysconfig omap2430_mmc_sysc = { 2563bce06f37SPaul Walmsley .rev_offs = 0x1fc, 2564bce06f37SPaul Walmsley .sysc_offs = 0x10, 2565bce06f37SPaul Walmsley .syss_offs = 0x14, 2566bce06f37SPaul Walmsley .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | 2567bce06f37SPaul Walmsley SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | 2568bce06f37SPaul Walmsley SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), 2569bce06f37SPaul Walmsley .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), 2570bce06f37SPaul Walmsley .sysc_fields = &omap_hwmod_sysc_type1, 2571bce06f37SPaul Walmsley }; 2572bce06f37SPaul Walmsley 2573bce06f37SPaul Walmsley static struct omap_hwmod_class omap2430_mmc_class = { 2574bce06f37SPaul Walmsley .name = "mmc", 2575bce06f37SPaul Walmsley .sysc = &omap2430_mmc_sysc, 2576bce06f37SPaul Walmsley }; 2577bce06f37SPaul Walmsley 2578bce06f37SPaul Walmsley /* MMC/SD/SDIO1 */ 2579bce06f37SPaul Walmsley 2580bce06f37SPaul Walmsley static struct omap_hwmod_irq_info omap2430_mmc1_mpu_irqs[] = { 2581bce06f37SPaul Walmsley { .irq = 83 }, 2582bce06f37SPaul Walmsley }; 2583bce06f37SPaul Walmsley 2584bce06f37SPaul Walmsley static struct omap_hwmod_dma_info omap2430_mmc1_sdma_reqs[] = { 2585bce06f37SPaul Walmsley { .name = "tx", .dma_req = 61 }, /* DMA_MMC1_TX */ 2586bce06f37SPaul Walmsley { .name = "rx", .dma_req = 62 }, /* DMA_MMC1_RX */ 2587bce06f37SPaul Walmsley }; 2588bce06f37SPaul Walmsley 2589bce06f37SPaul Walmsley static struct omap_hwmod_opt_clk omap2430_mmc1_opt_clks[] = { 2590bce06f37SPaul Walmsley { .role = "dbck", .clk = "mmchsdb1_fck" }, 2591bce06f37SPaul Walmsley }; 2592bce06f37SPaul Walmsley 2593bce06f37SPaul Walmsley static struct omap_hwmod_ocp_if *omap2430_mmc1_slaves[] = { 2594bce06f37SPaul Walmsley &omap2430_l4_core__mmc1, 2595bce06f37SPaul Walmsley }; 2596bce06f37SPaul Walmsley 25976ab8946fSKishore Kadiyala static struct omap_mmc_dev_attr mmc1_dev_attr = { 25986ab8946fSKishore Kadiyala .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT, 25996ab8946fSKishore Kadiyala }; 26006ab8946fSKishore Kadiyala 2601bce06f37SPaul Walmsley static struct omap_hwmod omap2430_mmc1_hwmod = { 2602bce06f37SPaul Walmsley .name = "mmc1", 2603bce06f37SPaul Walmsley .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 2604bce06f37SPaul Walmsley .mpu_irqs = omap2430_mmc1_mpu_irqs, 2605bce06f37SPaul Walmsley .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mmc1_mpu_irqs), 2606bce06f37SPaul Walmsley .sdma_reqs = omap2430_mmc1_sdma_reqs, 2607bce06f37SPaul Walmsley .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mmc1_sdma_reqs), 2608bce06f37SPaul Walmsley .opt_clks = omap2430_mmc1_opt_clks, 2609bce06f37SPaul Walmsley .opt_clks_cnt = ARRAY_SIZE(omap2430_mmc1_opt_clks), 2610bce06f37SPaul Walmsley .main_clk = "mmchs1_fck", 2611bce06f37SPaul Walmsley .prcm = { 2612bce06f37SPaul Walmsley .omap2 = { 2613bce06f37SPaul Walmsley .module_offs = CORE_MOD, 2614bce06f37SPaul Walmsley .prcm_reg_id = 2, 2615bce06f37SPaul Walmsley .module_bit = OMAP2430_EN_MMCHS1_SHIFT, 2616bce06f37SPaul Walmsley .idlest_reg_id = 2, 2617bce06f37SPaul Walmsley .idlest_idle_bit = OMAP2430_ST_MMCHS1_SHIFT, 2618bce06f37SPaul Walmsley }, 2619bce06f37SPaul Walmsley }, 26206ab8946fSKishore Kadiyala .dev_attr = &mmc1_dev_attr, 2621bce06f37SPaul Walmsley .slaves = omap2430_mmc1_slaves, 2622bce06f37SPaul Walmsley .slaves_cnt = ARRAY_SIZE(omap2430_mmc1_slaves), 2623bce06f37SPaul Walmsley .class = &omap2430_mmc_class, 2624bce06f37SPaul Walmsley .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 2625bce06f37SPaul Walmsley }; 2626bce06f37SPaul Walmsley 2627bce06f37SPaul Walmsley /* MMC/SD/SDIO2 */ 2628bce06f37SPaul Walmsley 2629bce06f37SPaul Walmsley static struct omap_hwmod_irq_info omap2430_mmc2_mpu_irqs[] = { 2630bce06f37SPaul Walmsley { .irq = 86 }, 2631bce06f37SPaul Walmsley }; 2632bce06f37SPaul Walmsley 2633bce06f37SPaul Walmsley static struct omap_hwmod_dma_info omap2430_mmc2_sdma_reqs[] = { 2634bce06f37SPaul Walmsley { .name = "tx", .dma_req = 47 }, /* DMA_MMC2_TX */ 2635bce06f37SPaul Walmsley { .name = "rx", .dma_req = 48 }, /* DMA_MMC2_RX */ 2636bce06f37SPaul Walmsley }; 2637bce06f37SPaul Walmsley 2638bce06f37SPaul Walmsley static struct omap_hwmod_opt_clk omap2430_mmc2_opt_clks[] = { 2639bce06f37SPaul Walmsley { .role = "dbck", .clk = "mmchsdb2_fck" }, 2640bce06f37SPaul Walmsley }; 2641bce06f37SPaul Walmsley 2642bce06f37SPaul Walmsley static struct omap_hwmod_ocp_if *omap2430_mmc2_slaves[] = { 2643bce06f37SPaul Walmsley &omap2430_l4_core__mmc2, 2644bce06f37SPaul Walmsley }; 2645bce06f37SPaul Walmsley 2646bce06f37SPaul Walmsley static struct omap_hwmod omap2430_mmc2_hwmod = { 2647bce06f37SPaul Walmsley .name = "mmc2", 2648bce06f37SPaul Walmsley .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 2649bce06f37SPaul Walmsley .mpu_irqs = omap2430_mmc2_mpu_irqs, 2650bce06f37SPaul Walmsley .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mmc2_mpu_irqs), 2651bce06f37SPaul Walmsley .sdma_reqs = omap2430_mmc2_sdma_reqs, 2652bce06f37SPaul Walmsley .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mmc2_sdma_reqs), 2653bce06f37SPaul Walmsley .opt_clks = omap2430_mmc2_opt_clks, 2654bce06f37SPaul Walmsley .opt_clks_cnt = ARRAY_SIZE(omap2430_mmc2_opt_clks), 2655bce06f37SPaul Walmsley .main_clk = "mmchs2_fck", 2656bce06f37SPaul Walmsley .prcm = { 2657bce06f37SPaul Walmsley .omap2 = { 2658bce06f37SPaul Walmsley .module_offs = CORE_MOD, 2659bce06f37SPaul Walmsley .prcm_reg_id = 2, 2660bce06f37SPaul Walmsley .module_bit = OMAP2430_EN_MMCHS2_SHIFT, 2661bce06f37SPaul Walmsley .idlest_reg_id = 2, 2662bce06f37SPaul Walmsley .idlest_idle_bit = OMAP2430_ST_MMCHS2_SHIFT, 2663bce06f37SPaul Walmsley }, 2664bce06f37SPaul Walmsley }, 2665bce06f37SPaul Walmsley .slaves = omap2430_mmc2_slaves, 2666bce06f37SPaul Walmsley .slaves_cnt = ARRAY_SIZE(omap2430_mmc2_slaves), 2667bce06f37SPaul Walmsley .class = &omap2430_mmc_class, 2668bce06f37SPaul Walmsley .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 2669bce06f37SPaul Walmsley }; 26707359154eSPaul Walmsley 26717359154eSPaul Walmsley static __initdata struct omap_hwmod *omap2430_hwmods[] = { 26724a7cf90aSKevin Hilman &omap2430_l3_main_hwmod, 26737359154eSPaul Walmsley &omap2430_l4_core_hwmod, 26747359154eSPaul Walmsley &omap2430_l4_wkup_hwmod, 26757359154eSPaul Walmsley &omap2430_mpu_hwmod, 267608072acfSPaul Walmsley &omap2430_iva_hwmod, 2677b6b58229SThara Gopinath 2678b6b58229SThara Gopinath &omap2430_timer1_hwmod, 2679b6b58229SThara Gopinath &omap2430_timer2_hwmod, 2680b6b58229SThara Gopinath &omap2430_timer3_hwmod, 2681b6b58229SThara Gopinath &omap2430_timer4_hwmod, 2682b6b58229SThara Gopinath &omap2430_timer5_hwmod, 2683b6b58229SThara Gopinath &omap2430_timer6_hwmod, 2684b6b58229SThara Gopinath &omap2430_timer7_hwmod, 2685b6b58229SThara Gopinath &omap2430_timer8_hwmod, 2686b6b58229SThara Gopinath &omap2430_timer9_hwmod, 2687b6b58229SThara Gopinath &omap2430_timer10_hwmod, 2688b6b58229SThara Gopinath &omap2430_timer11_hwmod, 2689b6b58229SThara Gopinath &omap2430_timer12_hwmod, 2690b6b58229SThara Gopinath 2691165e2161SVaradarajan, Charulatha &omap2430_wd_timer2_hwmod, 2692046465b7SKevin Hilman &omap2430_uart1_hwmod, 2693046465b7SKevin Hilman &omap2430_uart2_hwmod, 2694046465b7SKevin Hilman &omap2430_uart3_hwmod, 2695de56dbb6SSenthilvadivu Guruswamy /* dss class */ 2696de56dbb6SSenthilvadivu Guruswamy &omap2430_dss_core_hwmod, 2697de56dbb6SSenthilvadivu Guruswamy &omap2430_dss_dispc_hwmod, 2698de56dbb6SSenthilvadivu Guruswamy &omap2430_dss_rfbi_hwmod, 2699de56dbb6SSenthilvadivu Guruswamy &omap2430_dss_venc_hwmod, 2700de56dbb6SSenthilvadivu Guruswamy /* i2c class */ 27012004290fSPaul Walmsley &omap2430_i2c1_hwmod, 27022004290fSPaul Walmsley &omap2430_i2c2_hwmod, 2703bce06f37SPaul Walmsley &omap2430_mmc1_hwmod, 2704bce06f37SPaul Walmsley &omap2430_mmc2_hwmod, 2705aeac0e44SVaradarajan, Charulatha 2706aeac0e44SVaradarajan, Charulatha /* gpio class */ 2707aeac0e44SVaradarajan, Charulatha &omap2430_gpio1_hwmod, 2708aeac0e44SVaradarajan, Charulatha &omap2430_gpio2_hwmod, 2709aeac0e44SVaradarajan, Charulatha &omap2430_gpio3_hwmod, 2710aeac0e44SVaradarajan, Charulatha &omap2430_gpio4_hwmod, 2711aeac0e44SVaradarajan, Charulatha &omap2430_gpio5_hwmod, 271282cbd1aeSG, Manjunath Kondaiah 271382cbd1aeSG, Manjunath Kondaiah /* dma_system class*/ 271482cbd1aeSG, Manjunath Kondaiah &omap2430_dma_system_hwmod, 27157f904c78SCharulatha V 271637801b3dSCharulatha V /* mcbsp class */ 271737801b3dSCharulatha V &omap2430_mcbsp1_hwmod, 271837801b3dSCharulatha V &omap2430_mcbsp2_hwmod, 271937801b3dSCharulatha V &omap2430_mcbsp3_hwmod, 272037801b3dSCharulatha V &omap2430_mcbsp4_hwmod, 272137801b3dSCharulatha V &omap2430_mcbsp5_hwmod, 272237801b3dSCharulatha V 2723fca1ab55SOmar Ramirez Luna /* mailbox class */ 2724fca1ab55SOmar Ramirez Luna &omap2430_mailbox_hwmod, 2725fca1ab55SOmar Ramirez Luna 27267f904c78SCharulatha V /* mcspi class */ 27277f904c78SCharulatha V &omap2430_mcspi1_hwmod, 27287f904c78SCharulatha V &omap2430_mcspi2_hwmod, 27297f904c78SCharulatha V &omap2430_mcspi3_hwmod, 273004aa67deSTony Lindgren 273144d02acfSHema HK /* usbotg class*/ 273244d02acfSHema HK &omap2430_usbhsotg_hwmod, 273304aa67deSTony Lindgren 27347359154eSPaul Walmsley NULL, 27357359154eSPaul Walmsley }; 27367359154eSPaul Walmsley 27377359154eSPaul Walmsley int __init omap2430_hwmod_init(void) 27387359154eSPaul Walmsley { 2739550c8092SPaul Walmsley return omap_hwmod_register(omap2430_hwmods); 27407359154eSPaul Walmsley } 2741