17359154eSPaul Walmsley /* 27359154eSPaul Walmsley * omap_hwmod_2430_data.c - hardware modules present on the OMAP2430 chips 37359154eSPaul Walmsley * 478183f3fSPaul Walmsley * Copyright (C) 2009-2011 Nokia Corporation 50a78c5c5SPaul Walmsley * Copyright (C) 2012 Texas Instruments, Inc. 67359154eSPaul Walmsley * Paul Walmsley 77359154eSPaul Walmsley * 87359154eSPaul Walmsley * This program is free software; you can redistribute it and/or modify 97359154eSPaul Walmsley * it under the terms of the GNU General Public License version 2 as 107359154eSPaul Walmsley * published by the Free Software Foundation. 117359154eSPaul Walmsley * 127359154eSPaul Walmsley * XXX handle crossbar/shared link difference for L3? 137359154eSPaul Walmsley * XXX these should be marked initdata for multi-OMAP kernels 147359154eSPaul Walmsley */ 157359154eSPaul Walmsley #include <plat/omap_hwmod.h> 167359154eSPaul Walmsley #include <plat/dma.h> 17046465b7SKevin Hilman #include <plat/serial.h> 182004290fSPaul Walmsley #include <plat/i2c.h> 1937801b3dSCharulatha V #include <plat/mcbsp.h> 207f904c78SCharulatha V #include <plat/mcspi.h> 21b6b58229SThara Gopinath #include <plat/dmtimer.h> 226ab8946fSKishore Kadiyala #include <plat/mmc.h> 23de56dbb6SSenthilvadivu Guruswamy #include <plat/l3_2xxx.h> 247359154eSPaul Walmsley 25dbc04161STony Lindgren #include "soc.h" 2643b40992SPaul Walmsley #include "omap_hwmod_common_data.h" 277359154eSPaul Walmsley #include "prm-regbits-24xx.h" 28165e2161SVaradarajan, Charulatha #include "cm-regbits-24xx.h" 29ff2516fbSPaul Walmsley #include "wd_timer.h" 307359154eSPaul Walmsley 317359154eSPaul Walmsley /* 327359154eSPaul Walmsley * OMAP2430 hardware module integration data 337359154eSPaul Walmsley * 34844a3b63SPaul Walmsley * All of the data in this section should be autogeneratable from the 357359154eSPaul Walmsley * TI hardware database or other technical documentation. Data that 367359154eSPaul Walmsley * is driver-specific or driver-kernel integration-specific belongs 377359154eSPaul Walmsley * elsewhere. 387359154eSPaul Walmsley */ 397359154eSPaul Walmsley 40844a3b63SPaul Walmsley /* 41844a3b63SPaul Walmsley * IP blocks 42844a3b63SPaul Walmsley */ 43de56dbb6SSenthilvadivu Guruswamy 44844a3b63SPaul Walmsley /* IVA2 (IVA2) */ 453af35fbcSPaul Walmsley static struct omap_hwmod_rst_info omap2430_iva_resets[] = { 463af35fbcSPaul Walmsley { .name = "logic", .rst_shift = 0 }, 473af35fbcSPaul Walmsley { .name = "mmu", .rst_shift = 1 }, 483af35fbcSPaul Walmsley }; 493af35fbcSPaul Walmsley 5008072acfSPaul Walmsley static struct omap_hwmod omap2430_iva_hwmod = { 5108072acfSPaul Walmsley .name = "iva", 5208072acfSPaul Walmsley .class = &iva_hwmod_class, 533af35fbcSPaul Walmsley .clkdm_name = "dsp_clkdm", 543af35fbcSPaul Walmsley .rst_lines = omap2430_iva_resets, 553af35fbcSPaul Walmsley .rst_lines_cnt = ARRAY_SIZE(omap2430_iva_resets), 563af35fbcSPaul Walmsley .main_clk = "dsp_fck", 5708072acfSPaul Walmsley }; 5808072acfSPaul Walmsley 592004290fSPaul Walmsley /* I2C common */ 602004290fSPaul Walmsley static struct omap_hwmod_class_sysconfig i2c_sysc = { 612004290fSPaul Walmsley .rev_offs = 0x00, 622004290fSPaul Walmsley .sysc_offs = 0x20, 632004290fSPaul Walmsley .syss_offs = 0x10, 64d73d65faSAvinash.H.M .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | 65d73d65faSAvinash.H.M SYSS_HAS_RESET_STATUS), 662004290fSPaul Walmsley .sysc_fields = &omap_hwmod_sysc_type1, 672004290fSPaul Walmsley }; 682004290fSPaul Walmsley 692004290fSPaul Walmsley static struct omap_hwmod_class i2c_class = { 702004290fSPaul Walmsley .name = "i2c", 712004290fSPaul Walmsley .sysc = &i2c_sysc, 72db791a75SAndy Green .rev = OMAP_I2C_IP_VERSION_1, 736d3c55fdSAvinash.H.M .reset = &omap_i2c_reset, 742004290fSPaul Walmsley }; 752004290fSPaul Walmsley 7650ebb777SBenoit Cousson static struct omap_i2c_dev_attr i2c_dev_attr = { 772004290fSPaul Walmsley .fifo_depth = 8, /* bytes */ 784d4441a6SAndy Green .flags = OMAP_I2C_FLAG_APPLY_ERRATA_I207 | 794d4441a6SAndy Green OMAP_I2C_FLAG_BUS_SHIFT_2 | 804d4441a6SAndy Green OMAP_I2C_FLAG_FORCE_19200_INT_CLK, 812004290fSPaul Walmsley }; 822004290fSPaul Walmsley 8350ebb777SBenoit Cousson /* I2C1 */ 842004290fSPaul Walmsley static struct omap_hwmod omap2430_i2c1_hwmod = { 852004290fSPaul Walmsley .name = "i2c1", 863e600522SAndy Green .flags = HWMOD_16BIT_REG, 870d619a89SPaul Walmsley .mpu_irqs = omap2_i2c1_mpu_irqs, 88d826ebfaSPaul Walmsley .sdma_reqs = omap2_i2c1_sdma_reqs, 892004290fSPaul Walmsley .main_clk = "i2chs1_fck", 902004290fSPaul Walmsley .prcm = { 912004290fSPaul Walmsley .omap2 = { 922004290fSPaul Walmsley /* 932004290fSPaul Walmsley * NOTE: The CM_FCLKEN* and CM_ICLKEN* for 942004290fSPaul Walmsley * I2CHS IP's do not follow the usual pattern. 952004290fSPaul Walmsley * prcm_reg_id alone cannot be used to program 962004290fSPaul Walmsley * the iclk and fclk. Needs to be handled using 9725985edcSLucas De Marchi * additional flags when clk handling is moved 982004290fSPaul Walmsley * to hwmod framework. 992004290fSPaul Walmsley */ 1002004290fSPaul Walmsley .module_offs = CORE_MOD, 1012004290fSPaul Walmsley .prcm_reg_id = 1, 1022004290fSPaul Walmsley .module_bit = OMAP2430_EN_I2CHS1_SHIFT, 1032004290fSPaul Walmsley .idlest_reg_id = 1, 1042004290fSPaul Walmsley .idlest_idle_bit = OMAP2430_ST_I2CHS1_SHIFT, 1052004290fSPaul Walmsley }, 1062004290fSPaul Walmsley }, 1072004290fSPaul Walmsley .class = &i2c_class, 10850ebb777SBenoit Cousson .dev_attr = &i2c_dev_attr, 1092004290fSPaul Walmsley }; 1102004290fSPaul Walmsley 1112004290fSPaul Walmsley /* I2C2 */ 1122004290fSPaul Walmsley static struct omap_hwmod omap2430_i2c2_hwmod = { 1132004290fSPaul Walmsley .name = "i2c2", 1143e600522SAndy Green .flags = HWMOD_16BIT_REG, 1150d619a89SPaul Walmsley .mpu_irqs = omap2_i2c2_mpu_irqs, 116d826ebfaSPaul Walmsley .sdma_reqs = omap2_i2c2_sdma_reqs, 1172004290fSPaul Walmsley .main_clk = "i2chs2_fck", 1182004290fSPaul Walmsley .prcm = { 1192004290fSPaul Walmsley .omap2 = { 1202004290fSPaul Walmsley .module_offs = CORE_MOD, 1212004290fSPaul Walmsley .prcm_reg_id = 1, 1222004290fSPaul Walmsley .module_bit = OMAP2430_EN_I2CHS2_SHIFT, 1232004290fSPaul Walmsley .idlest_reg_id = 1, 1242004290fSPaul Walmsley .idlest_idle_bit = OMAP2430_ST_I2CHS2_SHIFT, 1252004290fSPaul Walmsley }, 1262004290fSPaul Walmsley }, 1272004290fSPaul Walmsley .class = &i2c_class, 12850ebb777SBenoit Cousson .dev_attr = &i2c_dev_attr, 1292004290fSPaul Walmsley }; 1302004290fSPaul Walmsley 131aeac0e44SVaradarajan, Charulatha /* gpio5 */ 132aeac0e44SVaradarajan, Charulatha static struct omap_hwmod_irq_info omap243x_gpio5_irqs[] = { 1337d7e1ebaSTony Lindgren { .irq = 33 + OMAP_INTC_START, }, /* INT_24XX_GPIO_BANK5 */ 1347d7e1ebaSTony Lindgren { .irq = -1 }, 135aeac0e44SVaradarajan, Charulatha }; 136aeac0e44SVaradarajan, Charulatha 137aeac0e44SVaradarajan, Charulatha static struct omap_hwmod omap2430_gpio5_hwmod = { 138aeac0e44SVaradarajan, Charulatha .name = "gpio5", 139f95440caSAvinash.H.M .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 140aeac0e44SVaradarajan, Charulatha .mpu_irqs = omap243x_gpio5_irqs, 141aeac0e44SVaradarajan, Charulatha .main_clk = "gpio5_fck", 142aeac0e44SVaradarajan, Charulatha .prcm = { 143aeac0e44SVaradarajan, Charulatha .omap2 = { 144aeac0e44SVaradarajan, Charulatha .prcm_reg_id = 2, 145aeac0e44SVaradarajan, Charulatha .module_bit = OMAP2430_EN_GPIO5_SHIFT, 146aeac0e44SVaradarajan, Charulatha .module_offs = CORE_MOD, 147aeac0e44SVaradarajan, Charulatha .idlest_reg_id = 2, 148aeac0e44SVaradarajan, Charulatha .idlest_idle_bit = OMAP2430_ST_GPIO5_SHIFT, 149aeac0e44SVaradarajan, Charulatha }, 150aeac0e44SVaradarajan, Charulatha }, 151273b9465SPaul Walmsley .class = &omap2xxx_gpio_hwmod_class, 152cb48427eSPaul Walmsley .dev_attr = &omap2xxx_gpio_dev_attr, 153aeac0e44SVaradarajan, Charulatha }; 154aeac0e44SVaradarajan, Charulatha 15582cbd1aeSG, Manjunath Kondaiah /* dma attributes */ 15682cbd1aeSG, Manjunath Kondaiah static struct omap_dma_dev_attr dma_dev_attr = { 15782cbd1aeSG, Manjunath Kondaiah .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY | 15882cbd1aeSG, Manjunath Kondaiah IS_CSSA_32 | IS_CDSA_32 | IS_RW_PRIORITY, 15982cbd1aeSG, Manjunath Kondaiah .lch_count = 32, 16082cbd1aeSG, Manjunath Kondaiah }; 16182cbd1aeSG, Manjunath Kondaiah 16282cbd1aeSG, Manjunath Kondaiah static struct omap_hwmod omap2430_dma_system_hwmod = { 16382cbd1aeSG, Manjunath Kondaiah .name = "dma", 164273b9465SPaul Walmsley .class = &omap2xxx_dma_hwmod_class, 1650d619a89SPaul Walmsley .mpu_irqs = omap2_dma_system_irqs, 16682cbd1aeSG, Manjunath Kondaiah .main_clk = "core_l3_ck", 16782cbd1aeSG, Manjunath Kondaiah .dev_attr = &dma_dev_attr, 16882cbd1aeSG, Manjunath Kondaiah .flags = HWMOD_NO_IDLEST, 16982cbd1aeSG, Manjunath Kondaiah }; 17082cbd1aeSG, Manjunath Kondaiah 171fca1ab55SOmar Ramirez Luna /* mailbox */ 172fca1ab55SOmar Ramirez Luna static struct omap_hwmod_irq_info omap2430_mailbox_irqs[] = { 1737d7e1ebaSTony Lindgren { .irq = 26 + OMAP_INTC_START, }, 1747d7e1ebaSTony Lindgren { .irq = -1 }, 175fca1ab55SOmar Ramirez Luna }; 176fca1ab55SOmar Ramirez Luna 177fca1ab55SOmar Ramirez Luna static struct omap_hwmod omap2430_mailbox_hwmod = { 178fca1ab55SOmar Ramirez Luna .name = "mailbox", 179273b9465SPaul Walmsley .class = &omap2xxx_mailbox_hwmod_class, 180fca1ab55SOmar Ramirez Luna .mpu_irqs = omap2430_mailbox_irqs, 181fca1ab55SOmar Ramirez Luna .main_clk = "mailboxes_ick", 182fca1ab55SOmar Ramirez Luna .prcm = { 183fca1ab55SOmar Ramirez Luna .omap2 = { 184fca1ab55SOmar Ramirez Luna .prcm_reg_id = 1, 185fca1ab55SOmar Ramirez Luna .module_bit = OMAP24XX_EN_MAILBOXES_SHIFT, 186fca1ab55SOmar Ramirez Luna .module_offs = CORE_MOD, 187fca1ab55SOmar Ramirez Luna .idlest_reg_id = 1, 188fca1ab55SOmar Ramirez Luna .idlest_idle_bit = OMAP24XX_ST_MAILBOXES_SHIFT, 189fca1ab55SOmar Ramirez Luna }, 190fca1ab55SOmar Ramirez Luna }, 191fca1ab55SOmar Ramirez Luna }; 192fca1ab55SOmar Ramirez Luna 1937f904c78SCharulatha V /* mcspi3 */ 1947f904c78SCharulatha V static struct omap_hwmod_irq_info omap2430_mcspi3_mpu_irqs[] = { 1957d7e1ebaSTony Lindgren { .irq = 91 + OMAP_INTC_START, }, 1967d7e1ebaSTony Lindgren { .irq = -1 }, 1977f904c78SCharulatha V }; 1987f904c78SCharulatha V 1997f904c78SCharulatha V static struct omap_hwmod_dma_info omap2430_mcspi3_sdma_reqs[] = { 2007f904c78SCharulatha V { .name = "tx0", .dma_req = 15 }, /* DMA_SPI3_TX0 */ 2017f904c78SCharulatha V { .name = "rx0", .dma_req = 16 }, /* DMA_SPI3_RX0 */ 2027f904c78SCharulatha V { .name = "tx1", .dma_req = 23 }, /* DMA_SPI3_TX1 */ 2037f904c78SCharulatha V { .name = "rx1", .dma_req = 24 }, /* DMA_SPI3_RX1 */ 204bc614958SPaul Walmsley { .dma_req = -1 } 2057f904c78SCharulatha V }; 2067f904c78SCharulatha V 2077f904c78SCharulatha V static struct omap2_mcspi_dev_attr omap_mcspi3_dev_attr = { 2087f904c78SCharulatha V .num_chipselect = 2, 2097f904c78SCharulatha V }; 2107f904c78SCharulatha V 2117f904c78SCharulatha V static struct omap_hwmod omap2430_mcspi3_hwmod = { 212bec93811SPaul Walmsley .name = "mcspi3", 2137f904c78SCharulatha V .mpu_irqs = omap2430_mcspi3_mpu_irqs, 2147f904c78SCharulatha V .sdma_reqs = omap2430_mcspi3_sdma_reqs, 2157f904c78SCharulatha V .main_clk = "mcspi3_fck", 2167f904c78SCharulatha V .prcm = { 2177f904c78SCharulatha V .omap2 = { 2187f904c78SCharulatha V .module_offs = CORE_MOD, 2197f904c78SCharulatha V .prcm_reg_id = 2, 2207f904c78SCharulatha V .module_bit = OMAP2430_EN_MCSPI3_SHIFT, 2217f904c78SCharulatha V .idlest_reg_id = 2, 2227f904c78SCharulatha V .idlest_idle_bit = OMAP2430_ST_MCSPI3_SHIFT, 2237f904c78SCharulatha V }, 2247f904c78SCharulatha V }, 225273b9465SPaul Walmsley .class = &omap2xxx_mcspi_class, 2267f904c78SCharulatha V .dev_attr = &omap_mcspi3_dev_attr, 2277f904c78SCharulatha V }; 2287f904c78SCharulatha V 229844a3b63SPaul Walmsley /* usbhsotg */ 23044d02acfSHema HK static struct omap_hwmod_class_sysconfig omap2430_usbhsotg_sysc = { 23144d02acfSHema HK .rev_offs = 0x0400, 23244d02acfSHema HK .sysc_offs = 0x0404, 23344d02acfSHema HK .syss_offs = 0x0408, 23444d02acfSHema HK .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE| 23544d02acfSHema HK SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | 23644d02acfSHema HK SYSC_HAS_AUTOIDLE), 23744d02acfSHema HK .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | 23844d02acfSHema HK MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), 23944d02acfSHema HK .sysc_fields = &omap_hwmod_sysc_type1, 24044d02acfSHema HK }; 24144d02acfSHema HK 24244d02acfSHema HK static struct omap_hwmod_class usbotg_class = { 24344d02acfSHema HK .name = "usbotg", 24444d02acfSHema HK .sysc = &omap2430_usbhsotg_sysc, 24544d02acfSHema HK }; 24644d02acfSHema HK 24744d02acfSHema HK /* usb_otg_hs */ 24844d02acfSHema HK static struct omap_hwmod_irq_info omap2430_usbhsotg_mpu_irqs[] = { 24944d02acfSHema HK 2507d7e1ebaSTony Lindgren { .name = "mc", .irq = 92 + OMAP_INTC_START, }, 2517d7e1ebaSTony Lindgren { .name = "dma", .irq = 93 + OMAP_INTC_START, }, 2527d7e1ebaSTony Lindgren { .irq = -1 }, 25344d02acfSHema HK }; 25444d02acfSHema HK 25544d02acfSHema HK static struct omap_hwmod omap2430_usbhsotg_hwmod = { 25644d02acfSHema HK .name = "usb_otg_hs", 25744d02acfSHema HK .mpu_irqs = omap2430_usbhsotg_mpu_irqs, 25844d02acfSHema HK .main_clk = "usbhs_ick", 25944d02acfSHema HK .prcm = { 26044d02acfSHema HK .omap2 = { 26144d02acfSHema HK .prcm_reg_id = 1, 26244d02acfSHema HK .module_bit = OMAP2430_EN_USBHS_MASK, 26344d02acfSHema HK .module_offs = CORE_MOD, 26444d02acfSHema HK .idlest_reg_id = 1, 26544d02acfSHema HK .idlest_idle_bit = OMAP2430_ST_USBHS_SHIFT, 26644d02acfSHema HK }, 26744d02acfSHema HK }, 26844d02acfSHema HK .class = &usbotg_class, 26944d02acfSHema HK /* 27044d02acfSHema HK * Erratum ID: i479 idle_req / idle_ack mechanism potentially 27144d02acfSHema HK * broken when autoidle is enabled 27244d02acfSHema HK * workaround is to disable the autoidle bit at module level. 27344d02acfSHema HK */ 27444d02acfSHema HK .flags = HWMOD_NO_OCP_AUTOIDLE | HWMOD_SWSUP_SIDLE 27544d02acfSHema HK | HWMOD_SWSUP_MSTANDBY, 27644d02acfSHema HK }; 27744d02acfSHema HK 27837801b3dSCharulatha V /* 27937801b3dSCharulatha V * 'mcbsp' class 28037801b3dSCharulatha V * multi channel buffered serial port controller 28137801b3dSCharulatha V */ 28204aa67deSTony Lindgren 28337801b3dSCharulatha V static struct omap_hwmod_class_sysconfig omap2430_mcbsp_sysc = { 28437801b3dSCharulatha V .rev_offs = 0x007C, 28537801b3dSCharulatha V .sysc_offs = 0x008C, 28637801b3dSCharulatha V .sysc_flags = (SYSC_HAS_SOFTRESET), 28737801b3dSCharulatha V .sysc_fields = &omap_hwmod_sysc_type1, 28837801b3dSCharulatha V }; 28937801b3dSCharulatha V 29037801b3dSCharulatha V static struct omap_hwmod_class omap2430_mcbsp_hwmod_class = { 29137801b3dSCharulatha V .name = "mcbsp", 29237801b3dSCharulatha V .sysc = &omap2430_mcbsp_sysc, 29337801b3dSCharulatha V .rev = MCBSP_CONFIG_TYPE2, 29437801b3dSCharulatha V }; 29537801b3dSCharulatha V 296db382a86SPeter Ujfalusi static struct omap_hwmod_opt_clk mcbsp_opt_clks[] = { 297db382a86SPeter Ujfalusi { .role = "pad_fck", .clk = "mcbsp_clks" }, 298db382a86SPeter Ujfalusi { .role = "prcm_fck", .clk = "func_96m_ck" }, 299db382a86SPeter Ujfalusi }; 300db382a86SPeter Ujfalusi 30137801b3dSCharulatha V /* mcbsp1 */ 30237801b3dSCharulatha V static struct omap_hwmod_irq_info omap2430_mcbsp1_irqs[] = { 3037d7e1ebaSTony Lindgren { .name = "tx", .irq = 59 + OMAP_INTC_START, }, 3047d7e1ebaSTony Lindgren { .name = "rx", .irq = 60 + OMAP_INTC_START, }, 3057d7e1ebaSTony Lindgren { .name = "ovr", .irq = 61 + OMAP_INTC_START, }, 3067d7e1ebaSTony Lindgren { .name = "common", .irq = 64 + OMAP_INTC_START, }, 3077d7e1ebaSTony Lindgren { .irq = -1 }, 30837801b3dSCharulatha V }; 30937801b3dSCharulatha V 31037801b3dSCharulatha V static struct omap_hwmod omap2430_mcbsp1_hwmod = { 31137801b3dSCharulatha V .name = "mcbsp1", 31237801b3dSCharulatha V .class = &omap2430_mcbsp_hwmod_class, 31337801b3dSCharulatha V .mpu_irqs = omap2430_mcbsp1_irqs, 314d826ebfaSPaul Walmsley .sdma_reqs = omap2_mcbsp1_sdma_reqs, 31537801b3dSCharulatha V .main_clk = "mcbsp1_fck", 31637801b3dSCharulatha V .prcm = { 31737801b3dSCharulatha V .omap2 = { 31837801b3dSCharulatha V .prcm_reg_id = 1, 31937801b3dSCharulatha V .module_bit = OMAP24XX_EN_MCBSP1_SHIFT, 32037801b3dSCharulatha V .module_offs = CORE_MOD, 32137801b3dSCharulatha V .idlest_reg_id = 1, 32237801b3dSCharulatha V .idlest_idle_bit = OMAP24XX_ST_MCBSP1_SHIFT, 32337801b3dSCharulatha V }, 32437801b3dSCharulatha V }, 325db382a86SPeter Ujfalusi .opt_clks = mcbsp_opt_clks, 326db382a86SPeter Ujfalusi .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks), 32737801b3dSCharulatha V }; 32837801b3dSCharulatha V 32937801b3dSCharulatha V /* mcbsp2 */ 33037801b3dSCharulatha V static struct omap_hwmod_irq_info omap2430_mcbsp2_irqs[] = { 3317d7e1ebaSTony Lindgren { .name = "tx", .irq = 62 + OMAP_INTC_START, }, 3327d7e1ebaSTony Lindgren { .name = "rx", .irq = 63 + OMAP_INTC_START, }, 3337d7e1ebaSTony Lindgren { .name = "common", .irq = 16 + OMAP_INTC_START, }, 3347d7e1ebaSTony Lindgren { .irq = -1 }, 33537801b3dSCharulatha V }; 33637801b3dSCharulatha V 33737801b3dSCharulatha V static struct omap_hwmod omap2430_mcbsp2_hwmod = { 33837801b3dSCharulatha V .name = "mcbsp2", 33937801b3dSCharulatha V .class = &omap2430_mcbsp_hwmod_class, 34037801b3dSCharulatha V .mpu_irqs = omap2430_mcbsp2_irqs, 341d826ebfaSPaul Walmsley .sdma_reqs = omap2_mcbsp2_sdma_reqs, 34237801b3dSCharulatha V .main_clk = "mcbsp2_fck", 34337801b3dSCharulatha V .prcm = { 34437801b3dSCharulatha V .omap2 = { 34537801b3dSCharulatha V .prcm_reg_id = 1, 34637801b3dSCharulatha V .module_bit = OMAP24XX_EN_MCBSP2_SHIFT, 34737801b3dSCharulatha V .module_offs = CORE_MOD, 34837801b3dSCharulatha V .idlest_reg_id = 1, 34937801b3dSCharulatha V .idlest_idle_bit = OMAP24XX_ST_MCBSP2_SHIFT, 35037801b3dSCharulatha V }, 35137801b3dSCharulatha V }, 352db382a86SPeter Ujfalusi .opt_clks = mcbsp_opt_clks, 353db382a86SPeter Ujfalusi .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks), 35437801b3dSCharulatha V }; 35537801b3dSCharulatha V 35637801b3dSCharulatha V /* mcbsp3 */ 35737801b3dSCharulatha V static struct omap_hwmod_irq_info omap2430_mcbsp3_irqs[] = { 3587d7e1ebaSTony Lindgren { .name = "tx", .irq = 89 + OMAP_INTC_START, }, 3597d7e1ebaSTony Lindgren { .name = "rx", .irq = 90 + OMAP_INTC_START, }, 3607d7e1ebaSTony Lindgren { .name = "common", .irq = 17 + OMAP_INTC_START, }, 3617d7e1ebaSTony Lindgren { .irq = -1 }, 36237801b3dSCharulatha V }; 36337801b3dSCharulatha V 36437801b3dSCharulatha V static struct omap_hwmod omap2430_mcbsp3_hwmod = { 36537801b3dSCharulatha V .name = "mcbsp3", 36637801b3dSCharulatha V .class = &omap2430_mcbsp_hwmod_class, 36737801b3dSCharulatha V .mpu_irqs = omap2430_mcbsp3_irqs, 368d826ebfaSPaul Walmsley .sdma_reqs = omap2_mcbsp3_sdma_reqs, 36937801b3dSCharulatha V .main_clk = "mcbsp3_fck", 37037801b3dSCharulatha V .prcm = { 37137801b3dSCharulatha V .omap2 = { 37237801b3dSCharulatha V .prcm_reg_id = 1, 37337801b3dSCharulatha V .module_bit = OMAP2430_EN_MCBSP3_SHIFT, 37437801b3dSCharulatha V .module_offs = CORE_MOD, 37537801b3dSCharulatha V .idlest_reg_id = 2, 37637801b3dSCharulatha V .idlest_idle_bit = OMAP2430_ST_MCBSP3_SHIFT, 37737801b3dSCharulatha V }, 37837801b3dSCharulatha V }, 379db382a86SPeter Ujfalusi .opt_clks = mcbsp_opt_clks, 380db382a86SPeter Ujfalusi .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks), 38137801b3dSCharulatha V }; 38237801b3dSCharulatha V 38337801b3dSCharulatha V /* mcbsp4 */ 38437801b3dSCharulatha V static struct omap_hwmod_irq_info omap2430_mcbsp4_irqs[] = { 3857d7e1ebaSTony Lindgren { .name = "tx", .irq = 54 + OMAP_INTC_START, }, 3867d7e1ebaSTony Lindgren { .name = "rx", .irq = 55 + OMAP_INTC_START, }, 3877d7e1ebaSTony Lindgren { .name = "common", .irq = 18 + OMAP_INTC_START, }, 3887d7e1ebaSTony Lindgren { .irq = -1 }, 38937801b3dSCharulatha V }; 39037801b3dSCharulatha V 39137801b3dSCharulatha V static struct omap_hwmod_dma_info omap2430_mcbsp4_sdma_chs[] = { 39237801b3dSCharulatha V { .name = "rx", .dma_req = 20 }, 39337801b3dSCharulatha V { .name = "tx", .dma_req = 19 }, 394bc614958SPaul Walmsley { .dma_req = -1 } 39537801b3dSCharulatha V }; 39637801b3dSCharulatha V 39737801b3dSCharulatha V static struct omap_hwmod omap2430_mcbsp4_hwmod = { 39837801b3dSCharulatha V .name = "mcbsp4", 39937801b3dSCharulatha V .class = &omap2430_mcbsp_hwmod_class, 40037801b3dSCharulatha V .mpu_irqs = omap2430_mcbsp4_irqs, 40137801b3dSCharulatha V .sdma_reqs = omap2430_mcbsp4_sdma_chs, 40237801b3dSCharulatha V .main_clk = "mcbsp4_fck", 40337801b3dSCharulatha V .prcm = { 40437801b3dSCharulatha V .omap2 = { 40537801b3dSCharulatha V .prcm_reg_id = 1, 40637801b3dSCharulatha V .module_bit = OMAP2430_EN_MCBSP4_SHIFT, 40737801b3dSCharulatha V .module_offs = CORE_MOD, 40837801b3dSCharulatha V .idlest_reg_id = 2, 40937801b3dSCharulatha V .idlest_idle_bit = OMAP2430_ST_MCBSP4_SHIFT, 41037801b3dSCharulatha V }, 41137801b3dSCharulatha V }, 412db382a86SPeter Ujfalusi .opt_clks = mcbsp_opt_clks, 413db382a86SPeter Ujfalusi .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks), 41437801b3dSCharulatha V }; 41537801b3dSCharulatha V 41637801b3dSCharulatha V /* mcbsp5 */ 41737801b3dSCharulatha V static struct omap_hwmod_irq_info omap2430_mcbsp5_irqs[] = { 4187d7e1ebaSTony Lindgren { .name = "tx", .irq = 81 + OMAP_INTC_START, }, 4197d7e1ebaSTony Lindgren { .name = "rx", .irq = 82 + OMAP_INTC_START, }, 4207d7e1ebaSTony Lindgren { .name = "common", .irq = 19 + OMAP_INTC_START, }, 4217d7e1ebaSTony Lindgren { .irq = -1 }, 42237801b3dSCharulatha V }; 42337801b3dSCharulatha V 42437801b3dSCharulatha V static struct omap_hwmod_dma_info omap2430_mcbsp5_sdma_chs[] = { 42537801b3dSCharulatha V { .name = "rx", .dma_req = 22 }, 42637801b3dSCharulatha V { .name = "tx", .dma_req = 21 }, 427bc614958SPaul Walmsley { .dma_req = -1 } 42837801b3dSCharulatha V }; 42937801b3dSCharulatha V 43037801b3dSCharulatha V static struct omap_hwmod omap2430_mcbsp5_hwmod = { 43137801b3dSCharulatha V .name = "mcbsp5", 43237801b3dSCharulatha V .class = &omap2430_mcbsp_hwmod_class, 43337801b3dSCharulatha V .mpu_irqs = omap2430_mcbsp5_irqs, 43437801b3dSCharulatha V .sdma_reqs = omap2430_mcbsp5_sdma_chs, 43537801b3dSCharulatha V .main_clk = "mcbsp5_fck", 43637801b3dSCharulatha V .prcm = { 43737801b3dSCharulatha V .omap2 = { 43837801b3dSCharulatha V .prcm_reg_id = 1, 43937801b3dSCharulatha V .module_bit = OMAP2430_EN_MCBSP5_SHIFT, 44037801b3dSCharulatha V .module_offs = CORE_MOD, 44137801b3dSCharulatha V .idlest_reg_id = 2, 44237801b3dSCharulatha V .idlest_idle_bit = OMAP2430_ST_MCBSP5_SHIFT, 44337801b3dSCharulatha V }, 44437801b3dSCharulatha V }, 445db382a86SPeter Ujfalusi .opt_clks = mcbsp_opt_clks, 446db382a86SPeter Ujfalusi .opt_clks_cnt = ARRAY_SIZE(mcbsp_opt_clks), 44737801b3dSCharulatha V }; 44804aa67deSTony Lindgren 449bce06f37SPaul Walmsley /* MMC/SD/SDIO common */ 450bce06f37SPaul Walmsley static struct omap_hwmod_class_sysconfig omap2430_mmc_sysc = { 451bce06f37SPaul Walmsley .rev_offs = 0x1fc, 452bce06f37SPaul Walmsley .sysc_offs = 0x10, 453bce06f37SPaul Walmsley .syss_offs = 0x14, 454bce06f37SPaul Walmsley .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | 455bce06f37SPaul Walmsley SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | 456bce06f37SPaul Walmsley SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), 457bce06f37SPaul Walmsley .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), 458bce06f37SPaul Walmsley .sysc_fields = &omap_hwmod_sysc_type1, 459bce06f37SPaul Walmsley }; 460bce06f37SPaul Walmsley 461bce06f37SPaul Walmsley static struct omap_hwmod_class omap2430_mmc_class = { 462bce06f37SPaul Walmsley .name = "mmc", 463bce06f37SPaul Walmsley .sysc = &omap2430_mmc_sysc, 464bce06f37SPaul Walmsley }; 465bce06f37SPaul Walmsley 466bce06f37SPaul Walmsley /* MMC/SD/SDIO1 */ 467bce06f37SPaul Walmsley static struct omap_hwmod_irq_info omap2430_mmc1_mpu_irqs[] = { 4687d7e1ebaSTony Lindgren { .irq = 83 + OMAP_INTC_START, }, 4697d7e1ebaSTony Lindgren { .irq = -1 }, 470bce06f37SPaul Walmsley }; 471bce06f37SPaul Walmsley 472bce06f37SPaul Walmsley static struct omap_hwmod_dma_info omap2430_mmc1_sdma_reqs[] = { 473bce06f37SPaul Walmsley { .name = "tx", .dma_req = 61 }, /* DMA_MMC1_TX */ 474bce06f37SPaul Walmsley { .name = "rx", .dma_req = 62 }, /* DMA_MMC1_RX */ 475bc614958SPaul Walmsley { .dma_req = -1 } 476bce06f37SPaul Walmsley }; 477bce06f37SPaul Walmsley 478bce06f37SPaul Walmsley static struct omap_hwmod_opt_clk omap2430_mmc1_opt_clks[] = { 479bce06f37SPaul Walmsley { .role = "dbck", .clk = "mmchsdb1_fck" }, 480bce06f37SPaul Walmsley }; 481bce06f37SPaul Walmsley 4826ab8946fSKishore Kadiyala static struct omap_mmc_dev_attr mmc1_dev_attr = { 4836ab8946fSKishore Kadiyala .flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT, 4846ab8946fSKishore Kadiyala }; 4856ab8946fSKishore Kadiyala 486bce06f37SPaul Walmsley static struct omap_hwmod omap2430_mmc1_hwmod = { 487bce06f37SPaul Walmsley .name = "mmc1", 488bce06f37SPaul Walmsley .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 489bce06f37SPaul Walmsley .mpu_irqs = omap2430_mmc1_mpu_irqs, 490bce06f37SPaul Walmsley .sdma_reqs = omap2430_mmc1_sdma_reqs, 491bce06f37SPaul Walmsley .opt_clks = omap2430_mmc1_opt_clks, 492bce06f37SPaul Walmsley .opt_clks_cnt = ARRAY_SIZE(omap2430_mmc1_opt_clks), 493bce06f37SPaul Walmsley .main_clk = "mmchs1_fck", 494bce06f37SPaul Walmsley .prcm = { 495bce06f37SPaul Walmsley .omap2 = { 496bce06f37SPaul Walmsley .module_offs = CORE_MOD, 497bce06f37SPaul Walmsley .prcm_reg_id = 2, 498bce06f37SPaul Walmsley .module_bit = OMAP2430_EN_MMCHS1_SHIFT, 499bce06f37SPaul Walmsley .idlest_reg_id = 2, 500bce06f37SPaul Walmsley .idlest_idle_bit = OMAP2430_ST_MMCHS1_SHIFT, 501bce06f37SPaul Walmsley }, 502bce06f37SPaul Walmsley }, 5036ab8946fSKishore Kadiyala .dev_attr = &mmc1_dev_attr, 504bce06f37SPaul Walmsley .class = &omap2430_mmc_class, 505bce06f37SPaul Walmsley }; 506bce06f37SPaul Walmsley 507bce06f37SPaul Walmsley /* MMC/SD/SDIO2 */ 508bce06f37SPaul Walmsley static struct omap_hwmod_irq_info omap2430_mmc2_mpu_irqs[] = { 5097d7e1ebaSTony Lindgren { .irq = 86 + OMAP_INTC_START, }, 5107d7e1ebaSTony Lindgren { .irq = -1 }, 511bce06f37SPaul Walmsley }; 512bce06f37SPaul Walmsley 513bce06f37SPaul Walmsley static struct omap_hwmod_dma_info omap2430_mmc2_sdma_reqs[] = { 514bce06f37SPaul Walmsley { .name = "tx", .dma_req = 47 }, /* DMA_MMC2_TX */ 515bce06f37SPaul Walmsley { .name = "rx", .dma_req = 48 }, /* DMA_MMC2_RX */ 516bc614958SPaul Walmsley { .dma_req = -1 } 517bce06f37SPaul Walmsley }; 518bce06f37SPaul Walmsley 519bce06f37SPaul Walmsley static struct omap_hwmod_opt_clk omap2430_mmc2_opt_clks[] = { 520bce06f37SPaul Walmsley { .role = "dbck", .clk = "mmchsdb2_fck" }, 521bce06f37SPaul Walmsley }; 522bce06f37SPaul Walmsley 523bce06f37SPaul Walmsley static struct omap_hwmod omap2430_mmc2_hwmod = { 524bce06f37SPaul Walmsley .name = "mmc2", 525bce06f37SPaul Walmsley .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, 526bce06f37SPaul Walmsley .mpu_irqs = omap2430_mmc2_mpu_irqs, 527bce06f37SPaul Walmsley .sdma_reqs = omap2430_mmc2_sdma_reqs, 528bce06f37SPaul Walmsley .opt_clks = omap2430_mmc2_opt_clks, 529bce06f37SPaul Walmsley .opt_clks_cnt = ARRAY_SIZE(omap2430_mmc2_opt_clks), 530bce06f37SPaul Walmsley .main_clk = "mmchs2_fck", 531bce06f37SPaul Walmsley .prcm = { 532bce06f37SPaul Walmsley .omap2 = { 533bce06f37SPaul Walmsley .module_offs = CORE_MOD, 534bce06f37SPaul Walmsley .prcm_reg_id = 2, 535bce06f37SPaul Walmsley .module_bit = OMAP2430_EN_MMCHS2_SHIFT, 536bce06f37SPaul Walmsley .idlest_reg_id = 2, 537bce06f37SPaul Walmsley .idlest_idle_bit = OMAP2430_ST_MMCHS2_SHIFT, 538bce06f37SPaul Walmsley }, 539bce06f37SPaul Walmsley }, 540bce06f37SPaul Walmsley .class = &omap2430_mmc_class, 541bce06f37SPaul Walmsley }; 542046465b7SKevin Hilman 543f32bd778SPaul Walmsley /* HDQ1W/1-wire */ 544f32bd778SPaul Walmsley static struct omap_hwmod omap2430_hdq1w_hwmod = { 545f32bd778SPaul Walmsley .name = "hdq1w", 546f32bd778SPaul Walmsley .mpu_irqs = omap2_hdq1w_mpu_irqs, 547f32bd778SPaul Walmsley .main_clk = "hdq_fck", 548f32bd778SPaul Walmsley .prcm = { 549f32bd778SPaul Walmsley .omap2 = { 550f32bd778SPaul Walmsley .module_offs = CORE_MOD, 551f32bd778SPaul Walmsley .prcm_reg_id = 1, 552f32bd778SPaul Walmsley .module_bit = OMAP24XX_EN_HDQ_SHIFT, 553f32bd778SPaul Walmsley .idlest_reg_id = 1, 554f32bd778SPaul Walmsley .idlest_idle_bit = OMAP24XX_ST_HDQ_SHIFT, 555f32bd778SPaul Walmsley }, 556f32bd778SPaul Walmsley }, 557f32bd778SPaul Walmsley .class = &omap2_hdq1w_class, 558f32bd778SPaul Walmsley }; 559f32bd778SPaul Walmsley 560844a3b63SPaul Walmsley /* 561844a3b63SPaul Walmsley * interfaces 562844a3b63SPaul Walmsley */ 563844a3b63SPaul Walmsley 564844a3b63SPaul Walmsley /* L3 -> L4_CORE interface */ 565844a3b63SPaul Walmsley /* l3_core -> usbhsotg interface */ 566844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_usbhsotg__l3 = { 567844a3b63SPaul Walmsley .master = &omap2430_usbhsotg_hwmod, 568cb48427eSPaul Walmsley .slave = &omap2xxx_l3_main_hwmod, 569844a3b63SPaul Walmsley .clk = "core_l3_ck", 570844a3b63SPaul Walmsley .user = OCP_USER_MPU, 571844a3b63SPaul Walmsley }; 572844a3b63SPaul Walmsley 573844a3b63SPaul Walmsley /* L4 CORE -> I2C1 interface */ 574844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__i2c1 = { 575cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 576844a3b63SPaul Walmsley .slave = &omap2430_i2c1_hwmod, 577844a3b63SPaul Walmsley .clk = "i2c1_ick", 578844a3b63SPaul Walmsley .addr = omap2_i2c1_addr_space, 579844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 580844a3b63SPaul Walmsley }; 581844a3b63SPaul Walmsley 582844a3b63SPaul Walmsley /* L4 CORE -> I2C2 interface */ 583844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__i2c2 = { 584cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 585844a3b63SPaul Walmsley .slave = &omap2430_i2c2_hwmod, 586844a3b63SPaul Walmsley .clk = "i2c2_ick", 587844a3b63SPaul Walmsley .addr = omap2_i2c2_addr_space, 588844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 589844a3b63SPaul Walmsley }; 590844a3b63SPaul Walmsley 591844a3b63SPaul Walmsley static struct omap_hwmod_addr_space omap2430_usbhsotg_addrs[] = { 592844a3b63SPaul Walmsley { 593844a3b63SPaul Walmsley .pa_start = OMAP243X_HS_BASE, 594844a3b63SPaul Walmsley .pa_end = OMAP243X_HS_BASE + SZ_4K - 1, 595844a3b63SPaul Walmsley .flags = ADDR_TYPE_RT 596844a3b63SPaul Walmsley }, 597844a3b63SPaul Walmsley { } 598844a3b63SPaul Walmsley }; 599844a3b63SPaul Walmsley 600844a3b63SPaul Walmsley /* l4_core ->usbhsotg interface */ 601844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__usbhsotg = { 602cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 603844a3b63SPaul Walmsley .slave = &omap2430_usbhsotg_hwmod, 604844a3b63SPaul Walmsley .clk = "usb_l4_ick", 605844a3b63SPaul Walmsley .addr = omap2430_usbhsotg_addrs, 606844a3b63SPaul Walmsley .user = OCP_USER_MPU, 607844a3b63SPaul Walmsley }; 608844a3b63SPaul Walmsley 609844a3b63SPaul Walmsley /* L4 CORE -> MMC1 interface */ 610844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__mmc1 = { 611cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 612844a3b63SPaul Walmsley .slave = &omap2430_mmc1_hwmod, 613844a3b63SPaul Walmsley .clk = "mmchs1_ick", 614844a3b63SPaul Walmsley .addr = omap2430_mmc1_addr_space, 615844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 616844a3b63SPaul Walmsley }; 617844a3b63SPaul Walmsley 618844a3b63SPaul Walmsley /* L4 CORE -> MMC2 interface */ 619844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__mmc2 = { 620cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 621844a3b63SPaul Walmsley .slave = &omap2430_mmc2_hwmod, 622844a3b63SPaul Walmsley .clk = "mmchs2_ick", 623844a3b63SPaul Walmsley .addr = omap2430_mmc2_addr_space, 624844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 625844a3b63SPaul Walmsley }; 626844a3b63SPaul Walmsley 627844a3b63SPaul Walmsley /* l4 core -> mcspi3 interface */ 628844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi3 = { 629cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 630844a3b63SPaul Walmsley .slave = &omap2430_mcspi3_hwmod, 631844a3b63SPaul Walmsley .clk = "mcspi3_ick", 632844a3b63SPaul Walmsley .addr = omap2430_mcspi3_addr_space, 633844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 634844a3b63SPaul Walmsley }; 635844a3b63SPaul Walmsley 636844a3b63SPaul Walmsley /* IVA2 <- L3 interface */ 637844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l3__iva = { 638cb48427eSPaul Walmsley .master = &omap2xxx_l3_main_hwmod, 639844a3b63SPaul Walmsley .slave = &omap2430_iva_hwmod, 6403af35fbcSPaul Walmsley .clk = "core_l3_ck", 641844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 642844a3b63SPaul Walmsley }; 643844a3b63SPaul Walmsley 644844a3b63SPaul Walmsley static struct omap_hwmod_addr_space omap2430_timer1_addrs[] = { 645844a3b63SPaul Walmsley { 646844a3b63SPaul Walmsley .pa_start = 0x49018000, 647844a3b63SPaul Walmsley .pa_end = 0x49018000 + SZ_1K - 1, 648844a3b63SPaul Walmsley .flags = ADDR_TYPE_RT 649844a3b63SPaul Walmsley }, 650844a3b63SPaul Walmsley { } 651844a3b63SPaul Walmsley }; 652844a3b63SPaul Walmsley 653844a3b63SPaul Walmsley /* l4_wkup -> timer1 */ 654844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_wkup__timer1 = { 655cb48427eSPaul Walmsley .master = &omap2xxx_l4_wkup_hwmod, 656cb48427eSPaul Walmsley .slave = &omap2xxx_timer1_hwmod, 657844a3b63SPaul Walmsley .clk = "gpt1_ick", 658844a3b63SPaul Walmsley .addr = omap2430_timer1_addrs, 659844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 660844a3b63SPaul Walmsley }; 661844a3b63SPaul Walmsley 662844a3b63SPaul Walmsley /* l4_wkup -> wd_timer2 */ 663844a3b63SPaul Walmsley static struct omap_hwmod_addr_space omap2430_wd_timer2_addrs[] = { 664844a3b63SPaul Walmsley { 665844a3b63SPaul Walmsley .pa_start = 0x49016000, 666844a3b63SPaul Walmsley .pa_end = 0x4901607f, 667844a3b63SPaul Walmsley .flags = ADDR_TYPE_RT 668844a3b63SPaul Walmsley }, 669844a3b63SPaul Walmsley { } 670844a3b63SPaul Walmsley }; 671844a3b63SPaul Walmsley 672844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = { 673cb48427eSPaul Walmsley .master = &omap2xxx_l4_wkup_hwmod, 674cb48427eSPaul Walmsley .slave = &omap2xxx_wd_timer2_hwmod, 675844a3b63SPaul Walmsley .clk = "mpu_wdt_ick", 676844a3b63SPaul Walmsley .addr = omap2430_wd_timer2_addrs, 677844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 678844a3b63SPaul Walmsley }; 679844a3b63SPaul Walmsley 680844a3b63SPaul Walmsley /* l4_wkup -> gpio1 */ 681844a3b63SPaul Walmsley static struct omap_hwmod_addr_space omap2430_gpio1_addr_space[] = { 682844a3b63SPaul Walmsley { 683844a3b63SPaul Walmsley .pa_start = 0x4900C000, 684844a3b63SPaul Walmsley .pa_end = 0x4900C1ff, 685844a3b63SPaul Walmsley .flags = ADDR_TYPE_RT 686844a3b63SPaul Walmsley }, 687844a3b63SPaul Walmsley { } 688844a3b63SPaul Walmsley }; 689844a3b63SPaul Walmsley 690844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio1 = { 691cb48427eSPaul Walmsley .master = &omap2xxx_l4_wkup_hwmod, 692cb48427eSPaul Walmsley .slave = &omap2xxx_gpio1_hwmod, 693844a3b63SPaul Walmsley .clk = "gpios_ick", 694844a3b63SPaul Walmsley .addr = omap2430_gpio1_addr_space, 695844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 696844a3b63SPaul Walmsley }; 697844a3b63SPaul Walmsley 698844a3b63SPaul Walmsley /* l4_wkup -> gpio2 */ 699844a3b63SPaul Walmsley static struct omap_hwmod_addr_space omap2430_gpio2_addr_space[] = { 700844a3b63SPaul Walmsley { 701844a3b63SPaul Walmsley .pa_start = 0x4900E000, 702844a3b63SPaul Walmsley .pa_end = 0x4900E1ff, 703844a3b63SPaul Walmsley .flags = ADDR_TYPE_RT 704844a3b63SPaul Walmsley }, 705844a3b63SPaul Walmsley { } 706844a3b63SPaul Walmsley }; 707844a3b63SPaul Walmsley 708844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio2 = { 709cb48427eSPaul Walmsley .master = &omap2xxx_l4_wkup_hwmod, 710cb48427eSPaul Walmsley .slave = &omap2xxx_gpio2_hwmod, 711844a3b63SPaul Walmsley .clk = "gpios_ick", 712844a3b63SPaul Walmsley .addr = omap2430_gpio2_addr_space, 713844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 714844a3b63SPaul Walmsley }; 715844a3b63SPaul Walmsley 716844a3b63SPaul Walmsley /* l4_wkup -> gpio3 */ 717844a3b63SPaul Walmsley static struct omap_hwmod_addr_space omap2430_gpio3_addr_space[] = { 718844a3b63SPaul Walmsley { 719844a3b63SPaul Walmsley .pa_start = 0x49010000, 720844a3b63SPaul Walmsley .pa_end = 0x490101ff, 721844a3b63SPaul Walmsley .flags = ADDR_TYPE_RT 722844a3b63SPaul Walmsley }, 723844a3b63SPaul Walmsley { } 724844a3b63SPaul Walmsley }; 725844a3b63SPaul Walmsley 726844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio3 = { 727cb48427eSPaul Walmsley .master = &omap2xxx_l4_wkup_hwmod, 728cb48427eSPaul Walmsley .slave = &omap2xxx_gpio3_hwmod, 729844a3b63SPaul Walmsley .clk = "gpios_ick", 730844a3b63SPaul Walmsley .addr = omap2430_gpio3_addr_space, 731844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 732844a3b63SPaul Walmsley }; 733844a3b63SPaul Walmsley 734844a3b63SPaul Walmsley /* l4_wkup -> gpio4 */ 735844a3b63SPaul Walmsley static struct omap_hwmod_addr_space omap2430_gpio4_addr_space[] = { 736844a3b63SPaul Walmsley { 737844a3b63SPaul Walmsley .pa_start = 0x49012000, 738844a3b63SPaul Walmsley .pa_end = 0x490121ff, 739844a3b63SPaul Walmsley .flags = ADDR_TYPE_RT 740844a3b63SPaul Walmsley }, 741844a3b63SPaul Walmsley { } 742844a3b63SPaul Walmsley }; 743844a3b63SPaul Walmsley 744844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio4 = { 745cb48427eSPaul Walmsley .master = &omap2xxx_l4_wkup_hwmod, 746cb48427eSPaul Walmsley .slave = &omap2xxx_gpio4_hwmod, 747844a3b63SPaul Walmsley .clk = "gpios_ick", 748844a3b63SPaul Walmsley .addr = omap2430_gpio4_addr_space, 749844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 750844a3b63SPaul Walmsley }; 751844a3b63SPaul Walmsley 752844a3b63SPaul Walmsley /* l4_core -> gpio5 */ 753844a3b63SPaul Walmsley static struct omap_hwmod_addr_space omap2430_gpio5_addr_space[] = { 754844a3b63SPaul Walmsley { 755844a3b63SPaul Walmsley .pa_start = 0x480B6000, 756844a3b63SPaul Walmsley .pa_end = 0x480B61ff, 757844a3b63SPaul Walmsley .flags = ADDR_TYPE_RT 758844a3b63SPaul Walmsley }, 759844a3b63SPaul Walmsley { } 760844a3b63SPaul Walmsley }; 761844a3b63SPaul Walmsley 762844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__gpio5 = { 763cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 764844a3b63SPaul Walmsley .slave = &omap2430_gpio5_hwmod, 765844a3b63SPaul Walmsley .clk = "gpio5_ick", 766844a3b63SPaul Walmsley .addr = omap2430_gpio5_addr_space, 767844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 768844a3b63SPaul Walmsley }; 769844a3b63SPaul Walmsley 770844a3b63SPaul Walmsley /* dma_system -> L3 */ 771844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_dma_system__l3 = { 772844a3b63SPaul Walmsley .master = &omap2430_dma_system_hwmod, 773cb48427eSPaul Walmsley .slave = &omap2xxx_l3_main_hwmod, 774844a3b63SPaul Walmsley .clk = "core_l3_ck", 775844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 776844a3b63SPaul Walmsley }; 777844a3b63SPaul Walmsley 778844a3b63SPaul Walmsley /* l4_core -> dma_system */ 779844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__dma_system = { 780cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 781844a3b63SPaul Walmsley .slave = &omap2430_dma_system_hwmod, 782844a3b63SPaul Walmsley .clk = "sdma_ick", 783844a3b63SPaul Walmsley .addr = omap2_dma_system_addrs, 784844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 785844a3b63SPaul Walmsley }; 786844a3b63SPaul Walmsley 787844a3b63SPaul Walmsley /* l4_core -> mailbox */ 788844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__mailbox = { 789cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 790844a3b63SPaul Walmsley .slave = &omap2430_mailbox_hwmod, 791844a3b63SPaul Walmsley .addr = omap2_mailbox_addrs, 792844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 793844a3b63SPaul Walmsley }; 794844a3b63SPaul Walmsley 795844a3b63SPaul Walmsley /* l4_core -> mcbsp1 */ 796844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp1 = { 797cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 798844a3b63SPaul Walmsley .slave = &omap2430_mcbsp1_hwmod, 799844a3b63SPaul Walmsley .clk = "mcbsp1_ick", 800844a3b63SPaul Walmsley .addr = omap2_mcbsp1_addrs, 801844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 802844a3b63SPaul Walmsley }; 803844a3b63SPaul Walmsley 804844a3b63SPaul Walmsley /* l4_core -> mcbsp2 */ 805844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp2 = { 806cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 807844a3b63SPaul Walmsley .slave = &omap2430_mcbsp2_hwmod, 808844a3b63SPaul Walmsley .clk = "mcbsp2_ick", 809844a3b63SPaul Walmsley .addr = omap2xxx_mcbsp2_addrs, 810844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 811844a3b63SPaul Walmsley }; 812844a3b63SPaul Walmsley 813844a3b63SPaul Walmsley static struct omap_hwmod_addr_space omap2430_mcbsp3_addrs[] = { 814844a3b63SPaul Walmsley { 815844a3b63SPaul Walmsley .name = "mpu", 816844a3b63SPaul Walmsley .pa_start = 0x4808C000, 817844a3b63SPaul Walmsley .pa_end = 0x4808C0ff, 818844a3b63SPaul Walmsley .flags = ADDR_TYPE_RT 819844a3b63SPaul Walmsley }, 820844a3b63SPaul Walmsley { } 821844a3b63SPaul Walmsley }; 822844a3b63SPaul Walmsley 823844a3b63SPaul Walmsley /* l4_core -> mcbsp3 */ 824844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp3 = { 825cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 826844a3b63SPaul Walmsley .slave = &omap2430_mcbsp3_hwmod, 827844a3b63SPaul Walmsley .clk = "mcbsp3_ick", 828844a3b63SPaul Walmsley .addr = omap2430_mcbsp3_addrs, 829844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 830844a3b63SPaul Walmsley }; 831844a3b63SPaul Walmsley 832844a3b63SPaul Walmsley static struct omap_hwmod_addr_space omap2430_mcbsp4_addrs[] = { 833844a3b63SPaul Walmsley { 834844a3b63SPaul Walmsley .name = "mpu", 835844a3b63SPaul Walmsley .pa_start = 0x4808E000, 836844a3b63SPaul Walmsley .pa_end = 0x4808E0ff, 837844a3b63SPaul Walmsley .flags = ADDR_TYPE_RT 838844a3b63SPaul Walmsley }, 839844a3b63SPaul Walmsley { } 840844a3b63SPaul Walmsley }; 841844a3b63SPaul Walmsley 842844a3b63SPaul Walmsley /* l4_core -> mcbsp4 */ 843844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp4 = { 844cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 845844a3b63SPaul Walmsley .slave = &omap2430_mcbsp4_hwmod, 846844a3b63SPaul Walmsley .clk = "mcbsp4_ick", 847844a3b63SPaul Walmsley .addr = omap2430_mcbsp4_addrs, 848844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 849844a3b63SPaul Walmsley }; 850844a3b63SPaul Walmsley 851844a3b63SPaul Walmsley static struct omap_hwmod_addr_space omap2430_mcbsp5_addrs[] = { 852844a3b63SPaul Walmsley { 853844a3b63SPaul Walmsley .name = "mpu", 854844a3b63SPaul Walmsley .pa_start = 0x48096000, 855844a3b63SPaul Walmsley .pa_end = 0x480960ff, 856844a3b63SPaul Walmsley .flags = ADDR_TYPE_RT 857844a3b63SPaul Walmsley }, 858844a3b63SPaul Walmsley { } 859844a3b63SPaul Walmsley }; 860844a3b63SPaul Walmsley 861844a3b63SPaul Walmsley /* l4_core -> mcbsp5 */ 862844a3b63SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp5 = { 863cb48427eSPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 864844a3b63SPaul Walmsley .slave = &omap2430_mcbsp5_hwmod, 865844a3b63SPaul Walmsley .clk = "mcbsp5_ick", 866844a3b63SPaul Walmsley .addr = omap2430_mcbsp5_addrs, 867844a3b63SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 868844a3b63SPaul Walmsley }; 869844a3b63SPaul Walmsley 870f32bd778SPaul Walmsley /* l4_core -> hdq1w */ 871f32bd778SPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__hdq1w = { 872f32bd778SPaul Walmsley .master = &omap2xxx_l4_core_hwmod, 873f32bd778SPaul Walmsley .slave = &omap2430_hdq1w_hwmod, 874f32bd778SPaul Walmsley .clk = "hdq_ick", 875f32bd778SPaul Walmsley .addr = omap2_hdq1w_addr_space, 876f32bd778SPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 877f32bd778SPaul Walmsley .flags = OMAP_FIREWALL_L4 | OCPIF_SWSUP_IDLE, 878f32bd778SPaul Walmsley }; 879f32bd778SPaul Walmsley 880c8d82ff6SVaibhav Hiremath /* l4_wkup -> 32ksync_counter */ 881c8d82ff6SVaibhav Hiremath static struct omap_hwmod_addr_space omap2430_counter_32k_addrs[] = { 882c8d82ff6SVaibhav Hiremath { 883c8d82ff6SVaibhav Hiremath .pa_start = 0x49020000, 884c8d82ff6SVaibhav Hiremath .pa_end = 0x4902001f, 885c8d82ff6SVaibhav Hiremath .flags = ADDR_TYPE_RT 886c8d82ff6SVaibhav Hiremath }, 887c8d82ff6SVaibhav Hiremath { } 888c8d82ff6SVaibhav Hiremath }; 889c8d82ff6SVaibhav Hiremath 89049484a60SAfzal Mohammed static struct omap_hwmod_addr_space omap2430_gpmc_addrs[] = { 89149484a60SAfzal Mohammed { 89249484a60SAfzal Mohammed .pa_start = 0x6e000000, 89349484a60SAfzal Mohammed .pa_end = 0x6e000fff, 89449484a60SAfzal Mohammed .flags = ADDR_TYPE_RT 89549484a60SAfzal Mohammed }, 89649484a60SAfzal Mohammed { } 89749484a60SAfzal Mohammed }; 89849484a60SAfzal Mohammed 899c8d82ff6SVaibhav Hiremath static struct omap_hwmod_ocp_if omap2430_l4_wkup__counter_32k = { 900c8d82ff6SVaibhav Hiremath .master = &omap2xxx_l4_wkup_hwmod, 901c8d82ff6SVaibhav Hiremath .slave = &omap2xxx_counter_32k_hwmod, 902c8d82ff6SVaibhav Hiremath .clk = "sync_32k_ick", 903c8d82ff6SVaibhav Hiremath .addr = omap2430_counter_32k_addrs, 904c8d82ff6SVaibhav Hiremath .user = OCP_USER_MPU | OCP_USER_SDMA, 905c8d82ff6SVaibhav Hiremath }; 906c8d82ff6SVaibhav Hiremath 90749484a60SAfzal Mohammed static struct omap_hwmod_ocp_if omap2430_l3__gpmc = { 90849484a60SAfzal Mohammed .master = &omap2xxx_l3_main_hwmod, 90949484a60SAfzal Mohammed .slave = &omap2xxx_gpmc_hwmod, 91049484a60SAfzal Mohammed .clk = "core_l3_ck", 91149484a60SAfzal Mohammed .addr = omap2430_gpmc_addrs, 91249484a60SAfzal Mohammed .user = OCP_USER_MPU | OCP_USER_SDMA, 91349484a60SAfzal Mohammed }; 91449484a60SAfzal Mohammed 9150a78c5c5SPaul Walmsley static struct omap_hwmod_ocp_if *omap2430_hwmod_ocp_ifs[] __initdata = { 9166a29755fSPaul Walmsley &omap2xxx_l3_main__l4_core, 9176a29755fSPaul Walmsley &omap2xxx_mpu__l3_main, 9186a29755fSPaul Walmsley &omap2xxx_dss__l3, 9190a78c5c5SPaul Walmsley &omap2430_usbhsotg__l3, 9200a78c5c5SPaul Walmsley &omap2430_l4_core__i2c1, 9210a78c5c5SPaul Walmsley &omap2430_l4_core__i2c2, 9226a29755fSPaul Walmsley &omap2xxx_l4_core__l4_wkup, 9230a78c5c5SPaul Walmsley &omap2_l4_core__uart1, 9240a78c5c5SPaul Walmsley &omap2_l4_core__uart2, 9250a78c5c5SPaul Walmsley &omap2_l4_core__uart3, 9260a78c5c5SPaul Walmsley &omap2430_l4_core__usbhsotg, 9270a78c5c5SPaul Walmsley &omap2430_l4_core__mmc1, 9280a78c5c5SPaul Walmsley &omap2430_l4_core__mmc2, 9296a29755fSPaul Walmsley &omap2xxx_l4_core__mcspi1, 9306a29755fSPaul Walmsley &omap2xxx_l4_core__mcspi2, 9310a78c5c5SPaul Walmsley &omap2430_l4_core__mcspi3, 9320a78c5c5SPaul Walmsley &omap2430_l3__iva, 9330a78c5c5SPaul Walmsley &omap2430_l4_wkup__timer1, 9346a29755fSPaul Walmsley &omap2xxx_l4_core__timer2, 9356a29755fSPaul Walmsley &omap2xxx_l4_core__timer3, 9366a29755fSPaul Walmsley &omap2xxx_l4_core__timer4, 9376a29755fSPaul Walmsley &omap2xxx_l4_core__timer5, 9386a29755fSPaul Walmsley &omap2xxx_l4_core__timer6, 9396a29755fSPaul Walmsley &omap2xxx_l4_core__timer7, 9406a29755fSPaul Walmsley &omap2xxx_l4_core__timer8, 9416a29755fSPaul Walmsley &omap2xxx_l4_core__timer9, 9426a29755fSPaul Walmsley &omap2xxx_l4_core__timer10, 9436a29755fSPaul Walmsley &omap2xxx_l4_core__timer11, 9446a29755fSPaul Walmsley &omap2xxx_l4_core__timer12, 9450a78c5c5SPaul Walmsley &omap2430_l4_wkup__wd_timer2, 9466a29755fSPaul Walmsley &omap2xxx_l4_core__dss, 9476a29755fSPaul Walmsley &omap2xxx_l4_core__dss_dispc, 9486a29755fSPaul Walmsley &omap2xxx_l4_core__dss_rfbi, 9496a29755fSPaul Walmsley &omap2xxx_l4_core__dss_venc, 9500a78c5c5SPaul Walmsley &omap2430_l4_wkup__gpio1, 9510a78c5c5SPaul Walmsley &omap2430_l4_wkup__gpio2, 9520a78c5c5SPaul Walmsley &omap2430_l4_wkup__gpio3, 9530a78c5c5SPaul Walmsley &omap2430_l4_wkup__gpio4, 9540a78c5c5SPaul Walmsley &omap2430_l4_core__gpio5, 9550a78c5c5SPaul Walmsley &omap2430_dma_system__l3, 9560a78c5c5SPaul Walmsley &omap2430_l4_core__dma_system, 9570a78c5c5SPaul Walmsley &omap2430_l4_core__mailbox, 9580a78c5c5SPaul Walmsley &omap2430_l4_core__mcbsp1, 9590a78c5c5SPaul Walmsley &omap2430_l4_core__mcbsp2, 9600a78c5c5SPaul Walmsley &omap2430_l4_core__mcbsp3, 9610a78c5c5SPaul Walmsley &omap2430_l4_core__mcbsp4, 9620a78c5c5SPaul Walmsley &omap2430_l4_core__mcbsp5, 963f32bd778SPaul Walmsley &omap2430_l4_core__hdq1w, 964c8d82ff6SVaibhav Hiremath &omap2430_l4_wkup__counter_32k, 96549484a60SAfzal Mohammed &omap2430_l3__gpmc, 9667359154eSPaul Walmsley NULL, 9677359154eSPaul Walmsley }; 9687359154eSPaul Walmsley 9697359154eSPaul Walmsley int __init omap2430_hwmod_init(void) 9707359154eSPaul Walmsley { 9719ebfd285SKevin Hilman omap_hwmod_init(); 9720a78c5c5SPaul Walmsley return omap_hwmod_register_links(omap2430_hwmod_ocp_ifs); 9737359154eSPaul Walmsley } 974