17359154eSPaul Walmsley /* 27359154eSPaul Walmsley * omap_hwmod_2430_data.c - hardware modules present on the OMAP2430 chips 37359154eSPaul Walmsley * 47359154eSPaul Walmsley * Copyright (C) 2009-2010 Nokia Corporation 57359154eSPaul Walmsley * Paul Walmsley 67359154eSPaul Walmsley * 77359154eSPaul Walmsley * This program is free software; you can redistribute it and/or modify 87359154eSPaul Walmsley * it under the terms of the GNU General Public License version 2 as 97359154eSPaul Walmsley * published by the Free Software Foundation. 107359154eSPaul Walmsley * 117359154eSPaul Walmsley * XXX handle crossbar/shared link difference for L3? 127359154eSPaul Walmsley * XXX these should be marked initdata for multi-OMAP kernels 137359154eSPaul Walmsley */ 147359154eSPaul Walmsley #include <plat/omap_hwmod.h> 157359154eSPaul Walmsley #include <mach/irqs.h> 167359154eSPaul Walmsley #include <plat/cpu.h> 177359154eSPaul Walmsley #include <plat/dma.h> 18046465b7SKevin Hilman #include <plat/serial.h> 192004290fSPaul Walmsley #include <plat/i2c.h> 202004290fSPaul Walmsley #include <plat/omap24xx.h> 217359154eSPaul Walmsley 2243b40992SPaul Walmsley #include "omap_hwmod_common_data.h" 2343b40992SPaul Walmsley 247359154eSPaul Walmsley #include "prm-regbits-24xx.h" 25165e2161SVaradarajan, Charulatha #include "cm-regbits-24xx.h" 267359154eSPaul Walmsley 277359154eSPaul Walmsley /* 287359154eSPaul Walmsley * OMAP2430 hardware module integration data 297359154eSPaul Walmsley * 307359154eSPaul Walmsley * ALl of the data in this section should be autogeneratable from the 317359154eSPaul Walmsley * TI hardware database or other technical documentation. Data that 327359154eSPaul Walmsley * is driver-specific or driver-kernel integration-specific belongs 337359154eSPaul Walmsley * elsewhere. 347359154eSPaul Walmsley */ 357359154eSPaul Walmsley 367359154eSPaul Walmsley static struct omap_hwmod omap2430_mpu_hwmod; 3708072acfSPaul Walmsley static struct omap_hwmod omap2430_iva_hwmod; 384a7cf90aSKevin Hilman static struct omap_hwmod omap2430_l3_main_hwmod; 397359154eSPaul Walmsley static struct omap_hwmod omap2430_l4_core_hwmod; 40165e2161SVaradarajan, Charulatha static struct omap_hwmod omap2430_wd_timer2_hwmod; 417359154eSPaul Walmsley 427359154eSPaul Walmsley /* L3 -> L4_CORE interface */ 434a7cf90aSKevin Hilman static struct omap_hwmod_ocp_if omap2430_l3_main__l4_core = { 444a7cf90aSKevin Hilman .master = &omap2430_l3_main_hwmod, 457359154eSPaul Walmsley .slave = &omap2430_l4_core_hwmod, 467359154eSPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 477359154eSPaul Walmsley }; 487359154eSPaul Walmsley 497359154eSPaul Walmsley /* MPU -> L3 interface */ 504a7cf90aSKevin Hilman static struct omap_hwmod_ocp_if omap2430_mpu__l3_main = { 517359154eSPaul Walmsley .master = &omap2430_mpu_hwmod, 524a7cf90aSKevin Hilman .slave = &omap2430_l3_main_hwmod, 537359154eSPaul Walmsley .user = OCP_USER_MPU, 547359154eSPaul Walmsley }; 557359154eSPaul Walmsley 567359154eSPaul Walmsley /* Slave interfaces on the L3 interconnect */ 574a7cf90aSKevin Hilman static struct omap_hwmod_ocp_if *omap2430_l3_main_slaves[] = { 584a7cf90aSKevin Hilman &omap2430_mpu__l3_main, 597359154eSPaul Walmsley }; 607359154eSPaul Walmsley 617359154eSPaul Walmsley /* Master interfaces on the L3 interconnect */ 624a7cf90aSKevin Hilman static struct omap_hwmod_ocp_if *omap2430_l3_main_masters[] = { 634a7cf90aSKevin Hilman &omap2430_l3_main__l4_core, 647359154eSPaul Walmsley }; 657359154eSPaul Walmsley 667359154eSPaul Walmsley /* L3 */ 674a7cf90aSKevin Hilman static struct omap_hwmod omap2430_l3_main_hwmod = { 68fa98347eSBenoit Cousson .name = "l3_main", 6943b40992SPaul Walmsley .class = &l3_hwmod_class, 704a7cf90aSKevin Hilman .masters = omap2430_l3_main_masters, 714a7cf90aSKevin Hilman .masters_cnt = ARRAY_SIZE(omap2430_l3_main_masters), 724a7cf90aSKevin Hilman .slaves = omap2430_l3_main_slaves, 734a7cf90aSKevin Hilman .slaves_cnt = ARRAY_SIZE(omap2430_l3_main_slaves), 742eb1875dSKevin Hilman .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 752eb1875dSKevin Hilman .flags = HWMOD_NO_IDLEST, 767359154eSPaul Walmsley }; 777359154eSPaul Walmsley 787359154eSPaul Walmsley static struct omap_hwmod omap2430_l4_wkup_hwmod; 79046465b7SKevin Hilman static struct omap_hwmod omap2430_uart1_hwmod; 80046465b7SKevin Hilman static struct omap_hwmod omap2430_uart2_hwmod; 81046465b7SKevin Hilman static struct omap_hwmod omap2430_uart3_hwmod; 822004290fSPaul Walmsley static struct omap_hwmod omap2430_i2c1_hwmod; 832004290fSPaul Walmsley static struct omap_hwmod omap2430_i2c2_hwmod; 842004290fSPaul Walmsley 852004290fSPaul Walmsley /* I2C IP block address space length (in bytes) */ 862004290fSPaul Walmsley #define OMAP2_I2C_AS_LEN 128 872004290fSPaul Walmsley 882004290fSPaul Walmsley /* L4 CORE -> I2C1 interface */ 892004290fSPaul Walmsley static struct omap_hwmod_addr_space omap2430_i2c1_addr_space[] = { 902004290fSPaul Walmsley { 912004290fSPaul Walmsley .pa_start = 0x48070000, 922004290fSPaul Walmsley .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN - 1, 932004290fSPaul Walmsley .flags = ADDR_TYPE_RT, 942004290fSPaul Walmsley }, 952004290fSPaul Walmsley }; 962004290fSPaul Walmsley 972004290fSPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__i2c1 = { 982004290fSPaul Walmsley .master = &omap2430_l4_core_hwmod, 992004290fSPaul Walmsley .slave = &omap2430_i2c1_hwmod, 1002004290fSPaul Walmsley .clk = "i2c1_ick", 1012004290fSPaul Walmsley .addr = omap2430_i2c1_addr_space, 1022004290fSPaul Walmsley .addr_cnt = ARRAY_SIZE(omap2430_i2c1_addr_space), 1032004290fSPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 1042004290fSPaul Walmsley }; 1052004290fSPaul Walmsley 1062004290fSPaul Walmsley /* L4 CORE -> I2C2 interface */ 1072004290fSPaul Walmsley static struct omap_hwmod_addr_space omap2430_i2c2_addr_space[] = { 1082004290fSPaul Walmsley { 1092004290fSPaul Walmsley .pa_start = 0x48072000, 1102004290fSPaul Walmsley .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN - 1, 1112004290fSPaul Walmsley .flags = ADDR_TYPE_RT, 1122004290fSPaul Walmsley }, 1132004290fSPaul Walmsley }; 1142004290fSPaul Walmsley 1152004290fSPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__i2c2 = { 1162004290fSPaul Walmsley .master = &omap2430_l4_core_hwmod, 1172004290fSPaul Walmsley .slave = &omap2430_i2c2_hwmod, 1182004290fSPaul Walmsley .clk = "i2c2_ick", 1192004290fSPaul Walmsley .addr = omap2430_i2c2_addr_space, 1202004290fSPaul Walmsley .addr_cnt = ARRAY_SIZE(omap2430_i2c2_addr_space), 1212004290fSPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 1222004290fSPaul Walmsley }; 1237359154eSPaul Walmsley 1247359154eSPaul Walmsley /* L4_CORE -> L4_WKUP interface */ 1257359154eSPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l4_core__l4_wkup = { 1267359154eSPaul Walmsley .master = &omap2430_l4_core_hwmod, 1277359154eSPaul Walmsley .slave = &omap2430_l4_wkup_hwmod, 1287359154eSPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 1297359154eSPaul Walmsley }; 1307359154eSPaul Walmsley 131046465b7SKevin Hilman /* L4 CORE -> UART1 interface */ 132046465b7SKevin Hilman static struct omap_hwmod_addr_space omap2430_uart1_addr_space[] = { 133046465b7SKevin Hilman { 134046465b7SKevin Hilman .pa_start = OMAP2_UART1_BASE, 135046465b7SKevin Hilman .pa_end = OMAP2_UART1_BASE + SZ_8K - 1, 136046465b7SKevin Hilman .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, 137046465b7SKevin Hilman }, 138046465b7SKevin Hilman }; 139046465b7SKevin Hilman 140046465b7SKevin Hilman static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = { 141046465b7SKevin Hilman .master = &omap2430_l4_core_hwmod, 142046465b7SKevin Hilman .slave = &omap2430_uart1_hwmod, 143046465b7SKevin Hilman .clk = "uart1_ick", 144046465b7SKevin Hilman .addr = omap2430_uart1_addr_space, 145046465b7SKevin Hilman .addr_cnt = ARRAY_SIZE(omap2430_uart1_addr_space), 146046465b7SKevin Hilman .user = OCP_USER_MPU | OCP_USER_SDMA, 147046465b7SKevin Hilman }; 148046465b7SKevin Hilman 149046465b7SKevin Hilman /* L4 CORE -> UART2 interface */ 150046465b7SKevin Hilman static struct omap_hwmod_addr_space omap2430_uart2_addr_space[] = { 151046465b7SKevin Hilman { 152046465b7SKevin Hilman .pa_start = OMAP2_UART2_BASE, 153046465b7SKevin Hilman .pa_end = OMAP2_UART2_BASE + SZ_1K - 1, 154046465b7SKevin Hilman .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, 155046465b7SKevin Hilman }, 156046465b7SKevin Hilman }; 157046465b7SKevin Hilman 158046465b7SKevin Hilman static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = { 159046465b7SKevin Hilman .master = &omap2430_l4_core_hwmod, 160046465b7SKevin Hilman .slave = &omap2430_uart2_hwmod, 161046465b7SKevin Hilman .clk = "uart2_ick", 162046465b7SKevin Hilman .addr = omap2430_uart2_addr_space, 163046465b7SKevin Hilman .addr_cnt = ARRAY_SIZE(omap2430_uart2_addr_space), 164046465b7SKevin Hilman .user = OCP_USER_MPU | OCP_USER_SDMA, 165046465b7SKevin Hilman }; 166046465b7SKevin Hilman 167046465b7SKevin Hilman /* L4 PER -> UART3 interface */ 168046465b7SKevin Hilman static struct omap_hwmod_addr_space omap2430_uart3_addr_space[] = { 169046465b7SKevin Hilman { 170046465b7SKevin Hilman .pa_start = OMAP2_UART3_BASE, 171046465b7SKevin Hilman .pa_end = OMAP2_UART3_BASE + SZ_1K - 1, 172046465b7SKevin Hilman .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, 173046465b7SKevin Hilman }, 174046465b7SKevin Hilman }; 175046465b7SKevin Hilman 176046465b7SKevin Hilman static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { 177046465b7SKevin Hilman .master = &omap2430_l4_core_hwmod, 178046465b7SKevin Hilman .slave = &omap2430_uart3_hwmod, 179046465b7SKevin Hilman .clk = "uart3_ick", 180046465b7SKevin Hilman .addr = omap2430_uart3_addr_space, 181046465b7SKevin Hilman .addr_cnt = ARRAY_SIZE(omap2430_uart3_addr_space), 182046465b7SKevin Hilman .user = OCP_USER_MPU | OCP_USER_SDMA, 183046465b7SKevin Hilman }; 184046465b7SKevin Hilman 1857359154eSPaul Walmsley /* Slave interfaces on the L4_CORE interconnect */ 1867359154eSPaul Walmsley static struct omap_hwmod_ocp_if *omap2430_l4_core_slaves[] = { 1874a7cf90aSKevin Hilman &omap2430_l3_main__l4_core, 1887359154eSPaul Walmsley }; 1897359154eSPaul Walmsley 1907359154eSPaul Walmsley /* Master interfaces on the L4_CORE interconnect */ 1917359154eSPaul Walmsley static struct omap_hwmod_ocp_if *omap2430_l4_core_masters[] = { 1927359154eSPaul Walmsley &omap2430_l4_core__l4_wkup, 1937359154eSPaul Walmsley }; 1947359154eSPaul Walmsley 1957359154eSPaul Walmsley /* L4 CORE */ 1967359154eSPaul Walmsley static struct omap_hwmod omap2430_l4_core_hwmod = { 197fa98347eSBenoit Cousson .name = "l4_core", 19843b40992SPaul Walmsley .class = &l4_hwmod_class, 1997359154eSPaul Walmsley .masters = omap2430_l4_core_masters, 2007359154eSPaul Walmsley .masters_cnt = ARRAY_SIZE(omap2430_l4_core_masters), 2017359154eSPaul Walmsley .slaves = omap2430_l4_core_slaves, 2027359154eSPaul Walmsley .slaves_cnt = ARRAY_SIZE(omap2430_l4_core_slaves), 2032eb1875dSKevin Hilman .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 2042eb1875dSKevin Hilman .flags = HWMOD_NO_IDLEST, 2057359154eSPaul Walmsley }; 2067359154eSPaul Walmsley 2077359154eSPaul Walmsley /* Slave interfaces on the L4_WKUP interconnect */ 2087359154eSPaul Walmsley static struct omap_hwmod_ocp_if *omap2430_l4_wkup_slaves[] = { 2097359154eSPaul Walmsley &omap2430_l4_core__l4_wkup, 210046465b7SKevin Hilman &omap2_l4_core__uart1, 211046465b7SKevin Hilman &omap2_l4_core__uart2, 212046465b7SKevin Hilman &omap2_l4_core__uart3, 2137359154eSPaul Walmsley }; 2147359154eSPaul Walmsley 2157359154eSPaul Walmsley /* Master interfaces on the L4_WKUP interconnect */ 2167359154eSPaul Walmsley static struct omap_hwmod_ocp_if *omap2430_l4_wkup_masters[] = { 2177359154eSPaul Walmsley }; 2187359154eSPaul Walmsley 2197359154eSPaul Walmsley /* L4 WKUP */ 2207359154eSPaul Walmsley static struct omap_hwmod omap2430_l4_wkup_hwmod = { 221fa98347eSBenoit Cousson .name = "l4_wkup", 22243b40992SPaul Walmsley .class = &l4_hwmod_class, 2237359154eSPaul Walmsley .masters = omap2430_l4_wkup_masters, 2247359154eSPaul Walmsley .masters_cnt = ARRAY_SIZE(omap2430_l4_wkup_masters), 2257359154eSPaul Walmsley .slaves = omap2430_l4_wkup_slaves, 2267359154eSPaul Walmsley .slaves_cnt = ARRAY_SIZE(omap2430_l4_wkup_slaves), 2272eb1875dSKevin Hilman .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 2282eb1875dSKevin Hilman .flags = HWMOD_NO_IDLEST, 2297359154eSPaul Walmsley }; 2307359154eSPaul Walmsley 2317359154eSPaul Walmsley /* Master interfaces on the MPU device */ 2327359154eSPaul Walmsley static struct omap_hwmod_ocp_if *omap2430_mpu_masters[] = { 2334a7cf90aSKevin Hilman &omap2430_mpu__l3_main, 2347359154eSPaul Walmsley }; 2357359154eSPaul Walmsley 2367359154eSPaul Walmsley /* MPU */ 2377359154eSPaul Walmsley static struct omap_hwmod omap2430_mpu_hwmod = { 2385c2c0296SBenoit Cousson .name = "mpu", 23943b40992SPaul Walmsley .class = &mpu_hwmod_class, 2407359154eSPaul Walmsley .main_clk = "mpu_ck", 2417359154eSPaul Walmsley .masters = omap2430_mpu_masters, 2427359154eSPaul Walmsley .masters_cnt = ARRAY_SIZE(omap2430_mpu_masters), 2437359154eSPaul Walmsley .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 2447359154eSPaul Walmsley }; 2457359154eSPaul Walmsley 24608072acfSPaul Walmsley /* 24708072acfSPaul Walmsley * IVA2_1 interface data 24808072acfSPaul Walmsley */ 24908072acfSPaul Walmsley 25008072acfSPaul Walmsley /* IVA2 <- L3 interface */ 25108072acfSPaul Walmsley static struct omap_hwmod_ocp_if omap2430_l3__iva = { 25208072acfSPaul Walmsley .master = &omap2430_l3_main_hwmod, 25308072acfSPaul Walmsley .slave = &omap2430_iva_hwmod, 25408072acfSPaul Walmsley .clk = "dsp_fck", 25508072acfSPaul Walmsley .user = OCP_USER_MPU | OCP_USER_SDMA, 25608072acfSPaul Walmsley }; 25708072acfSPaul Walmsley 25808072acfSPaul Walmsley static struct omap_hwmod_ocp_if *omap2430_iva_masters[] = { 25908072acfSPaul Walmsley &omap2430_l3__iva, 26008072acfSPaul Walmsley }; 26108072acfSPaul Walmsley 26208072acfSPaul Walmsley /* 26308072acfSPaul Walmsley * IVA2 (IVA2) 26408072acfSPaul Walmsley */ 26508072acfSPaul Walmsley 26608072acfSPaul Walmsley static struct omap_hwmod omap2430_iva_hwmod = { 26708072acfSPaul Walmsley .name = "iva", 26808072acfSPaul Walmsley .class = &iva_hwmod_class, 26908072acfSPaul Walmsley .masters = omap2430_iva_masters, 27008072acfSPaul Walmsley .masters_cnt = ARRAY_SIZE(omap2430_iva_masters), 27108072acfSPaul Walmsley .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) 27208072acfSPaul Walmsley }; 27308072acfSPaul Walmsley 274165e2161SVaradarajan, Charulatha /* l4_wkup -> wd_timer2 */ 275165e2161SVaradarajan, Charulatha static struct omap_hwmod_addr_space omap2430_wd_timer2_addrs[] = { 276165e2161SVaradarajan, Charulatha { 277165e2161SVaradarajan, Charulatha .pa_start = 0x49016000, 278165e2161SVaradarajan, Charulatha .pa_end = 0x4901607f, 279165e2161SVaradarajan, Charulatha .flags = ADDR_TYPE_RT 280165e2161SVaradarajan, Charulatha }, 281165e2161SVaradarajan, Charulatha }; 282165e2161SVaradarajan, Charulatha 283165e2161SVaradarajan, Charulatha static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = { 284165e2161SVaradarajan, Charulatha .master = &omap2430_l4_wkup_hwmod, 285165e2161SVaradarajan, Charulatha .slave = &omap2430_wd_timer2_hwmod, 286165e2161SVaradarajan, Charulatha .clk = "mpu_wdt_ick", 287165e2161SVaradarajan, Charulatha .addr = omap2430_wd_timer2_addrs, 288165e2161SVaradarajan, Charulatha .addr_cnt = ARRAY_SIZE(omap2430_wd_timer2_addrs), 289165e2161SVaradarajan, Charulatha .user = OCP_USER_MPU | OCP_USER_SDMA, 290165e2161SVaradarajan, Charulatha }; 291165e2161SVaradarajan, Charulatha 292165e2161SVaradarajan, Charulatha /* 293165e2161SVaradarajan, Charulatha * 'wd_timer' class 294165e2161SVaradarajan, Charulatha * 32-bit watchdog upward counter that generates a pulse on the reset pin on 295165e2161SVaradarajan, Charulatha * overflow condition 296165e2161SVaradarajan, Charulatha */ 297165e2161SVaradarajan, Charulatha 298165e2161SVaradarajan, Charulatha static struct omap_hwmod_class_sysconfig omap2430_wd_timer_sysc = { 299165e2161SVaradarajan, Charulatha .rev_offs = 0x0, 300165e2161SVaradarajan, Charulatha .sysc_offs = 0x0010, 301165e2161SVaradarajan, Charulatha .syss_offs = 0x0014, 302165e2161SVaradarajan, Charulatha .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET | 303165e2161SVaradarajan, Charulatha SYSC_HAS_AUTOIDLE), 304165e2161SVaradarajan, Charulatha .sysc_fields = &omap_hwmod_sysc_type1, 305165e2161SVaradarajan, Charulatha }; 306165e2161SVaradarajan, Charulatha 307165e2161SVaradarajan, Charulatha static struct omap_hwmod_class omap2430_wd_timer_hwmod_class = { 308165e2161SVaradarajan, Charulatha .name = "wd_timer", 309165e2161SVaradarajan, Charulatha .sysc = &omap2430_wd_timer_sysc, 310165e2161SVaradarajan, Charulatha }; 311165e2161SVaradarajan, Charulatha 312165e2161SVaradarajan, Charulatha /* wd_timer2 */ 313165e2161SVaradarajan, Charulatha static struct omap_hwmod_ocp_if *omap2430_wd_timer2_slaves[] = { 314165e2161SVaradarajan, Charulatha &omap2430_l4_wkup__wd_timer2, 315165e2161SVaradarajan, Charulatha }; 316165e2161SVaradarajan, Charulatha 317165e2161SVaradarajan, Charulatha static struct omap_hwmod omap2430_wd_timer2_hwmod = { 318165e2161SVaradarajan, Charulatha .name = "wd_timer2", 319165e2161SVaradarajan, Charulatha .class = &omap2430_wd_timer_hwmod_class, 320165e2161SVaradarajan, Charulatha .main_clk = "mpu_wdt_fck", 321165e2161SVaradarajan, Charulatha .prcm = { 322165e2161SVaradarajan, Charulatha .omap2 = { 323165e2161SVaradarajan, Charulatha .prcm_reg_id = 1, 324165e2161SVaradarajan, Charulatha .module_bit = OMAP24XX_EN_MPU_WDT_SHIFT, 325165e2161SVaradarajan, Charulatha .module_offs = WKUP_MOD, 326165e2161SVaradarajan, Charulatha .idlest_reg_id = 1, 327165e2161SVaradarajan, Charulatha .idlest_idle_bit = OMAP24XX_ST_MPU_WDT_SHIFT, 328165e2161SVaradarajan, Charulatha }, 329165e2161SVaradarajan, Charulatha }, 330165e2161SVaradarajan, Charulatha .slaves = omap2430_wd_timer2_slaves, 331165e2161SVaradarajan, Charulatha .slaves_cnt = ARRAY_SIZE(omap2430_wd_timer2_slaves), 332165e2161SVaradarajan, Charulatha .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 333165e2161SVaradarajan, Charulatha }; 334165e2161SVaradarajan, Charulatha 335046465b7SKevin Hilman /* UART */ 336046465b7SKevin Hilman 337046465b7SKevin Hilman static struct omap_hwmod_class_sysconfig uart_sysc = { 338046465b7SKevin Hilman .rev_offs = 0x50, 339046465b7SKevin Hilman .sysc_offs = 0x54, 340046465b7SKevin Hilman .syss_offs = 0x58, 341046465b7SKevin Hilman .sysc_flags = (SYSC_HAS_SIDLEMODE | 342046465b7SKevin Hilman SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | 343046465b7SKevin Hilman SYSC_HAS_AUTOIDLE), 344046465b7SKevin Hilman .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), 345046465b7SKevin Hilman .sysc_fields = &omap_hwmod_sysc_type1, 346046465b7SKevin Hilman }; 347046465b7SKevin Hilman 348046465b7SKevin Hilman static struct omap_hwmod_class uart_class = { 349046465b7SKevin Hilman .name = "uart", 350046465b7SKevin Hilman .sysc = &uart_sysc, 351046465b7SKevin Hilman }; 352046465b7SKevin Hilman 353046465b7SKevin Hilman /* UART1 */ 354046465b7SKevin Hilman 355046465b7SKevin Hilman static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { 356046465b7SKevin Hilman { .irq = INT_24XX_UART1_IRQ, }, 357046465b7SKevin Hilman }; 358046465b7SKevin Hilman 359046465b7SKevin Hilman static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { 360046465b7SKevin Hilman { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, 361046465b7SKevin Hilman { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, 362046465b7SKevin Hilman }; 363046465b7SKevin Hilman 364046465b7SKevin Hilman static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = { 365046465b7SKevin Hilman &omap2_l4_core__uart1, 366046465b7SKevin Hilman }; 367046465b7SKevin Hilman 368046465b7SKevin Hilman static struct omap_hwmod omap2430_uart1_hwmod = { 369046465b7SKevin Hilman .name = "uart1", 370046465b7SKevin Hilman .mpu_irqs = uart1_mpu_irqs, 371046465b7SKevin Hilman .mpu_irqs_cnt = ARRAY_SIZE(uart1_mpu_irqs), 372046465b7SKevin Hilman .sdma_reqs = uart1_sdma_reqs, 373046465b7SKevin Hilman .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), 374046465b7SKevin Hilman .main_clk = "uart1_fck", 375046465b7SKevin Hilman .prcm = { 376046465b7SKevin Hilman .omap2 = { 377046465b7SKevin Hilman .module_offs = CORE_MOD, 378046465b7SKevin Hilman .prcm_reg_id = 1, 379046465b7SKevin Hilman .module_bit = OMAP24XX_EN_UART1_SHIFT, 380046465b7SKevin Hilman .idlest_reg_id = 1, 381046465b7SKevin Hilman .idlest_idle_bit = OMAP24XX_EN_UART1_SHIFT, 382046465b7SKevin Hilman }, 383046465b7SKevin Hilman }, 384046465b7SKevin Hilman .slaves = omap2430_uart1_slaves, 385046465b7SKevin Hilman .slaves_cnt = ARRAY_SIZE(omap2430_uart1_slaves), 386046465b7SKevin Hilman .class = &uart_class, 387046465b7SKevin Hilman .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 388046465b7SKevin Hilman }; 389046465b7SKevin Hilman 390046465b7SKevin Hilman /* UART2 */ 391046465b7SKevin Hilman 392046465b7SKevin Hilman static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { 393046465b7SKevin Hilman { .irq = INT_24XX_UART2_IRQ, }, 394046465b7SKevin Hilman }; 395046465b7SKevin Hilman 396046465b7SKevin Hilman static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { 397046465b7SKevin Hilman { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, 398046465b7SKevin Hilman { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, 399046465b7SKevin Hilman }; 400046465b7SKevin Hilman 401046465b7SKevin Hilman static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = { 402046465b7SKevin Hilman &omap2_l4_core__uart2, 403046465b7SKevin Hilman }; 404046465b7SKevin Hilman 405046465b7SKevin Hilman static struct omap_hwmod omap2430_uart2_hwmod = { 406046465b7SKevin Hilman .name = "uart2", 407046465b7SKevin Hilman .mpu_irqs = uart2_mpu_irqs, 408046465b7SKevin Hilman .mpu_irqs_cnt = ARRAY_SIZE(uart2_mpu_irqs), 409046465b7SKevin Hilman .sdma_reqs = uart2_sdma_reqs, 410046465b7SKevin Hilman .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), 411046465b7SKevin Hilman .main_clk = "uart2_fck", 412046465b7SKevin Hilman .prcm = { 413046465b7SKevin Hilman .omap2 = { 414046465b7SKevin Hilman .module_offs = CORE_MOD, 415046465b7SKevin Hilman .prcm_reg_id = 1, 416046465b7SKevin Hilman .module_bit = OMAP24XX_EN_UART2_SHIFT, 417046465b7SKevin Hilman .idlest_reg_id = 1, 418046465b7SKevin Hilman .idlest_idle_bit = OMAP24XX_EN_UART2_SHIFT, 419046465b7SKevin Hilman }, 420046465b7SKevin Hilman }, 421046465b7SKevin Hilman .slaves = omap2430_uart2_slaves, 422046465b7SKevin Hilman .slaves_cnt = ARRAY_SIZE(omap2430_uart2_slaves), 423046465b7SKevin Hilman .class = &uart_class, 424046465b7SKevin Hilman .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 425046465b7SKevin Hilman }; 426046465b7SKevin Hilman 427046465b7SKevin Hilman /* UART3 */ 428046465b7SKevin Hilman 429046465b7SKevin Hilman static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { 430046465b7SKevin Hilman { .irq = INT_24XX_UART3_IRQ, }, 431046465b7SKevin Hilman }; 432046465b7SKevin Hilman 433046465b7SKevin Hilman static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { 434046465b7SKevin Hilman { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, 435046465b7SKevin Hilman { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, 436046465b7SKevin Hilman }; 437046465b7SKevin Hilman 438046465b7SKevin Hilman static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = { 439046465b7SKevin Hilman &omap2_l4_core__uart3, 440046465b7SKevin Hilman }; 441046465b7SKevin Hilman 442046465b7SKevin Hilman static struct omap_hwmod omap2430_uart3_hwmod = { 443046465b7SKevin Hilman .name = "uart3", 444046465b7SKevin Hilman .mpu_irqs = uart3_mpu_irqs, 445046465b7SKevin Hilman .mpu_irqs_cnt = ARRAY_SIZE(uart3_mpu_irqs), 446046465b7SKevin Hilman .sdma_reqs = uart3_sdma_reqs, 447046465b7SKevin Hilman .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), 448046465b7SKevin Hilman .main_clk = "uart3_fck", 449046465b7SKevin Hilman .prcm = { 450046465b7SKevin Hilman .omap2 = { 451046465b7SKevin Hilman .module_offs = CORE_MOD, 452046465b7SKevin Hilman .prcm_reg_id = 2, 453046465b7SKevin Hilman .module_bit = OMAP24XX_EN_UART3_SHIFT, 454046465b7SKevin Hilman .idlest_reg_id = 2, 455046465b7SKevin Hilman .idlest_idle_bit = OMAP24XX_EN_UART3_SHIFT, 456046465b7SKevin Hilman }, 457046465b7SKevin Hilman }, 458046465b7SKevin Hilman .slaves = omap2430_uart3_slaves, 459046465b7SKevin Hilman .slaves_cnt = ARRAY_SIZE(omap2430_uart3_slaves), 460046465b7SKevin Hilman .class = &uart_class, 461046465b7SKevin Hilman .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 462046465b7SKevin Hilman }; 463046465b7SKevin Hilman 4642004290fSPaul Walmsley /* I2C common */ 4652004290fSPaul Walmsley static struct omap_hwmod_class_sysconfig i2c_sysc = { 4662004290fSPaul Walmsley .rev_offs = 0x00, 4672004290fSPaul Walmsley .sysc_offs = 0x20, 4682004290fSPaul Walmsley .syss_offs = 0x10, 4692004290fSPaul Walmsley .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), 4702004290fSPaul Walmsley .sysc_fields = &omap_hwmod_sysc_type1, 4712004290fSPaul Walmsley }; 4722004290fSPaul Walmsley 4732004290fSPaul Walmsley static struct omap_hwmod_class i2c_class = { 4742004290fSPaul Walmsley .name = "i2c", 4752004290fSPaul Walmsley .sysc = &i2c_sysc, 4762004290fSPaul Walmsley }; 4772004290fSPaul Walmsley 4782004290fSPaul Walmsley static struct omap_i2c_dev_attr i2c_dev_attr; 4792004290fSPaul Walmsley 4802004290fSPaul Walmsley /* I2C1 */ 4812004290fSPaul Walmsley 4822004290fSPaul Walmsley static struct omap_i2c_dev_attr i2c1_dev_attr = { 4832004290fSPaul Walmsley .fifo_depth = 8, /* bytes */ 4842004290fSPaul Walmsley }; 4852004290fSPaul Walmsley 4862004290fSPaul Walmsley static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { 4872004290fSPaul Walmsley { .irq = INT_24XX_I2C1_IRQ, }, 4882004290fSPaul Walmsley }; 4892004290fSPaul Walmsley 4902004290fSPaul Walmsley static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { 4912004290fSPaul Walmsley { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, 4922004290fSPaul Walmsley { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, 4932004290fSPaul Walmsley }; 4942004290fSPaul Walmsley 4952004290fSPaul Walmsley static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = { 4962004290fSPaul Walmsley &omap2430_l4_core__i2c1, 4972004290fSPaul Walmsley }; 4982004290fSPaul Walmsley 4992004290fSPaul Walmsley static struct omap_hwmod omap2430_i2c1_hwmod = { 5002004290fSPaul Walmsley .name = "i2c1", 5012004290fSPaul Walmsley .mpu_irqs = i2c1_mpu_irqs, 5022004290fSPaul Walmsley .mpu_irqs_cnt = ARRAY_SIZE(i2c1_mpu_irqs), 5032004290fSPaul Walmsley .sdma_reqs = i2c1_sdma_reqs, 5042004290fSPaul Walmsley .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), 5052004290fSPaul Walmsley .main_clk = "i2chs1_fck", 5062004290fSPaul Walmsley .prcm = { 5072004290fSPaul Walmsley .omap2 = { 5082004290fSPaul Walmsley /* 5092004290fSPaul Walmsley * NOTE: The CM_FCLKEN* and CM_ICLKEN* for 5102004290fSPaul Walmsley * I2CHS IP's do not follow the usual pattern. 5112004290fSPaul Walmsley * prcm_reg_id alone cannot be used to program 5122004290fSPaul Walmsley * the iclk and fclk. Needs to be handled using 5132004290fSPaul Walmsley * additonal flags when clk handling is moved 5142004290fSPaul Walmsley * to hwmod framework. 5152004290fSPaul Walmsley */ 5162004290fSPaul Walmsley .module_offs = CORE_MOD, 5172004290fSPaul Walmsley .prcm_reg_id = 1, 5182004290fSPaul Walmsley .module_bit = OMAP2430_EN_I2CHS1_SHIFT, 5192004290fSPaul Walmsley .idlest_reg_id = 1, 5202004290fSPaul Walmsley .idlest_idle_bit = OMAP2430_ST_I2CHS1_SHIFT, 5212004290fSPaul Walmsley }, 5222004290fSPaul Walmsley }, 5232004290fSPaul Walmsley .slaves = omap2430_i2c1_slaves, 5242004290fSPaul Walmsley .slaves_cnt = ARRAY_SIZE(omap2430_i2c1_slaves), 5252004290fSPaul Walmsley .class = &i2c_class, 5262004290fSPaul Walmsley .dev_attr = &i2c1_dev_attr, 5272004290fSPaul Walmsley .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 5282004290fSPaul Walmsley }; 5292004290fSPaul Walmsley 5302004290fSPaul Walmsley /* I2C2 */ 5312004290fSPaul Walmsley 5322004290fSPaul Walmsley static struct omap_i2c_dev_attr i2c2_dev_attr = { 5332004290fSPaul Walmsley .fifo_depth = 8, /* bytes */ 5342004290fSPaul Walmsley }; 5352004290fSPaul Walmsley 5362004290fSPaul Walmsley static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { 5372004290fSPaul Walmsley { .irq = INT_24XX_I2C2_IRQ, }, 5382004290fSPaul Walmsley }; 5392004290fSPaul Walmsley 5402004290fSPaul Walmsley static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { 5412004290fSPaul Walmsley { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, 5422004290fSPaul Walmsley { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, 5432004290fSPaul Walmsley }; 5442004290fSPaul Walmsley 5452004290fSPaul Walmsley static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = { 5462004290fSPaul Walmsley &omap2430_l4_core__i2c2, 5472004290fSPaul Walmsley }; 5482004290fSPaul Walmsley 5492004290fSPaul Walmsley static struct omap_hwmod omap2430_i2c2_hwmod = { 5502004290fSPaul Walmsley .name = "i2c2", 5512004290fSPaul Walmsley .mpu_irqs = i2c2_mpu_irqs, 5522004290fSPaul Walmsley .mpu_irqs_cnt = ARRAY_SIZE(i2c2_mpu_irqs), 5532004290fSPaul Walmsley .sdma_reqs = i2c2_sdma_reqs, 5542004290fSPaul Walmsley .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), 5552004290fSPaul Walmsley .main_clk = "i2chs2_fck", 5562004290fSPaul Walmsley .prcm = { 5572004290fSPaul Walmsley .omap2 = { 5582004290fSPaul Walmsley .module_offs = CORE_MOD, 5592004290fSPaul Walmsley .prcm_reg_id = 1, 5602004290fSPaul Walmsley .module_bit = OMAP2430_EN_I2CHS2_SHIFT, 5612004290fSPaul Walmsley .idlest_reg_id = 1, 5622004290fSPaul Walmsley .idlest_idle_bit = OMAP2430_ST_I2CHS2_SHIFT, 5632004290fSPaul Walmsley }, 5642004290fSPaul Walmsley }, 5652004290fSPaul Walmsley .slaves = omap2430_i2c2_slaves, 5662004290fSPaul Walmsley .slaves_cnt = ARRAY_SIZE(omap2430_i2c2_slaves), 5672004290fSPaul Walmsley .class = &i2c_class, 5682004290fSPaul Walmsley .dev_attr = &i2c2_dev_attr, 5692004290fSPaul Walmsley .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), 5702004290fSPaul Walmsley }; 5712004290fSPaul Walmsley 5727359154eSPaul Walmsley static __initdata struct omap_hwmod *omap2430_hwmods[] = { 5734a7cf90aSKevin Hilman &omap2430_l3_main_hwmod, 5747359154eSPaul Walmsley &omap2430_l4_core_hwmod, 5757359154eSPaul Walmsley &omap2430_l4_wkup_hwmod, 5767359154eSPaul Walmsley &omap2430_mpu_hwmod, 57708072acfSPaul Walmsley &omap2430_iva_hwmod, 578165e2161SVaradarajan, Charulatha &omap2430_wd_timer2_hwmod, 579046465b7SKevin Hilman &omap2430_uart1_hwmod, 580046465b7SKevin Hilman &omap2430_uart2_hwmod, 581046465b7SKevin Hilman &omap2430_uart3_hwmod, 5822004290fSPaul Walmsley &omap2430_i2c1_hwmod, 5832004290fSPaul Walmsley &omap2430_i2c2_hwmod, 5847359154eSPaul Walmsley NULL, 5857359154eSPaul Walmsley }; 5867359154eSPaul Walmsley 5877359154eSPaul Walmsley int __init omap2430_hwmod_init(void) 5887359154eSPaul Walmsley { 5897359154eSPaul Walmsley return omap_hwmod_init(omap2430_hwmods); 5907359154eSPaul Walmsley } 591