xref: /openbmc/linux/arch/arm/mach-omap2/omap_hwmod.c (revision df2634f43f5106947f3735a0b61a6527a4b278cd)
1 /*
2  * omap_hwmod implementation for OMAP2/3/4
3  *
4  * Copyright (C) 2009-2010 Nokia Corporation
5  *
6  * Paul Walmsley, Benoît Cousson, Kevin Hilman
7  *
8  * Created in collaboration with (alphabetical order): Thara Gopinath,
9  * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
10  * Sawant, Santosh Shilimkar, Richard Woodruff
11  *
12  * This program is free software; you can redistribute it and/or modify
13  * it under the terms of the GNU General Public License version 2 as
14  * published by the Free Software Foundation.
15  *
16  * Introduction
17  * ------------
18  * One way to view an OMAP SoC is as a collection of largely unrelated
19  * IP blocks connected by interconnects.  The IP blocks include
20  * devices such as ARM processors, audio serial interfaces, UARTs,
21  * etc.  Some of these devices, like the DSP, are created by TI;
22  * others, like the SGX, largely originate from external vendors.  In
23  * TI's documentation, on-chip devices are referred to as "OMAP
24  * modules."  Some of these IP blocks are identical across several
25  * OMAP versions.  Others are revised frequently.
26  *
27  * These OMAP modules are tied together by various interconnects.
28  * Most of the address and data flow between modules is via OCP-based
29  * interconnects such as the L3 and L4 buses; but there are other
30  * interconnects that distribute the hardware clock tree, handle idle
31  * and reset signaling, supply power, and connect the modules to
32  * various pads or balls on the OMAP package.
33  *
34  * OMAP hwmod provides a consistent way to describe the on-chip
35  * hardware blocks and their integration into the rest of the chip.
36  * This description can be automatically generated from the TI
37  * hardware database.  OMAP hwmod provides a standard, consistent API
38  * to reset, enable, idle, and disable these hardware blocks.  And
39  * hwmod provides a way for other core code, such as the Linux device
40  * code or the OMAP power management and address space mapping code,
41  * to query the hardware database.
42  *
43  * Using hwmod
44  * -----------
45  * Drivers won't call hwmod functions directly.  That is done by the
46  * omap_device code, and in rare occasions, by custom integration code
47  * in arch/arm/ *omap*.  The omap_device code includes functions to
48  * build a struct platform_device using omap_hwmod data, and that is
49  * currently how hwmod data is communicated to drivers and to the
50  * Linux driver model.  Most drivers will call omap_hwmod functions only
51  * indirectly, via pm_runtime*() functions.
52  *
53  * From a layering perspective, here is where the OMAP hwmod code
54  * fits into the kernel software stack:
55  *
56  *            +-------------------------------+
57  *            |      Device driver code       |
58  *            |      (e.g., drivers/)         |
59  *            +-------------------------------+
60  *            |      Linux driver model       |
61  *            |     (platform_device /        |
62  *            |  platform_driver data/code)   |
63  *            +-------------------------------+
64  *            | OMAP core-driver integration  |
65  *            |(arch/arm/mach-omap2/devices.c)|
66  *            +-------------------------------+
67  *            |      omap_device code         |
68  *            | (../plat-omap/omap_device.c)  |
69  *            +-------------------------------+
70  *   ---->    |    omap_hwmod code/data       |    <-----
71  *            | (../mach-omap2/omap_hwmod*)   |
72  *            +-------------------------------+
73  *            | OMAP clock/PRCM/register fns  |
74  *            | (__raw_{read,write}l, clk*)   |
75  *            +-------------------------------+
76  *
77  * Device drivers should not contain any OMAP-specific code or data in
78  * them.  They should only contain code to operate the IP block that
79  * the driver is responsible for.  This is because these IP blocks can
80  * also appear in other SoCs, either from TI (such as DaVinci) or from
81  * other manufacturers; and drivers should be reusable across other
82  * platforms.
83  *
84  * The OMAP hwmod code also will attempt to reset and idle all on-chip
85  * devices upon boot.  The goal here is for the kernel to be
86  * completely self-reliant and independent from bootloaders.  This is
87  * to ensure a repeatable configuration, both to ensure consistent
88  * runtime behavior, and to make it easier for others to reproduce
89  * bugs.
90  *
91  * OMAP module activity states
92  * ---------------------------
93  * The hwmod code considers modules to be in one of several activity
94  * states.  IP blocks start out in an UNKNOWN state, then once they
95  * are registered via the hwmod code, proceed to the REGISTERED state.
96  * Once their clock names are resolved to clock pointers, the module
97  * enters the CLKS_INITED state; and finally, once the module has been
98  * reset and the integration registers programmed, the INITIALIZED state
99  * is entered.  The hwmod code will then place the module into either
100  * the IDLE state to save power, or in the case of a critical system
101  * module, the ENABLED state.
102  *
103  * OMAP core integration code can then call omap_hwmod*() functions
104  * directly to move the module between the IDLE, ENABLED, and DISABLED
105  * states, as needed.  This is done during both the PM idle loop, and
106  * in the OMAP core integration code's implementation of the PM runtime
107  * functions.
108  *
109  * References
110  * ----------
111  * This is a partial list.
112  * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
113  * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
114  * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
115  * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
116  * - Open Core Protocol Specification 2.2
117  *
118  * To do:
119  * - handle IO mapping
120  * - bus throughput & module latency measurement code
121  *
122  * XXX add tests at the beginning of each function to ensure the hwmod is
123  * in the appropriate state
124  * XXX error return values should be checked to ensure that they are
125  * appropriate
126  */
127 #undef DEBUG
128 
129 #include <linux/kernel.h>
130 #include <linux/errno.h>
131 #include <linux/io.h>
132 #include <linux/clk.h>
133 #include <linux/delay.h>
134 #include <linux/err.h>
135 #include <linux/list.h>
136 #include <linux/mutex.h>
137 #include <linux/spinlock.h>
138 
139 #include <plat/common.h>
140 #include <plat/cpu.h>
141 #include "clockdomain.h"
142 #include "powerdomain.h"
143 #include <plat/clock.h>
144 #include <plat/omap_hwmod.h>
145 #include <plat/prcm.h>
146 
147 #include "cm2xxx_3xxx.h"
148 #include "cm44xx.h"
149 #include "prm2xxx_3xxx.h"
150 #include "prm44xx.h"
151 #include "mux.h"
152 
153 /* Maximum microseconds to wait for OMAP module to softreset */
154 #define MAX_MODULE_SOFTRESET_WAIT	10000
155 
156 /* Name of the OMAP hwmod for the MPU */
157 #define MPU_INITIATOR_NAME		"mpu"
158 
159 /* omap_hwmod_list contains all registered struct omap_hwmods */
160 static LIST_HEAD(omap_hwmod_list);
161 
162 /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
163 static struct omap_hwmod *mpu_oh;
164 
165 /* inited: 0 if omap_hwmod_init() has not yet been called; 1 otherwise */
166 static u8 inited;
167 
168 
169 /* Private functions */
170 
171 /**
172  * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
173  * @oh: struct omap_hwmod *
174  *
175  * Load the current value of the hwmod OCP_SYSCONFIG register into the
176  * struct omap_hwmod for later use.  Returns -EINVAL if the hwmod has no
177  * OCP_SYSCONFIG register or 0 upon success.
178  */
179 static int _update_sysc_cache(struct omap_hwmod *oh)
180 {
181 	if (!oh->class->sysc) {
182 		WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
183 		return -EINVAL;
184 	}
185 
186 	/* XXX ensure module interface clock is up */
187 
188 	oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
189 
190 	if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
191 		oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
192 
193 	return 0;
194 }
195 
196 /**
197  * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
198  * @v: OCP_SYSCONFIG value to write
199  * @oh: struct omap_hwmod *
200  *
201  * Write @v into the module class' OCP_SYSCONFIG register, if it has
202  * one.  No return value.
203  */
204 static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
205 {
206 	if (!oh->class->sysc) {
207 		WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
208 		return;
209 	}
210 
211 	/* XXX ensure module interface clock is up */
212 
213 	/* Module might have lost context, always update cache and register */
214 	oh->_sysc_cache = v;
215 	omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
216 }
217 
218 /**
219  * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
220  * @oh: struct omap_hwmod *
221  * @standbymode: MIDLEMODE field bits
222  * @v: pointer to register contents to modify
223  *
224  * Update the master standby mode bits in @v to be @standbymode for
225  * the @oh hwmod.  Does not write to the hardware.  Returns -EINVAL
226  * upon error or 0 upon success.
227  */
228 static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
229 				   u32 *v)
230 {
231 	u32 mstandby_mask;
232 	u8 mstandby_shift;
233 
234 	if (!oh->class->sysc ||
235 	    !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
236 		return -EINVAL;
237 
238 	if (!oh->class->sysc->sysc_fields) {
239 		WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
240 		return -EINVAL;
241 	}
242 
243 	mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
244 	mstandby_mask = (0x3 << mstandby_shift);
245 
246 	*v &= ~mstandby_mask;
247 	*v |= __ffs(standbymode) << mstandby_shift;
248 
249 	return 0;
250 }
251 
252 /**
253  * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
254  * @oh: struct omap_hwmod *
255  * @idlemode: SIDLEMODE field bits
256  * @v: pointer to register contents to modify
257  *
258  * Update the slave idle mode bits in @v to be @idlemode for the @oh
259  * hwmod.  Does not write to the hardware.  Returns -EINVAL upon error
260  * or 0 upon success.
261  */
262 static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
263 {
264 	u32 sidle_mask;
265 	u8 sidle_shift;
266 
267 	if (!oh->class->sysc ||
268 	    !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
269 		return -EINVAL;
270 
271 	if (!oh->class->sysc->sysc_fields) {
272 		WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
273 		return -EINVAL;
274 	}
275 
276 	sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
277 	sidle_mask = (0x3 << sidle_shift);
278 
279 	*v &= ~sidle_mask;
280 	*v |= __ffs(idlemode) << sidle_shift;
281 
282 	return 0;
283 }
284 
285 /**
286  * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
287  * @oh: struct omap_hwmod *
288  * @clockact: CLOCKACTIVITY field bits
289  * @v: pointer to register contents to modify
290  *
291  * Update the clockactivity mode bits in @v to be @clockact for the
292  * @oh hwmod.  Used for additional powersaving on some modules.  Does
293  * not write to the hardware.  Returns -EINVAL upon error or 0 upon
294  * success.
295  */
296 static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
297 {
298 	u32 clkact_mask;
299 	u8  clkact_shift;
300 
301 	if (!oh->class->sysc ||
302 	    !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
303 		return -EINVAL;
304 
305 	if (!oh->class->sysc->sysc_fields) {
306 		WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
307 		return -EINVAL;
308 	}
309 
310 	clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
311 	clkact_mask = (0x3 << clkact_shift);
312 
313 	*v &= ~clkact_mask;
314 	*v |= clockact << clkact_shift;
315 
316 	return 0;
317 }
318 
319 /**
320  * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
321  * @oh: struct omap_hwmod *
322  * @v: pointer to register contents to modify
323  *
324  * Set the SOFTRESET bit in @v for hwmod @oh.  Returns -EINVAL upon
325  * error or 0 upon success.
326  */
327 static int _set_softreset(struct omap_hwmod *oh, u32 *v)
328 {
329 	u32 softrst_mask;
330 
331 	if (!oh->class->sysc ||
332 	    !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
333 		return -EINVAL;
334 
335 	if (!oh->class->sysc->sysc_fields) {
336 		WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
337 		return -EINVAL;
338 	}
339 
340 	softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
341 
342 	*v |= softrst_mask;
343 
344 	return 0;
345 }
346 
347 /**
348  * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
349  * @oh: struct omap_hwmod *
350  * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
351  * @v: pointer to register contents to modify
352  *
353  * Update the module autoidle bit in @v to be @autoidle for the @oh
354  * hwmod.  The autoidle bit controls whether the module can gate
355  * internal clocks automatically when it isn't doing anything; the
356  * exact function of this bit varies on a per-module basis.  This
357  * function does not write to the hardware.  Returns -EINVAL upon
358  * error or 0 upon success.
359  */
360 static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
361 				u32 *v)
362 {
363 	u32 autoidle_mask;
364 	u8 autoidle_shift;
365 
366 	if (!oh->class->sysc ||
367 	    !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
368 		return -EINVAL;
369 
370 	if (!oh->class->sysc->sysc_fields) {
371 		WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
372 		return -EINVAL;
373 	}
374 
375 	autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
376 	autoidle_mask = (0x3 << autoidle_shift);
377 
378 	*v &= ~autoidle_mask;
379 	*v |= autoidle << autoidle_shift;
380 
381 	return 0;
382 }
383 
384 /**
385  * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
386  * @oh: struct omap_hwmod *
387  *
388  * Allow the hardware module @oh to send wakeups.  Returns -EINVAL
389  * upon error or 0 upon success.
390  */
391 static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
392 {
393 	u32 wakeup_mask;
394 
395 	if (!oh->class->sysc ||
396 	    !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
397 	      (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)))
398 		return -EINVAL;
399 
400 	if (!oh->class->sysc->sysc_fields) {
401 		WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
402 		return -EINVAL;
403 	}
404 
405 	wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
406 
407 	*v |= wakeup_mask;
408 
409 	if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
410 		_set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
411 
412 	/* XXX test pwrdm_get_wken for this hwmod's subsystem */
413 
414 	oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
415 
416 	return 0;
417 }
418 
419 /**
420  * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
421  * @oh: struct omap_hwmod *
422  *
423  * Prevent the hardware module @oh to send wakeups.  Returns -EINVAL
424  * upon error or 0 upon success.
425  */
426 static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
427 {
428 	u32 wakeup_mask;
429 
430 	if (!oh->class->sysc ||
431 	    !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
432 	      (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)))
433 		return -EINVAL;
434 
435 	if (!oh->class->sysc->sysc_fields) {
436 		WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
437 		return -EINVAL;
438 	}
439 
440 	wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
441 
442 	*v &= ~wakeup_mask;
443 
444 	if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
445 		_set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
446 
447 	/* XXX test pwrdm_get_wken for this hwmod's subsystem */
448 
449 	oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
450 
451 	return 0;
452 }
453 
454 /**
455  * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
456  * @oh: struct omap_hwmod *
457  *
458  * Prevent the hardware module @oh from entering idle while the
459  * hardare module initiator @init_oh is active.  Useful when a module
460  * will be accessed by a particular initiator (e.g., if a module will
461  * be accessed by the IVA, there should be a sleepdep between the IVA
462  * initiator and the module).  Only applies to modules in smart-idle
463  * mode.  Returns -EINVAL upon error or passes along
464  * clkdm_add_sleepdep() value upon success.
465  */
466 static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
467 {
468 	if (!oh->_clk)
469 		return -EINVAL;
470 
471 	return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
472 }
473 
474 /**
475  * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
476  * @oh: struct omap_hwmod *
477  *
478  * Allow the hardware module @oh to enter idle while the hardare
479  * module initiator @init_oh is active.  Useful when a module will not
480  * be accessed by a particular initiator (e.g., if a module will not
481  * be accessed by the IVA, there should be no sleepdep between the IVA
482  * initiator and the module).  Only applies to modules in smart-idle
483  * mode.  Returns -EINVAL upon error or passes along
484  * clkdm_del_sleepdep() value upon success.
485  */
486 static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
487 {
488 	if (!oh->_clk)
489 		return -EINVAL;
490 
491 	return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
492 }
493 
494 /**
495  * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
496  * @oh: struct omap_hwmod *
497  *
498  * Called from _init_clocks().  Populates the @oh _clk (main
499  * functional clock pointer) if a main_clk is present.  Returns 0 on
500  * success or -EINVAL on error.
501  */
502 static int _init_main_clk(struct omap_hwmod *oh)
503 {
504 	int ret = 0;
505 
506 	if (!oh->main_clk)
507 		return 0;
508 
509 	oh->_clk = omap_clk_get_by_name(oh->main_clk);
510 	if (!oh->_clk) {
511 		pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
512 			   oh->name, oh->main_clk);
513 		return -EINVAL;
514 	}
515 
516 	if (!oh->_clk->clkdm)
517 		pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
518 			   oh->main_clk, oh->_clk->name);
519 
520 	return ret;
521 }
522 
523 /**
524  * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
525  * @oh: struct omap_hwmod *
526  *
527  * Called from _init_clocks().  Populates the @oh OCP slave interface
528  * clock pointers.  Returns 0 on success or -EINVAL on error.
529  */
530 static int _init_interface_clks(struct omap_hwmod *oh)
531 {
532 	struct clk *c;
533 	int i;
534 	int ret = 0;
535 
536 	if (oh->slaves_cnt == 0)
537 		return 0;
538 
539 	for (i = 0; i < oh->slaves_cnt; i++) {
540 		struct omap_hwmod_ocp_if *os = oh->slaves[i];
541 
542 		if (!os->clk)
543 			continue;
544 
545 		c = omap_clk_get_by_name(os->clk);
546 		if (!c) {
547 			pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
548 				   oh->name, os->clk);
549 			ret = -EINVAL;
550 		}
551 		os->_clk = c;
552 	}
553 
554 	return ret;
555 }
556 
557 /**
558  * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
559  * @oh: struct omap_hwmod *
560  *
561  * Called from _init_clocks().  Populates the @oh omap_hwmod_opt_clk
562  * clock pointers.  Returns 0 on success or -EINVAL on error.
563  */
564 static int _init_opt_clks(struct omap_hwmod *oh)
565 {
566 	struct omap_hwmod_opt_clk *oc;
567 	struct clk *c;
568 	int i;
569 	int ret = 0;
570 
571 	for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
572 		c = omap_clk_get_by_name(oc->clk);
573 		if (!c) {
574 			pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
575 				   oh->name, oc->clk);
576 			ret = -EINVAL;
577 		}
578 		oc->_clk = c;
579 	}
580 
581 	return ret;
582 }
583 
584 /**
585  * _enable_clocks - enable hwmod main clock and interface clocks
586  * @oh: struct omap_hwmod *
587  *
588  * Enables all clocks necessary for register reads and writes to succeed
589  * on the hwmod @oh.  Returns 0.
590  */
591 static int _enable_clocks(struct omap_hwmod *oh)
592 {
593 	int i;
594 
595 	pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
596 
597 	if (oh->_clk)
598 		clk_enable(oh->_clk);
599 
600 	if (oh->slaves_cnt > 0) {
601 		for (i = 0; i < oh->slaves_cnt; i++) {
602 			struct omap_hwmod_ocp_if *os = oh->slaves[i];
603 			struct clk *c = os->_clk;
604 
605 			if (c && (os->flags & OCPIF_SWSUP_IDLE))
606 				clk_enable(c);
607 		}
608 	}
609 
610 	/* The opt clocks are controlled by the device driver. */
611 
612 	return 0;
613 }
614 
615 /**
616  * _disable_clocks - disable hwmod main clock and interface clocks
617  * @oh: struct omap_hwmod *
618  *
619  * Disables the hwmod @oh main functional and interface clocks.  Returns 0.
620  */
621 static int _disable_clocks(struct omap_hwmod *oh)
622 {
623 	int i;
624 
625 	pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
626 
627 	if (oh->_clk)
628 		clk_disable(oh->_clk);
629 
630 	if (oh->slaves_cnt > 0) {
631 		for (i = 0; i < oh->slaves_cnt; i++) {
632 			struct omap_hwmod_ocp_if *os = oh->slaves[i];
633 			struct clk *c = os->_clk;
634 
635 			if (c && (os->flags & OCPIF_SWSUP_IDLE))
636 				clk_disable(c);
637 		}
638 	}
639 
640 	/* The opt clocks are controlled by the device driver. */
641 
642 	return 0;
643 }
644 
645 static void _enable_optional_clocks(struct omap_hwmod *oh)
646 {
647 	struct omap_hwmod_opt_clk *oc;
648 	int i;
649 
650 	pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
651 
652 	for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
653 		if (oc->_clk) {
654 			pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
655 				 oc->_clk->name);
656 			clk_enable(oc->_clk);
657 		}
658 }
659 
660 static void _disable_optional_clocks(struct omap_hwmod *oh)
661 {
662 	struct omap_hwmod_opt_clk *oc;
663 	int i;
664 
665 	pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
666 
667 	for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
668 		if (oc->_clk) {
669 			pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
670 				 oc->_clk->name);
671 			clk_disable(oc->_clk);
672 		}
673 }
674 
675 /**
676  * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
677  * @oh: struct omap_hwmod *
678  *
679  * Returns the array index of the OCP slave port that the MPU
680  * addresses the device on, or -EINVAL upon error or not found.
681  */
682 static int __init _find_mpu_port_index(struct omap_hwmod *oh)
683 {
684 	int i;
685 	int found = 0;
686 
687 	if (!oh || oh->slaves_cnt == 0)
688 		return -EINVAL;
689 
690 	for (i = 0; i < oh->slaves_cnt; i++) {
691 		struct omap_hwmod_ocp_if *os = oh->slaves[i];
692 
693 		if (os->user & OCP_USER_MPU) {
694 			found = 1;
695 			break;
696 		}
697 	}
698 
699 	if (found)
700 		pr_debug("omap_hwmod: %s: MPU OCP slave port ID  %d\n",
701 			 oh->name, i);
702 	else
703 		pr_debug("omap_hwmod: %s: no MPU OCP slave port found\n",
704 			 oh->name);
705 
706 	return (found) ? i : -EINVAL;
707 }
708 
709 /**
710  * _find_mpu_rt_base - find hwmod register target base addr accessible by MPU
711  * @oh: struct omap_hwmod *
712  *
713  * Return the virtual address of the base of the register target of
714  * device @oh, or NULL on error.
715  */
716 static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
717 {
718 	struct omap_hwmod_ocp_if *os;
719 	struct omap_hwmod_addr_space *mem;
720 	int i;
721 	int found = 0;
722 	void __iomem *va_start;
723 
724 	if (!oh || oh->slaves_cnt == 0)
725 		return NULL;
726 
727 	os = oh->slaves[index];
728 
729 	for (i = 0, mem = os->addr; i < os->addr_cnt; i++, mem++) {
730 		if (mem->flags & ADDR_TYPE_RT) {
731 			found = 1;
732 			break;
733 		}
734 	}
735 
736 	if (found) {
737 		va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
738 		if (!va_start) {
739 			pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
740 			return NULL;
741 		}
742 		pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
743 			 oh->name, va_start);
744 	} else {
745 		pr_debug("omap_hwmod: %s: no MPU register target found\n",
746 			 oh->name);
747 	}
748 
749 	return (found) ? va_start : NULL;
750 }
751 
752 /**
753  * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
754  * @oh: struct omap_hwmod *
755  *
756  * If module is marked as SWSUP_SIDLE, force the module out of slave
757  * idle; otherwise, configure it for smart-idle.  If module is marked
758  * as SWSUP_MSUSPEND, force the module out of master standby;
759  * otherwise, configure it for smart-standby.  No return value.
760  */
761 static void _enable_sysc(struct omap_hwmod *oh)
762 {
763 	u8 idlemode, sf;
764 	u32 v;
765 
766 	if (!oh->class->sysc)
767 		return;
768 
769 	v = oh->_sysc_cache;
770 	sf = oh->class->sysc->sysc_flags;
771 
772 	if (sf & SYSC_HAS_SIDLEMODE) {
773 		idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
774 			HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
775 		_set_slave_idlemode(oh, idlemode, &v);
776 	}
777 
778 	if (sf & SYSC_HAS_MIDLEMODE) {
779 		idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
780 			HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
781 		_set_master_standbymode(oh, idlemode, &v);
782 	}
783 
784 	/*
785 	 * XXX The clock framework should handle this, by
786 	 * calling into this code.  But this must wait until the
787 	 * clock structures are tagged with omap_hwmod entries
788 	 */
789 	if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
790 	    (sf & SYSC_HAS_CLOCKACTIVITY))
791 		_set_clockactivity(oh, oh->class->sysc->clockact, &v);
792 
793 	/* If slave is in SMARTIDLE, also enable wakeup */
794 	if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
795 		_enable_wakeup(oh, &v);
796 
797 	_write_sysconfig(v, oh);
798 
799 	/*
800 	 * Set the autoidle bit only after setting the smartidle bit
801 	 * Setting this will not have any impact on the other modules.
802 	 */
803 	if (sf & SYSC_HAS_AUTOIDLE) {
804 		idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
805 			0 : 1;
806 		_set_module_autoidle(oh, idlemode, &v);
807 		_write_sysconfig(v, oh);
808 	}
809 }
810 
811 /**
812  * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
813  * @oh: struct omap_hwmod *
814  *
815  * If module is marked as SWSUP_SIDLE, force the module into slave
816  * idle; otherwise, configure it for smart-idle.  If module is marked
817  * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
818  * configure it for smart-standby.  No return value.
819  */
820 static void _idle_sysc(struct omap_hwmod *oh)
821 {
822 	u8 idlemode, sf;
823 	u32 v;
824 
825 	if (!oh->class->sysc)
826 		return;
827 
828 	v = oh->_sysc_cache;
829 	sf = oh->class->sysc->sysc_flags;
830 
831 	if (sf & SYSC_HAS_SIDLEMODE) {
832 		idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
833 			HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
834 		_set_slave_idlemode(oh, idlemode, &v);
835 	}
836 
837 	if (sf & SYSC_HAS_MIDLEMODE) {
838 		idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
839 			HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
840 		_set_master_standbymode(oh, idlemode, &v);
841 	}
842 
843 	/* If slave is in SMARTIDLE, also enable wakeup */
844 	if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
845 		_enable_wakeup(oh, &v);
846 
847 	_write_sysconfig(v, oh);
848 }
849 
850 /**
851  * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
852  * @oh: struct omap_hwmod *
853  *
854  * Force the module into slave idle and master suspend. No return
855  * value.
856  */
857 static void _shutdown_sysc(struct omap_hwmod *oh)
858 {
859 	u32 v;
860 	u8 sf;
861 
862 	if (!oh->class->sysc)
863 		return;
864 
865 	v = oh->_sysc_cache;
866 	sf = oh->class->sysc->sysc_flags;
867 
868 	if (sf & SYSC_HAS_SIDLEMODE)
869 		_set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
870 
871 	if (sf & SYSC_HAS_MIDLEMODE)
872 		_set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
873 
874 	if (sf & SYSC_HAS_AUTOIDLE)
875 		_set_module_autoidle(oh, 1, &v);
876 
877 	_write_sysconfig(v, oh);
878 }
879 
880 /**
881  * _lookup - find an omap_hwmod by name
882  * @name: find an omap_hwmod by name
883  *
884  * Return a pointer to an omap_hwmod by name, or NULL if not found.
885  */
886 static struct omap_hwmod *_lookup(const char *name)
887 {
888 	struct omap_hwmod *oh, *temp_oh;
889 
890 	oh = NULL;
891 
892 	list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
893 		if (!strcmp(name, temp_oh->name)) {
894 			oh = temp_oh;
895 			break;
896 		}
897 	}
898 
899 	return oh;
900 }
901 
902 /**
903  * _init_clocks - clk_get() all clocks associated with this hwmod
904  * @oh: struct omap_hwmod *
905  * @data: not used; pass NULL
906  *
907  * Called by omap_hwmod_late_init() (after omap2_clk_init()).
908  * Resolves all clock names embedded in the hwmod.  Returns -EINVAL if
909  * the omap_hwmod has not yet been registered or if the clocks have
910  * already been initialized, 0 on success, or a non-zero error on
911  * failure.
912  */
913 static int _init_clocks(struct omap_hwmod *oh, void *data)
914 {
915 	int ret = 0;
916 
917 	if (!oh || (oh->_state != _HWMOD_STATE_REGISTERED))
918 		return -EINVAL;
919 
920 	pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
921 
922 	ret |= _init_main_clk(oh);
923 	ret |= _init_interface_clks(oh);
924 	ret |= _init_opt_clks(oh);
925 
926 	if (!ret)
927 		oh->_state = _HWMOD_STATE_CLKS_INITED;
928 
929 	return 0;
930 }
931 
932 /**
933  * _wait_target_ready - wait for a module to leave slave idle
934  * @oh: struct omap_hwmod *
935  *
936  * Wait for a module @oh to leave slave idle.  Returns 0 if the module
937  * does not have an IDLEST bit or if the module successfully leaves
938  * slave idle; otherwise, pass along the return value of the
939  * appropriate *_cm_wait_module_ready() function.
940  */
941 static int _wait_target_ready(struct omap_hwmod *oh)
942 {
943 	struct omap_hwmod_ocp_if *os;
944 	int ret;
945 
946 	if (!oh)
947 		return -EINVAL;
948 
949 	if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
950 		return 0;
951 
952 	os = oh->slaves[oh->_mpu_port_index];
953 
954 	if (oh->flags & HWMOD_NO_IDLEST)
955 		return 0;
956 
957 	/* XXX check module SIDLEMODE */
958 
959 	/* XXX check clock enable states */
960 
961 	if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
962 		ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
963 						 oh->prcm.omap2.idlest_reg_id,
964 						 oh->prcm.omap2.idlest_idle_bit);
965 	} else if (cpu_is_omap44xx()) {
966 		ret = omap4_cm_wait_module_ready(oh->prcm.omap4.clkctrl_reg);
967 	} else {
968 		BUG();
969 	};
970 
971 	return ret;
972 }
973 
974 /**
975  * _lookup_hardreset - return the register bit shift for this hwmod/reset line
976  * @oh: struct omap_hwmod *
977  * @name: name of the reset line in the context of this hwmod
978  *
979  * Return the bit position of the reset line that match the
980  * input name. Return -ENOENT if not found.
981  */
982 static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name)
983 {
984 	int i;
985 
986 	for (i = 0; i < oh->rst_lines_cnt; i++) {
987 		const char *rst_line = oh->rst_lines[i].name;
988 		if (!strcmp(rst_line, name)) {
989 			u8 shift = oh->rst_lines[i].rst_shift;
990 			pr_debug("omap_hwmod: %s: _lookup_hardreset: %s: %d\n",
991 				 oh->name, rst_line, shift);
992 
993 			return shift;
994 		}
995 	}
996 
997 	return -ENOENT;
998 }
999 
1000 /**
1001  * _assert_hardreset - assert the HW reset line of submodules
1002  * contained in the hwmod module.
1003  * @oh: struct omap_hwmod *
1004  * @name: name of the reset line to lookup and assert
1005  *
1006  * Some IP like dsp, ipu or iva contain processor that require
1007  * an HW reset line to be assert / deassert in order to enable fully
1008  * the IP.
1009  */
1010 static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1011 {
1012 	u8 shift;
1013 
1014 	if (!oh)
1015 		return -EINVAL;
1016 
1017 	shift = _lookup_hardreset(oh, name);
1018 	if (IS_ERR_VALUE(shift))
1019 		return shift;
1020 
1021 	if (cpu_is_omap24xx() || cpu_is_omap34xx())
1022 		return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
1023 						  shift);
1024 	else if (cpu_is_omap44xx())
1025 		return omap4_prm_assert_hardreset(oh->prcm.omap4.rstctrl_reg,
1026 						  shift);
1027 	else
1028 		return -EINVAL;
1029 }
1030 
1031 /**
1032  * _deassert_hardreset - deassert the HW reset line of submodules contained
1033  * in the hwmod module.
1034  * @oh: struct omap_hwmod *
1035  * @name: name of the reset line to look up and deassert
1036  *
1037  * Some IP like dsp, ipu or iva contain processor that require
1038  * an HW reset line to be assert / deassert in order to enable fully
1039  * the IP.
1040  */
1041 static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1042 {
1043 	u8 shift;
1044 	int r;
1045 
1046 	if (!oh)
1047 		return -EINVAL;
1048 
1049 	shift = _lookup_hardreset(oh, name);
1050 	if (IS_ERR_VALUE(shift))
1051 		return shift;
1052 
1053 	if (cpu_is_omap24xx() || cpu_is_omap34xx())
1054 		r = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
1055 						 shift);
1056 	else if (cpu_is_omap44xx())
1057 		r = omap4_prm_deassert_hardreset(oh->prcm.omap4.rstctrl_reg,
1058 						 shift);
1059 	else
1060 		return -EINVAL;
1061 
1062 	if (r == -EBUSY)
1063 		pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
1064 
1065 	return r;
1066 }
1067 
1068 /**
1069  * _read_hardreset - read the HW reset line state of submodules
1070  * contained in the hwmod module
1071  * @oh: struct omap_hwmod *
1072  * @name: name of the reset line to look up and read
1073  *
1074  * Return the state of the reset line.
1075  */
1076 static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1077 {
1078 	u8 shift;
1079 
1080 	if (!oh)
1081 		return -EINVAL;
1082 
1083 	shift = _lookup_hardreset(oh, name);
1084 	if (IS_ERR_VALUE(shift))
1085 		return shift;
1086 
1087 	if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
1088 		return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
1089 						       shift);
1090 	} else if (cpu_is_omap44xx()) {
1091 		return omap4_prm_is_hardreset_asserted(oh->prcm.omap4.rstctrl_reg,
1092 						       shift);
1093 	} else {
1094 		return -EINVAL;
1095 	}
1096 }
1097 
1098 /**
1099  * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
1100  * @oh: struct omap_hwmod *
1101  *
1102  * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit.  hwmod must be
1103  * enabled for this to work.  Returns -EINVAL if the hwmod cannot be
1104  * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
1105  * the module did not reset in time, or 0 upon success.
1106  *
1107  * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
1108  * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
1109  * use the SYSCONFIG softreset bit to provide the status.
1110  *
1111  * Note that some IP like McBSP do have reset control but don't have
1112  * reset status.
1113  */
1114 static int _ocp_softreset(struct omap_hwmod *oh)
1115 {
1116 	u32 v;
1117 	int c = 0;
1118 	int ret = 0;
1119 
1120 	if (!oh->class->sysc ||
1121 	    !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
1122 		return -EINVAL;
1123 
1124 	/* clocks must be on for this operation */
1125 	if (oh->_state != _HWMOD_STATE_ENABLED) {
1126 		pr_warning("omap_hwmod: %s: reset can only be entered from "
1127 			   "enabled state\n", oh->name);
1128 		return -EINVAL;
1129 	}
1130 
1131 	/* For some modules, all optionnal clocks need to be enabled as well */
1132 	if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1133 		_enable_optional_clocks(oh);
1134 
1135 	pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
1136 
1137 	v = oh->_sysc_cache;
1138 	ret = _set_softreset(oh, &v);
1139 	if (ret)
1140 		goto dis_opt_clks;
1141 	_write_sysconfig(v, oh);
1142 
1143 	if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
1144 		omap_test_timeout((omap_hwmod_read(oh,
1145 						    oh->class->sysc->syss_offs)
1146 				   & SYSS_RESETDONE_MASK),
1147 				  MAX_MODULE_SOFTRESET_WAIT, c);
1148 	else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS)
1149 		omap_test_timeout(!(omap_hwmod_read(oh,
1150 						     oh->class->sysc->sysc_offs)
1151 				   & SYSC_TYPE2_SOFTRESET_MASK),
1152 				  MAX_MODULE_SOFTRESET_WAIT, c);
1153 
1154 	if (c == MAX_MODULE_SOFTRESET_WAIT)
1155 		pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1156 			   oh->name, MAX_MODULE_SOFTRESET_WAIT);
1157 	else
1158 		pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
1159 
1160 	/*
1161 	 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1162 	 * _wait_target_ready() or _reset()
1163 	 */
1164 
1165 	ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
1166 
1167 dis_opt_clks:
1168 	if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1169 		_disable_optional_clocks(oh);
1170 
1171 	return ret;
1172 }
1173 
1174 /**
1175  * _reset - reset an omap_hwmod
1176  * @oh: struct omap_hwmod *
1177  *
1178  * Resets an omap_hwmod @oh.  The default software reset mechanism for
1179  * most OMAP IP blocks is triggered via the OCP_SYSCONFIG.SOFTRESET
1180  * bit.  However, some hwmods cannot be reset via this method: some
1181  * are not targets and therefore have no OCP header registers to
1182  * access; others (like the IVA) have idiosyncratic reset sequences.
1183  * So for these relatively rare cases, custom reset code can be
1184  * supplied in the struct omap_hwmod_class .reset function pointer.
1185  * Passes along the return value from either _reset() or the custom
1186  * reset function - these must return -EINVAL if the hwmod cannot be
1187  * reset this way or if the hwmod is in the wrong state, -ETIMEDOUT if
1188  * the module did not reset in time, or 0 upon success.
1189  */
1190 static int _reset(struct omap_hwmod *oh)
1191 {
1192 	int ret;
1193 
1194 	pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1195 
1196 	ret = (oh->class->reset) ? oh->class->reset(oh) : _ocp_softreset(oh);
1197 
1198 	return ret;
1199 }
1200 
1201 /**
1202  * _enable - enable an omap_hwmod
1203  * @oh: struct omap_hwmod *
1204  *
1205  * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
1206  * register target.  Returns -EINVAL if the hwmod is in the wrong
1207  * state or passes along the return value of _wait_target_ready().
1208  */
1209 static int _enable(struct omap_hwmod *oh)
1210 {
1211 	int r;
1212 
1213 	if (oh->_state != _HWMOD_STATE_INITIALIZED &&
1214 	    oh->_state != _HWMOD_STATE_IDLE &&
1215 	    oh->_state != _HWMOD_STATE_DISABLED) {
1216 		WARN(1, "omap_hwmod: %s: enabled state can only be entered "
1217 		     "from initialized, idle, or disabled state\n", oh->name);
1218 		return -EINVAL;
1219 	}
1220 
1221 	pr_debug("omap_hwmod: %s: enabling\n", oh->name);
1222 
1223 	/*
1224 	 * If an IP contains only one HW reset line, then de-assert it in order
1225 	 * to allow to enable the clocks. Otherwise the PRCM will return
1226 	 * Intransition status, and the init will failed.
1227 	 */
1228 	if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
1229 	     oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
1230 		_deassert_hardreset(oh, oh->rst_lines[0].name);
1231 
1232 	/* Mux pins for device runtime if populated */
1233 	if (oh->mux)
1234 		omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
1235 
1236 	_add_initiator_dep(oh, mpu_oh);
1237 	_enable_clocks(oh);
1238 
1239 	r = _wait_target_ready(oh);
1240 	if (!r) {
1241 		oh->_state = _HWMOD_STATE_ENABLED;
1242 
1243 		/* Access the sysconfig only if the target is ready */
1244 		if (oh->class->sysc) {
1245 			if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
1246 				_update_sysc_cache(oh);
1247 			_enable_sysc(oh);
1248 		}
1249 	} else {
1250 		_disable_clocks(oh);
1251 		pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
1252 			 oh->name, r);
1253 	}
1254 
1255 	return r;
1256 }
1257 
1258 /**
1259  * _idle - idle an omap_hwmod
1260  * @oh: struct omap_hwmod *
1261  *
1262  * Idles an omap_hwmod @oh.  This should be called once the hwmod has
1263  * no further work.  Returns -EINVAL if the hwmod is in the wrong
1264  * state or returns 0.
1265  */
1266 static int _idle(struct omap_hwmod *oh)
1267 {
1268 	if (oh->_state != _HWMOD_STATE_ENABLED) {
1269 		WARN(1, "omap_hwmod: %s: idle state can only be entered from "
1270 		     "enabled state\n", oh->name);
1271 		return -EINVAL;
1272 	}
1273 
1274 	pr_debug("omap_hwmod: %s: idling\n", oh->name);
1275 
1276 	if (oh->class->sysc)
1277 		_idle_sysc(oh);
1278 	_del_initiator_dep(oh, mpu_oh);
1279 	_disable_clocks(oh);
1280 
1281 	/* Mux pins for device idle if populated */
1282 	if (oh->mux)
1283 		omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
1284 
1285 	oh->_state = _HWMOD_STATE_IDLE;
1286 
1287 	return 0;
1288 }
1289 
1290 /**
1291  * _shutdown - shutdown an omap_hwmod
1292  * @oh: struct omap_hwmod *
1293  *
1294  * Shut down an omap_hwmod @oh.  This should be called when the driver
1295  * used for the hwmod is removed or unloaded or if the driver is not
1296  * used by the system.  Returns -EINVAL if the hwmod is in the wrong
1297  * state or returns 0.
1298  */
1299 static int _shutdown(struct omap_hwmod *oh)
1300 {
1301 	int ret;
1302 	u8 prev_state;
1303 
1304 	if (oh->_state != _HWMOD_STATE_IDLE &&
1305 	    oh->_state != _HWMOD_STATE_ENABLED) {
1306 		WARN(1, "omap_hwmod: %s: disabled state can only be entered "
1307 		     "from idle, or enabled state\n", oh->name);
1308 		return -EINVAL;
1309 	}
1310 
1311 	pr_debug("omap_hwmod: %s: disabling\n", oh->name);
1312 
1313 	if (oh->class->pre_shutdown) {
1314 		prev_state = oh->_state;
1315 		if (oh->_state == _HWMOD_STATE_IDLE)
1316 			_enable(oh);
1317 		ret = oh->class->pre_shutdown(oh);
1318 		if (ret) {
1319 			if (prev_state == _HWMOD_STATE_IDLE)
1320 				_idle(oh);
1321 			return ret;
1322 		}
1323 	}
1324 
1325 	if (oh->class->sysc)
1326 		_shutdown_sysc(oh);
1327 
1328 	/*
1329 	 * If an IP contains only one HW reset line, then assert it
1330 	 * before disabling the clocks and shutting down the IP.
1331 	 */
1332 	if (oh->rst_lines_cnt == 1)
1333 		_assert_hardreset(oh, oh->rst_lines[0].name);
1334 
1335 	/* clocks and deps are already disabled in idle */
1336 	if (oh->_state == _HWMOD_STATE_ENABLED) {
1337 		_del_initiator_dep(oh, mpu_oh);
1338 		/* XXX what about the other system initiators here? dma, dsp */
1339 		_disable_clocks(oh);
1340 	}
1341 	/* XXX Should this code also force-disable the optional clocks? */
1342 
1343 	/* Mux pins to safe mode or use populated off mode values */
1344 	if (oh->mux)
1345 		omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
1346 
1347 	oh->_state = _HWMOD_STATE_DISABLED;
1348 
1349 	return 0;
1350 }
1351 
1352 /**
1353  * _setup - do initial configuration of omap_hwmod
1354  * @oh: struct omap_hwmod *
1355  *
1356  * Writes the CLOCKACTIVITY bits @clockact to the hwmod @oh
1357  * OCP_SYSCONFIG register.  Returns -EINVAL if the hwmod is in the
1358  * wrong state or returns 0.
1359  */
1360 static int _setup(struct omap_hwmod *oh, void *data)
1361 {
1362 	int i, r;
1363 	u8 postsetup_state;
1364 
1365 	/* Set iclk autoidle mode */
1366 	if (oh->slaves_cnt > 0) {
1367 		for (i = 0; i < oh->slaves_cnt; i++) {
1368 			struct omap_hwmod_ocp_if *os = oh->slaves[i];
1369 			struct clk *c = os->_clk;
1370 
1371 			if (!c)
1372 				continue;
1373 
1374 			if (os->flags & OCPIF_SWSUP_IDLE) {
1375 				/* XXX omap_iclk_deny_idle(c); */
1376 			} else {
1377 				/* XXX omap_iclk_allow_idle(c); */
1378 				clk_enable(c);
1379 			}
1380 		}
1381 	}
1382 
1383 	oh->_state = _HWMOD_STATE_INITIALIZED;
1384 
1385 	/*
1386 	 * In the case of hwmod with hardreset that should not be
1387 	 * de-assert at boot time, we have to keep the module
1388 	 * initialized, because we cannot enable it properly with the
1389 	 * reset asserted. Exit without warning because that behavior is
1390 	 * expected.
1391 	 */
1392 	if ((oh->flags & HWMOD_INIT_NO_RESET) && oh->rst_lines_cnt == 1)
1393 		return 0;
1394 
1395 	r = _enable(oh);
1396 	if (r) {
1397 		pr_warning("omap_hwmod: %s: cannot be enabled (%d)\n",
1398 			   oh->name, oh->_state);
1399 		return 0;
1400 	}
1401 
1402 	if (!(oh->flags & HWMOD_INIT_NO_RESET)) {
1403 		_reset(oh);
1404 
1405 		/*
1406 		 * OCP_SYSCONFIG bits need to be reprogrammed after a softreset.
1407 		 * The _enable() function should be split to
1408 		 * avoid the rewrite of the OCP_SYSCONFIG register.
1409 		 */
1410 		if (oh->class->sysc) {
1411 			_update_sysc_cache(oh);
1412 			_enable_sysc(oh);
1413 		}
1414 	}
1415 
1416 	postsetup_state = oh->_postsetup_state;
1417 	if (postsetup_state == _HWMOD_STATE_UNKNOWN)
1418 		postsetup_state = _HWMOD_STATE_ENABLED;
1419 
1420 	/*
1421 	 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
1422 	 * it should be set by the core code as a runtime flag during startup
1423 	 */
1424 	if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
1425 	    (postsetup_state == _HWMOD_STATE_IDLE))
1426 		postsetup_state = _HWMOD_STATE_ENABLED;
1427 
1428 	if (postsetup_state == _HWMOD_STATE_IDLE)
1429 		_idle(oh);
1430 	else if (postsetup_state == _HWMOD_STATE_DISABLED)
1431 		_shutdown(oh);
1432 	else if (postsetup_state != _HWMOD_STATE_ENABLED)
1433 		WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
1434 		     oh->name, postsetup_state);
1435 
1436 	return 0;
1437 }
1438 
1439 /**
1440  * _register - register a struct omap_hwmod
1441  * @oh: struct omap_hwmod *
1442  *
1443  * Registers the omap_hwmod @oh.  Returns -EEXIST if an omap_hwmod
1444  * already has been registered by the same name; -EINVAL if the
1445  * omap_hwmod is in the wrong state, if @oh is NULL, if the
1446  * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
1447  * name, or if the omap_hwmod's class is missing a name; or 0 upon
1448  * success.
1449  *
1450  * XXX The data should be copied into bootmem, so the original data
1451  * should be marked __initdata and freed after init.  This would allow
1452  * unneeded omap_hwmods to be freed on multi-OMAP configurations.  Note
1453  * that the copy process would be relatively complex due to the large number
1454  * of substructures.
1455  */
1456 static int __init _register(struct omap_hwmod *oh)
1457 {
1458 	int ret, ms_id;
1459 
1460 	if (!oh || !oh->name || !oh->class || !oh->class->name ||
1461 	    (oh->_state != _HWMOD_STATE_UNKNOWN))
1462 		return -EINVAL;
1463 
1464 	pr_debug("omap_hwmod: %s: registering\n", oh->name);
1465 
1466 	if (_lookup(oh->name))
1467 		return -EEXIST;
1468 
1469 	ms_id = _find_mpu_port_index(oh);
1470 	if (!IS_ERR_VALUE(ms_id)) {
1471 		oh->_mpu_port_index = ms_id;
1472 		oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
1473 	} else {
1474 		oh->_int_flags |= _HWMOD_NO_MPU_PORT;
1475 	}
1476 
1477 	list_add_tail(&oh->node, &omap_hwmod_list);
1478 
1479 	spin_lock_init(&oh->_lock);
1480 
1481 	oh->_state = _HWMOD_STATE_REGISTERED;
1482 
1483 	ret = 0;
1484 
1485 	return ret;
1486 }
1487 
1488 
1489 /* Public functions */
1490 
1491 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
1492 {
1493 	if (oh->flags & HWMOD_16BIT_REG)
1494 		return __raw_readw(oh->_mpu_rt_va + reg_offs);
1495 	else
1496 		return __raw_readl(oh->_mpu_rt_va + reg_offs);
1497 }
1498 
1499 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
1500 {
1501 	if (oh->flags & HWMOD_16BIT_REG)
1502 		__raw_writew(v, oh->_mpu_rt_va + reg_offs);
1503 	else
1504 		__raw_writel(v, oh->_mpu_rt_va + reg_offs);
1505 }
1506 
1507 /**
1508  * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
1509  * @oh: struct omap_hwmod *
1510  * @idlemode: SIDLEMODE field bits (shifted to bit 0)
1511  *
1512  * Sets the IP block's OCP slave idlemode in hardware, and updates our
1513  * local copy.  Intended to be used by drivers that have some erratum
1514  * that requires direct manipulation of the SIDLEMODE bits.  Returns
1515  * -EINVAL if @oh is null, or passes along the return value from
1516  * _set_slave_idlemode().
1517  *
1518  * XXX Does this function have any current users?  If not, we should
1519  * remove it; it is better to let the rest of the hwmod code handle this.
1520  * Any users of this function should be scrutinized carefully.
1521  */
1522 int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
1523 {
1524 	u32 v;
1525 	int retval = 0;
1526 
1527 	if (!oh)
1528 		return -EINVAL;
1529 
1530 	v = oh->_sysc_cache;
1531 
1532 	retval = _set_slave_idlemode(oh, idlemode, &v);
1533 	if (!retval)
1534 		_write_sysconfig(v, oh);
1535 
1536 	return retval;
1537 }
1538 
1539 /**
1540  * omap_hwmod_lookup - look up a registered omap_hwmod by name
1541  * @name: name of the omap_hwmod to look up
1542  *
1543  * Given a @name of an omap_hwmod, return a pointer to the registered
1544  * struct omap_hwmod *, or NULL upon error.
1545  */
1546 struct omap_hwmod *omap_hwmod_lookup(const char *name)
1547 {
1548 	struct omap_hwmod *oh;
1549 
1550 	if (!name)
1551 		return NULL;
1552 
1553 	oh = _lookup(name);
1554 
1555 	return oh;
1556 }
1557 
1558 /**
1559  * omap_hwmod_for_each - call function for each registered omap_hwmod
1560  * @fn: pointer to a callback function
1561  * @data: void * data to pass to callback function
1562  *
1563  * Call @fn for each registered omap_hwmod, passing @data to each
1564  * function.  @fn must return 0 for success or any other value for
1565  * failure.  If @fn returns non-zero, the iteration across omap_hwmods
1566  * will stop and the non-zero return value will be passed to the
1567  * caller of omap_hwmod_for_each().  @fn is called with
1568  * omap_hwmod_for_each() held.
1569  */
1570 int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
1571 			void *data)
1572 {
1573 	struct omap_hwmod *temp_oh;
1574 	int ret;
1575 
1576 	if (!fn)
1577 		return -EINVAL;
1578 
1579 	list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1580 		ret = (*fn)(temp_oh, data);
1581 		if (ret)
1582 			break;
1583 	}
1584 
1585 	return ret;
1586 }
1587 
1588 
1589 /**
1590  * omap_hwmod_init - init omap_hwmod code and register hwmods
1591  * @ohs: pointer to an array of omap_hwmods to register
1592  *
1593  * Intended to be called early in boot before the clock framework is
1594  * initialized.  If @ohs is not null, will register all omap_hwmods
1595  * listed in @ohs that are valid for this chip.  Returns -EINVAL if
1596  * omap_hwmod_init() has already been called or 0 otherwise.
1597  */
1598 int __init omap_hwmod_init(struct omap_hwmod **ohs)
1599 {
1600 	struct omap_hwmod *oh;
1601 	int r;
1602 
1603 	if (inited)
1604 		return -EINVAL;
1605 
1606 	inited = 1;
1607 
1608 	if (!ohs)
1609 		return 0;
1610 
1611 	oh = *ohs;
1612 	while (oh) {
1613 		if (omap_chip_is(oh->omap_chip)) {
1614 			r = _register(oh);
1615 			WARN(r, "omap_hwmod: %s: _register returned "
1616 			     "%d\n", oh->name, r);
1617 		}
1618 		oh = *++ohs;
1619 	}
1620 
1621 	return 0;
1622 }
1623 
1624 /**
1625  * omap_hwmod_late_init - do some post-clock framework initialization
1626  *
1627  * Must be called after omap2_clk_init().  Resolves the struct clk names
1628  * to struct clk pointers for each registered omap_hwmod.  Also calls
1629  * _setup() on each hwmod.  Returns 0.
1630  */
1631 int omap_hwmod_late_init(void)
1632 {
1633 	int r;
1634 
1635 	/* XXX check return value */
1636 	r = omap_hwmod_for_each(_init_clocks, NULL);
1637 	WARN(r, "omap_hwmod: omap_hwmod_late_init(): _init_clocks failed\n");
1638 
1639 	mpu_oh = omap_hwmod_lookup(MPU_INITIATOR_NAME);
1640 	WARN(!mpu_oh, "omap_hwmod: could not find MPU initiator hwmod %s\n",
1641 	     MPU_INITIATOR_NAME);
1642 
1643 	omap_hwmod_for_each(_setup, NULL);
1644 
1645 	return 0;
1646 }
1647 
1648 /**
1649  * omap_hwmod_enable - enable an omap_hwmod
1650  * @oh: struct omap_hwmod *
1651  *
1652  * Enable an omap_hwmod @oh.  Intended to be called by omap_device_enable().
1653  * Returns -EINVAL on error or passes along the return value from _enable().
1654  */
1655 int omap_hwmod_enable(struct omap_hwmod *oh)
1656 {
1657 	int r;
1658 	unsigned long flags;
1659 
1660 	if (!oh)
1661 		return -EINVAL;
1662 
1663 	spin_lock_irqsave(&oh->_lock, flags);
1664 	r = _enable(oh);
1665 	spin_unlock_irqrestore(&oh->_lock, flags);
1666 
1667 	return r;
1668 }
1669 
1670 /**
1671  * omap_hwmod_idle - idle an omap_hwmod
1672  * @oh: struct omap_hwmod *
1673  *
1674  * Idle an omap_hwmod @oh.  Intended to be called by omap_device_idle().
1675  * Returns -EINVAL on error or passes along the return value from _idle().
1676  */
1677 int omap_hwmod_idle(struct omap_hwmod *oh)
1678 {
1679 	unsigned long flags;
1680 
1681 	if (!oh)
1682 		return -EINVAL;
1683 
1684 	spin_lock_irqsave(&oh->_lock, flags);
1685 	_idle(oh);
1686 	spin_unlock_irqrestore(&oh->_lock, flags);
1687 
1688 	return 0;
1689 }
1690 
1691 /**
1692  * omap_hwmod_shutdown - shutdown an omap_hwmod
1693  * @oh: struct omap_hwmod *
1694  *
1695  * Shutdown an omap_hwmod @oh.  Intended to be called by
1696  * omap_device_shutdown().  Returns -EINVAL on error or passes along
1697  * the return value from _shutdown().
1698  */
1699 int omap_hwmod_shutdown(struct omap_hwmod *oh)
1700 {
1701 	unsigned long flags;
1702 
1703 	if (!oh)
1704 		return -EINVAL;
1705 
1706 	spin_lock_irqsave(&oh->_lock, flags);
1707 	_shutdown(oh);
1708 	spin_unlock_irqrestore(&oh->_lock, flags);
1709 
1710 	return 0;
1711 }
1712 
1713 /**
1714  * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
1715  * @oh: struct omap_hwmod *oh
1716  *
1717  * Intended to be called by the omap_device code.
1718  */
1719 int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
1720 {
1721 	unsigned long flags;
1722 
1723 	spin_lock_irqsave(&oh->_lock, flags);
1724 	_enable_clocks(oh);
1725 	spin_unlock_irqrestore(&oh->_lock, flags);
1726 
1727 	return 0;
1728 }
1729 
1730 /**
1731  * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
1732  * @oh: struct omap_hwmod *oh
1733  *
1734  * Intended to be called by the omap_device code.
1735  */
1736 int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
1737 {
1738 	unsigned long flags;
1739 
1740 	spin_lock_irqsave(&oh->_lock, flags);
1741 	_disable_clocks(oh);
1742 	spin_unlock_irqrestore(&oh->_lock, flags);
1743 
1744 	return 0;
1745 }
1746 
1747 /**
1748  * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
1749  * @oh: struct omap_hwmod *oh
1750  *
1751  * Intended to be called by drivers and core code when all posted
1752  * writes to a device must complete before continuing further
1753  * execution (for example, after clearing some device IRQSTATUS
1754  * register bits)
1755  *
1756  * XXX what about targets with multiple OCP threads?
1757  */
1758 void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
1759 {
1760 	BUG_ON(!oh);
1761 
1762 	if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
1763 		WARN(1, "omap_device: %s: OCP barrier impossible due to "
1764 		      "device configuration\n", oh->name);
1765 		return;
1766 	}
1767 
1768 	/*
1769 	 * Forces posted writes to complete on the OCP thread handling
1770 	 * register writes
1771 	 */
1772 	omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
1773 }
1774 
1775 /**
1776  * omap_hwmod_reset - reset the hwmod
1777  * @oh: struct omap_hwmod *
1778  *
1779  * Under some conditions, a driver may wish to reset the entire device.
1780  * Called from omap_device code.  Returns -EINVAL on error or passes along
1781  * the return value from _reset().
1782  */
1783 int omap_hwmod_reset(struct omap_hwmod *oh)
1784 {
1785 	int r;
1786 	unsigned long flags;
1787 
1788 	if (!oh)
1789 		return -EINVAL;
1790 
1791 	spin_lock_irqsave(&oh->_lock, flags);
1792 	r = _reset(oh);
1793 	spin_unlock_irqrestore(&oh->_lock, flags);
1794 
1795 	return r;
1796 }
1797 
1798 /**
1799  * omap_hwmod_count_resources - count number of struct resources needed by hwmod
1800  * @oh: struct omap_hwmod *
1801  * @res: pointer to the first element of an array of struct resource to fill
1802  *
1803  * Count the number of struct resource array elements necessary to
1804  * contain omap_hwmod @oh resources.  Intended to be called by code
1805  * that registers omap_devices.  Intended to be used to determine the
1806  * size of a dynamically-allocated struct resource array, before
1807  * calling omap_hwmod_fill_resources().  Returns the number of struct
1808  * resource array elements needed.
1809  *
1810  * XXX This code is not optimized.  It could attempt to merge adjacent
1811  * resource IDs.
1812  *
1813  */
1814 int omap_hwmod_count_resources(struct omap_hwmod *oh)
1815 {
1816 	int ret, i;
1817 
1818 	ret = oh->mpu_irqs_cnt + oh->sdma_reqs_cnt;
1819 
1820 	for (i = 0; i < oh->slaves_cnt; i++)
1821 		ret += oh->slaves[i]->addr_cnt;
1822 
1823 	return ret;
1824 }
1825 
1826 /**
1827  * omap_hwmod_fill_resources - fill struct resource array with hwmod data
1828  * @oh: struct omap_hwmod *
1829  * @res: pointer to the first element of an array of struct resource to fill
1830  *
1831  * Fill the struct resource array @res with resource data from the
1832  * omap_hwmod @oh.  Intended to be called by code that registers
1833  * omap_devices.  See also omap_hwmod_count_resources().  Returns the
1834  * number of array elements filled.
1835  */
1836 int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
1837 {
1838 	int i, j;
1839 	int r = 0;
1840 
1841 	/* For each IRQ, DMA, memory area, fill in array.*/
1842 
1843 	for (i = 0; i < oh->mpu_irqs_cnt; i++) {
1844 		(res + r)->name = (oh->mpu_irqs + i)->name;
1845 		(res + r)->start = (oh->mpu_irqs + i)->irq;
1846 		(res + r)->end = (oh->mpu_irqs + i)->irq;
1847 		(res + r)->flags = IORESOURCE_IRQ;
1848 		r++;
1849 	}
1850 
1851 	for (i = 0; i < oh->sdma_reqs_cnt; i++) {
1852 		(res + r)->name = (oh->sdma_reqs + i)->name;
1853 		(res + r)->start = (oh->sdma_reqs + i)->dma_req;
1854 		(res + r)->end = (oh->sdma_reqs + i)->dma_req;
1855 		(res + r)->flags = IORESOURCE_DMA;
1856 		r++;
1857 	}
1858 
1859 	for (i = 0; i < oh->slaves_cnt; i++) {
1860 		struct omap_hwmod_ocp_if *os;
1861 
1862 		os = oh->slaves[i];
1863 
1864 		for (j = 0; j < os->addr_cnt; j++) {
1865 			(res + r)->start = (os->addr + j)->pa_start;
1866 			(res + r)->end = (os->addr + j)->pa_end;
1867 			(res + r)->flags = IORESOURCE_MEM;
1868 			r++;
1869 		}
1870 	}
1871 
1872 	return r;
1873 }
1874 
1875 /**
1876  * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
1877  * @oh: struct omap_hwmod *
1878  *
1879  * Return the powerdomain pointer associated with the OMAP module
1880  * @oh's main clock.  If @oh does not have a main clk, return the
1881  * powerdomain associated with the interface clock associated with the
1882  * module's MPU port. (XXX Perhaps this should use the SDMA port
1883  * instead?)  Returns NULL on error, or a struct powerdomain * on
1884  * success.
1885  */
1886 struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
1887 {
1888 	struct clk *c;
1889 
1890 	if (!oh)
1891 		return NULL;
1892 
1893 	if (oh->_clk) {
1894 		c = oh->_clk;
1895 	} else {
1896 		if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1897 			return NULL;
1898 		c = oh->slaves[oh->_mpu_port_index]->_clk;
1899 	}
1900 
1901 	if (!c->clkdm)
1902 		return NULL;
1903 
1904 	return c->clkdm->pwrdm.ptr;
1905 
1906 }
1907 
1908 /**
1909  * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
1910  * @oh: struct omap_hwmod *
1911  *
1912  * Returns the virtual address corresponding to the beginning of the
1913  * module's register target, in the address range that is intended to
1914  * be used by the MPU.  Returns the virtual address upon success or NULL
1915  * upon error.
1916  */
1917 void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
1918 {
1919 	if (!oh)
1920 		return NULL;
1921 
1922 	if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1923 		return NULL;
1924 
1925 	if (oh->_state == _HWMOD_STATE_UNKNOWN)
1926 		return NULL;
1927 
1928 	return oh->_mpu_rt_va;
1929 }
1930 
1931 /**
1932  * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
1933  * @oh: struct omap_hwmod *
1934  * @init_oh: struct omap_hwmod * (initiator)
1935  *
1936  * Add a sleep dependency between the initiator @init_oh and @oh.
1937  * Intended to be called by DSP/Bridge code via platform_data for the
1938  * DSP case; and by the DMA code in the sDMA case.  DMA code, *Bridge
1939  * code needs to add/del initiator dependencies dynamically
1940  * before/after accessing a device.  Returns the return value from
1941  * _add_initiator_dep().
1942  *
1943  * XXX Keep a usecount in the clockdomain code
1944  */
1945 int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
1946 				 struct omap_hwmod *init_oh)
1947 {
1948 	return _add_initiator_dep(oh, init_oh);
1949 }
1950 
1951 /*
1952  * XXX what about functions for drivers to save/restore ocp_sysconfig
1953  * for context save/restore operations?
1954  */
1955 
1956 /**
1957  * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
1958  * @oh: struct omap_hwmod *
1959  * @init_oh: struct omap_hwmod * (initiator)
1960  *
1961  * Remove a sleep dependency between the initiator @init_oh and @oh.
1962  * Intended to be called by DSP/Bridge code via platform_data for the
1963  * DSP case; and by the DMA code in the sDMA case.  DMA code, *Bridge
1964  * code needs to add/del initiator dependencies dynamically
1965  * before/after accessing a device.  Returns the return value from
1966  * _del_initiator_dep().
1967  *
1968  * XXX Keep a usecount in the clockdomain code
1969  */
1970 int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
1971 				 struct omap_hwmod *init_oh)
1972 {
1973 	return _del_initiator_dep(oh, init_oh);
1974 }
1975 
1976 /**
1977  * omap_hwmod_enable_wakeup - allow device to wake up the system
1978  * @oh: struct omap_hwmod *
1979  *
1980  * Sets the module OCP socket ENAWAKEUP bit to allow the module to
1981  * send wakeups to the PRCM.  Eventually this should sets PRCM wakeup
1982  * registers to cause the PRCM to receive wakeup events from the
1983  * module.  Does not set any wakeup routing registers beyond this
1984  * point - if the module is to wake up any other module or subsystem,
1985  * that must be set separately.  Called by omap_device code.  Returns
1986  * -EINVAL on error or 0 upon success.
1987  */
1988 int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
1989 {
1990 	unsigned long flags;
1991 	u32 v;
1992 
1993 	if (!oh->class->sysc ||
1994 	    !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
1995 		return -EINVAL;
1996 
1997 	spin_lock_irqsave(&oh->_lock, flags);
1998 	v = oh->_sysc_cache;
1999 	_enable_wakeup(oh, &v);
2000 	_write_sysconfig(v, oh);
2001 	spin_unlock_irqrestore(&oh->_lock, flags);
2002 
2003 	return 0;
2004 }
2005 
2006 /**
2007  * omap_hwmod_disable_wakeup - prevent device from waking the system
2008  * @oh: struct omap_hwmod *
2009  *
2010  * Clears the module OCP socket ENAWAKEUP bit to prevent the module
2011  * from sending wakeups to the PRCM.  Eventually this should clear
2012  * PRCM wakeup registers to cause the PRCM to ignore wakeup events
2013  * from the module.  Does not set any wakeup routing registers beyond
2014  * this point - if the module is to wake up any other module or
2015  * subsystem, that must be set separately.  Called by omap_device
2016  * code.  Returns -EINVAL on error or 0 upon success.
2017  */
2018 int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
2019 {
2020 	unsigned long flags;
2021 	u32 v;
2022 
2023 	if (!oh->class->sysc ||
2024 	    !(oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP))
2025 		return -EINVAL;
2026 
2027 	spin_lock_irqsave(&oh->_lock, flags);
2028 	v = oh->_sysc_cache;
2029 	_disable_wakeup(oh, &v);
2030 	_write_sysconfig(v, oh);
2031 	spin_unlock_irqrestore(&oh->_lock, flags);
2032 
2033 	return 0;
2034 }
2035 
2036 /**
2037  * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
2038  * contained in the hwmod module.
2039  * @oh: struct omap_hwmod *
2040  * @name: name of the reset line to lookup and assert
2041  *
2042  * Some IP like dsp, ipu or iva contain processor that require
2043  * an HW reset line to be assert / deassert in order to enable fully
2044  * the IP.  Returns -EINVAL if @oh is null or if the operation is not
2045  * yet supported on this OMAP; otherwise, passes along the return value
2046  * from _assert_hardreset().
2047  */
2048 int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
2049 {
2050 	int ret;
2051 	unsigned long flags;
2052 
2053 	if (!oh)
2054 		return -EINVAL;
2055 
2056 	spin_lock_irqsave(&oh->_lock, flags);
2057 	ret = _assert_hardreset(oh, name);
2058 	spin_unlock_irqrestore(&oh->_lock, flags);
2059 
2060 	return ret;
2061 }
2062 
2063 /**
2064  * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
2065  * contained in the hwmod module.
2066  * @oh: struct omap_hwmod *
2067  * @name: name of the reset line to look up and deassert
2068  *
2069  * Some IP like dsp, ipu or iva contain processor that require
2070  * an HW reset line to be assert / deassert in order to enable fully
2071  * the IP.  Returns -EINVAL if @oh is null or if the operation is not
2072  * yet supported on this OMAP; otherwise, passes along the return value
2073  * from _deassert_hardreset().
2074  */
2075 int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
2076 {
2077 	int ret;
2078 	unsigned long flags;
2079 
2080 	if (!oh)
2081 		return -EINVAL;
2082 
2083 	spin_lock_irqsave(&oh->_lock, flags);
2084 	ret = _deassert_hardreset(oh, name);
2085 	spin_unlock_irqrestore(&oh->_lock, flags);
2086 
2087 	return ret;
2088 }
2089 
2090 /**
2091  * omap_hwmod_read_hardreset - read the HW reset line state of submodules
2092  * contained in the hwmod module
2093  * @oh: struct omap_hwmod *
2094  * @name: name of the reset line to look up and read
2095  *
2096  * Return the current state of the hwmod @oh's reset line named @name:
2097  * returns -EINVAL upon parameter error or if this operation
2098  * is unsupported on the current OMAP; otherwise, passes along the return
2099  * value from _read_hardreset().
2100  */
2101 int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
2102 {
2103 	int ret;
2104 	unsigned long flags;
2105 
2106 	if (!oh)
2107 		return -EINVAL;
2108 
2109 	spin_lock_irqsave(&oh->_lock, flags);
2110 	ret = _read_hardreset(oh, name);
2111 	spin_unlock_irqrestore(&oh->_lock, flags);
2112 
2113 	return ret;
2114 }
2115 
2116 
2117 /**
2118  * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
2119  * @classname: struct omap_hwmod_class name to search for
2120  * @fn: callback function pointer to call for each hwmod in class @classname
2121  * @user: arbitrary context data to pass to the callback function
2122  *
2123  * For each omap_hwmod of class @classname, call @fn.
2124  * If the callback function returns something other than
2125  * zero, the iterator is terminated, and the callback function's return
2126  * value is passed back to the caller.  Returns 0 upon success, -EINVAL
2127  * if @classname or @fn are NULL, or passes back the error code from @fn.
2128  */
2129 int omap_hwmod_for_each_by_class(const char *classname,
2130 				 int (*fn)(struct omap_hwmod *oh,
2131 					   void *user),
2132 				 void *user)
2133 {
2134 	struct omap_hwmod *temp_oh;
2135 	int ret = 0;
2136 
2137 	if (!classname || !fn)
2138 		return -EINVAL;
2139 
2140 	pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
2141 		 __func__, classname);
2142 
2143 	list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
2144 		if (!strcmp(temp_oh->class->name, classname)) {
2145 			pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
2146 				 __func__, temp_oh->name);
2147 			ret = (*fn)(temp_oh, user);
2148 			if (ret)
2149 				break;
2150 		}
2151 	}
2152 
2153 	if (ret)
2154 		pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
2155 			 __func__, ret);
2156 
2157 	return ret;
2158 }
2159 
2160 /**
2161  * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
2162  * @oh: struct omap_hwmod *
2163  * @state: state that _setup() should leave the hwmod in
2164  *
2165  * Sets the hwmod state that @oh will enter at the end of _setup() (called by
2166  * omap_hwmod_late_init()).  Only valid to call between calls to
2167  * omap_hwmod_init() and omap_hwmod_late_init().  Returns 0 upon success or
2168  * -EINVAL if there is a problem with the arguments or if the hwmod is
2169  * in the wrong state.
2170  */
2171 int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
2172 {
2173 	int ret;
2174 	unsigned long flags;
2175 
2176 	if (!oh)
2177 		return -EINVAL;
2178 
2179 	if (state != _HWMOD_STATE_DISABLED &&
2180 	    state != _HWMOD_STATE_ENABLED &&
2181 	    state != _HWMOD_STATE_IDLE)
2182 		return -EINVAL;
2183 
2184 	spin_lock_irqsave(&oh->_lock, flags);
2185 
2186 	if (oh->_state != _HWMOD_STATE_REGISTERED) {
2187 		ret = -EINVAL;
2188 		goto ohsps_unlock;
2189 	}
2190 
2191 	oh->_postsetup_state = state;
2192 	ret = 0;
2193 
2194 ohsps_unlock:
2195 	spin_unlock_irqrestore(&oh->_lock, flags);
2196 
2197 	return ret;
2198 }
2199 
2200 /**
2201  * omap_hwmod_get_context_loss_count - get lost context count
2202  * @oh: struct omap_hwmod *
2203  *
2204  * Query the powerdomain of of @oh to get the context loss
2205  * count for this device.
2206  *
2207  * Returns the context loss count of the powerdomain assocated with @oh
2208  * upon success, or zero if no powerdomain exists for @oh.
2209  */
2210 u32 omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
2211 {
2212 	struct powerdomain *pwrdm;
2213 	int ret = 0;
2214 
2215 	pwrdm = omap_hwmod_get_pwrdm(oh);
2216 	if (pwrdm)
2217 		ret = pwrdm_get_context_loss_count(pwrdm);
2218 
2219 	return ret;
2220 }
2221