xref: /openbmc/linux/arch/arm/mach-omap2/omap_hwmod.c (revision d0b73b48)
1 /*
2  * omap_hwmod implementation for OMAP2/3/4
3  *
4  * Copyright (C) 2009-2011 Nokia Corporation
5  * Copyright (C) 2011-2012 Texas Instruments, Inc.
6  *
7  * Paul Walmsley, Benoît Cousson, Kevin Hilman
8  *
9  * Created in collaboration with (alphabetical order): Thara Gopinath,
10  * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
11  * Sawant, Santosh Shilimkar, Richard Woodruff
12  *
13  * This program is free software; you can redistribute it and/or modify
14  * it under the terms of the GNU General Public License version 2 as
15  * published by the Free Software Foundation.
16  *
17  * Introduction
18  * ------------
19  * One way to view an OMAP SoC is as a collection of largely unrelated
20  * IP blocks connected by interconnects.  The IP blocks include
21  * devices such as ARM processors, audio serial interfaces, UARTs,
22  * etc.  Some of these devices, like the DSP, are created by TI;
23  * others, like the SGX, largely originate from external vendors.  In
24  * TI's documentation, on-chip devices are referred to as "OMAP
25  * modules."  Some of these IP blocks are identical across several
26  * OMAP versions.  Others are revised frequently.
27  *
28  * These OMAP modules are tied together by various interconnects.
29  * Most of the address and data flow between modules is via OCP-based
30  * interconnects such as the L3 and L4 buses; but there are other
31  * interconnects that distribute the hardware clock tree, handle idle
32  * and reset signaling, supply power, and connect the modules to
33  * various pads or balls on the OMAP package.
34  *
35  * OMAP hwmod provides a consistent way to describe the on-chip
36  * hardware blocks and their integration into the rest of the chip.
37  * This description can be automatically generated from the TI
38  * hardware database.  OMAP hwmod provides a standard, consistent API
39  * to reset, enable, idle, and disable these hardware blocks.  And
40  * hwmod provides a way for other core code, such as the Linux device
41  * code or the OMAP power management and address space mapping code,
42  * to query the hardware database.
43  *
44  * Using hwmod
45  * -----------
46  * Drivers won't call hwmod functions directly.  That is done by the
47  * omap_device code, and in rare occasions, by custom integration code
48  * in arch/arm/ *omap*.  The omap_device code includes functions to
49  * build a struct platform_device using omap_hwmod data, and that is
50  * currently how hwmod data is communicated to drivers and to the
51  * Linux driver model.  Most drivers will call omap_hwmod functions only
52  * indirectly, via pm_runtime*() functions.
53  *
54  * From a layering perspective, here is where the OMAP hwmod code
55  * fits into the kernel software stack:
56  *
57  *            +-------------------------------+
58  *            |      Device driver code       |
59  *            |      (e.g., drivers/)         |
60  *            +-------------------------------+
61  *            |      Linux driver model       |
62  *            |     (platform_device /        |
63  *            |  platform_driver data/code)   |
64  *            +-------------------------------+
65  *            | OMAP core-driver integration  |
66  *            |(arch/arm/mach-omap2/devices.c)|
67  *            +-------------------------------+
68  *            |      omap_device code         |
69  *            | (../plat-omap/omap_device.c)  |
70  *            +-------------------------------+
71  *   ---->    |    omap_hwmod code/data       |    <-----
72  *            | (../mach-omap2/omap_hwmod*)   |
73  *            +-------------------------------+
74  *            | OMAP clock/PRCM/register fns  |
75  *            | (__raw_{read,write}l, clk*)   |
76  *            +-------------------------------+
77  *
78  * Device drivers should not contain any OMAP-specific code or data in
79  * them.  They should only contain code to operate the IP block that
80  * the driver is responsible for.  This is because these IP blocks can
81  * also appear in other SoCs, either from TI (such as DaVinci) or from
82  * other manufacturers; and drivers should be reusable across other
83  * platforms.
84  *
85  * The OMAP hwmod code also will attempt to reset and idle all on-chip
86  * devices upon boot.  The goal here is for the kernel to be
87  * completely self-reliant and independent from bootloaders.  This is
88  * to ensure a repeatable configuration, both to ensure consistent
89  * runtime behavior, and to make it easier for others to reproduce
90  * bugs.
91  *
92  * OMAP module activity states
93  * ---------------------------
94  * The hwmod code considers modules to be in one of several activity
95  * states.  IP blocks start out in an UNKNOWN state, then once they
96  * are registered via the hwmod code, proceed to the REGISTERED state.
97  * Once their clock names are resolved to clock pointers, the module
98  * enters the CLKS_INITED state; and finally, once the module has been
99  * reset and the integration registers programmed, the INITIALIZED state
100  * is entered.  The hwmod code will then place the module into either
101  * the IDLE state to save power, or in the case of a critical system
102  * module, the ENABLED state.
103  *
104  * OMAP core integration code can then call omap_hwmod*() functions
105  * directly to move the module between the IDLE, ENABLED, and DISABLED
106  * states, as needed.  This is done during both the PM idle loop, and
107  * in the OMAP core integration code's implementation of the PM runtime
108  * functions.
109  *
110  * References
111  * ----------
112  * This is a partial list.
113  * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
114  * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
115  * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
116  * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
117  * - Open Core Protocol Specification 2.2
118  *
119  * To do:
120  * - handle IO mapping
121  * - bus throughput & module latency measurement code
122  *
123  * XXX add tests at the beginning of each function to ensure the hwmod is
124  * in the appropriate state
125  * XXX error return values should be checked to ensure that they are
126  * appropriate
127  */
128 #undef DEBUG
129 
130 #include <linux/kernel.h>
131 #include <linux/errno.h>
132 #include <linux/io.h>
133 #include <linux/clk-provider.h>
134 #include <linux/delay.h>
135 #include <linux/err.h>
136 #include <linux/list.h>
137 #include <linux/mutex.h>
138 #include <linux/spinlock.h>
139 #include <linux/slab.h>
140 #include <linux/bootmem.h>
141 
142 #include "clock.h"
143 #include "omap_hwmod.h"
144 
145 #include "soc.h"
146 #include "common.h"
147 #include "clockdomain.h"
148 #include "powerdomain.h"
149 #include "cm2xxx.h"
150 #include "cm3xxx.h"
151 #include "cminst44xx.h"
152 #include "cm33xx.h"
153 #include "prm.h"
154 #include "prm3xxx.h"
155 #include "prm44xx.h"
156 #include "prm33xx.h"
157 #include "prminst44xx.h"
158 #include "mux.h"
159 #include "pm.h"
160 
161 /* Name of the OMAP hwmod for the MPU */
162 #define MPU_INITIATOR_NAME		"mpu"
163 
164 /*
165  * Number of struct omap_hwmod_link records per struct
166  * omap_hwmod_ocp_if record (master->slave and slave->master)
167  */
168 #define LINKS_PER_OCP_IF		2
169 
170 /**
171  * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
172  * @enable_module: function to enable a module (via MODULEMODE)
173  * @disable_module: function to disable a module (via MODULEMODE)
174  *
175  * XXX Eventually this functionality will be hidden inside the PRM/CM
176  * device drivers.  Until then, this should avoid huge blocks of cpu_is_*()
177  * conditionals in this code.
178  */
179 struct omap_hwmod_soc_ops {
180 	void (*enable_module)(struct omap_hwmod *oh);
181 	int (*disable_module)(struct omap_hwmod *oh);
182 	int (*wait_target_ready)(struct omap_hwmod *oh);
183 	int (*assert_hardreset)(struct omap_hwmod *oh,
184 				struct omap_hwmod_rst_info *ohri);
185 	int (*deassert_hardreset)(struct omap_hwmod *oh,
186 				  struct omap_hwmod_rst_info *ohri);
187 	int (*is_hardreset_asserted)(struct omap_hwmod *oh,
188 				     struct omap_hwmod_rst_info *ohri);
189 	int (*init_clkdm)(struct omap_hwmod *oh);
190 	void (*update_context_lost)(struct omap_hwmod *oh);
191 	int (*get_context_lost)(struct omap_hwmod *oh);
192 };
193 
194 /* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
195 static struct omap_hwmod_soc_ops soc_ops;
196 
197 /* omap_hwmod_list contains all registered struct omap_hwmods */
198 static LIST_HEAD(omap_hwmod_list);
199 
200 /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
201 static struct omap_hwmod *mpu_oh;
202 
203 /* io_chain_lock: used to serialize reconfigurations of the I/O chain */
204 static DEFINE_SPINLOCK(io_chain_lock);
205 
206 /*
207  * linkspace: ptr to a buffer that struct omap_hwmod_link records are
208  * allocated from - used to reduce the number of small memory
209  * allocations, which has a significant impact on performance
210  */
211 static struct omap_hwmod_link *linkspace;
212 
213 /*
214  * free_ls, max_ls: array indexes into linkspace; representing the
215  * next free struct omap_hwmod_link index, and the maximum number of
216  * struct omap_hwmod_link records allocated (respectively)
217  */
218 static unsigned short free_ls, max_ls, ls_supp;
219 
220 /* inited: set to true once the hwmod code is initialized */
221 static bool inited;
222 
223 /* Private functions */
224 
225 /**
226  * _fetch_next_ocp_if - return the next OCP interface in a list
227  * @p: ptr to a ptr to the list_head inside the ocp_if to return
228  * @i: pointer to the index of the element pointed to by @p in the list
229  *
230  * Return a pointer to the struct omap_hwmod_ocp_if record
231  * containing the struct list_head pointed to by @p, and increment
232  * @p such that a future call to this routine will return the next
233  * record.
234  */
235 static struct omap_hwmod_ocp_if *_fetch_next_ocp_if(struct list_head **p,
236 						    int *i)
237 {
238 	struct omap_hwmod_ocp_if *oi;
239 
240 	oi = list_entry(*p, struct omap_hwmod_link, node)->ocp_if;
241 	*p = (*p)->next;
242 
243 	*i = *i + 1;
244 
245 	return oi;
246 }
247 
248 /**
249  * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
250  * @oh: struct omap_hwmod *
251  *
252  * Load the current value of the hwmod OCP_SYSCONFIG register into the
253  * struct omap_hwmod for later use.  Returns -EINVAL if the hwmod has no
254  * OCP_SYSCONFIG register or 0 upon success.
255  */
256 static int _update_sysc_cache(struct omap_hwmod *oh)
257 {
258 	if (!oh->class->sysc) {
259 		WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
260 		return -EINVAL;
261 	}
262 
263 	/* XXX ensure module interface clock is up */
264 
265 	oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
266 
267 	if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
268 		oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
269 
270 	return 0;
271 }
272 
273 /**
274  * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
275  * @v: OCP_SYSCONFIG value to write
276  * @oh: struct omap_hwmod *
277  *
278  * Write @v into the module class' OCP_SYSCONFIG register, if it has
279  * one.  No return value.
280  */
281 static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
282 {
283 	if (!oh->class->sysc) {
284 		WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
285 		return;
286 	}
287 
288 	/* XXX ensure module interface clock is up */
289 
290 	/* Module might have lost context, always update cache and register */
291 	oh->_sysc_cache = v;
292 	omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
293 }
294 
295 /**
296  * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
297  * @oh: struct omap_hwmod *
298  * @standbymode: MIDLEMODE field bits
299  * @v: pointer to register contents to modify
300  *
301  * Update the master standby mode bits in @v to be @standbymode for
302  * the @oh hwmod.  Does not write to the hardware.  Returns -EINVAL
303  * upon error or 0 upon success.
304  */
305 static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
306 				   u32 *v)
307 {
308 	u32 mstandby_mask;
309 	u8 mstandby_shift;
310 
311 	if (!oh->class->sysc ||
312 	    !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
313 		return -EINVAL;
314 
315 	if (!oh->class->sysc->sysc_fields) {
316 		WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
317 		return -EINVAL;
318 	}
319 
320 	mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
321 	mstandby_mask = (0x3 << mstandby_shift);
322 
323 	*v &= ~mstandby_mask;
324 	*v |= __ffs(standbymode) << mstandby_shift;
325 
326 	return 0;
327 }
328 
329 /**
330  * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
331  * @oh: struct omap_hwmod *
332  * @idlemode: SIDLEMODE field bits
333  * @v: pointer to register contents to modify
334  *
335  * Update the slave idle mode bits in @v to be @idlemode for the @oh
336  * hwmod.  Does not write to the hardware.  Returns -EINVAL upon error
337  * or 0 upon success.
338  */
339 static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
340 {
341 	u32 sidle_mask;
342 	u8 sidle_shift;
343 
344 	if (!oh->class->sysc ||
345 	    !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
346 		return -EINVAL;
347 
348 	if (!oh->class->sysc->sysc_fields) {
349 		WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
350 		return -EINVAL;
351 	}
352 
353 	sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
354 	sidle_mask = (0x3 << sidle_shift);
355 
356 	*v &= ~sidle_mask;
357 	*v |= __ffs(idlemode) << sidle_shift;
358 
359 	return 0;
360 }
361 
362 /**
363  * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
364  * @oh: struct omap_hwmod *
365  * @clockact: CLOCKACTIVITY field bits
366  * @v: pointer to register contents to modify
367  *
368  * Update the clockactivity mode bits in @v to be @clockact for the
369  * @oh hwmod.  Used for additional powersaving on some modules.  Does
370  * not write to the hardware.  Returns -EINVAL upon error or 0 upon
371  * success.
372  */
373 static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
374 {
375 	u32 clkact_mask;
376 	u8  clkact_shift;
377 
378 	if (!oh->class->sysc ||
379 	    !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
380 		return -EINVAL;
381 
382 	if (!oh->class->sysc->sysc_fields) {
383 		WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
384 		return -EINVAL;
385 	}
386 
387 	clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
388 	clkact_mask = (0x3 << clkact_shift);
389 
390 	*v &= ~clkact_mask;
391 	*v |= clockact << clkact_shift;
392 
393 	return 0;
394 }
395 
396 /**
397  * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
398  * @oh: struct omap_hwmod *
399  * @v: pointer to register contents to modify
400  *
401  * Set the SOFTRESET bit in @v for hwmod @oh.  Returns -EINVAL upon
402  * error or 0 upon success.
403  */
404 static int _set_softreset(struct omap_hwmod *oh, u32 *v)
405 {
406 	u32 softrst_mask;
407 
408 	if (!oh->class->sysc ||
409 	    !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
410 		return -EINVAL;
411 
412 	if (!oh->class->sysc->sysc_fields) {
413 		WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
414 		return -EINVAL;
415 	}
416 
417 	softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
418 
419 	*v |= softrst_mask;
420 
421 	return 0;
422 }
423 
424 /**
425  * _wait_softreset_complete - wait for an OCP softreset to complete
426  * @oh: struct omap_hwmod * to wait on
427  *
428  * Wait until the IP block represented by @oh reports that its OCP
429  * softreset is complete.  This can be triggered by software (see
430  * _ocp_softreset()) or by hardware upon returning from off-mode (one
431  * example is HSMMC).  Waits for up to MAX_MODULE_SOFTRESET_WAIT
432  * microseconds.  Returns the number of microseconds waited.
433  */
434 static int _wait_softreset_complete(struct omap_hwmod *oh)
435 {
436 	struct omap_hwmod_class_sysconfig *sysc;
437 	u32 softrst_mask;
438 	int c = 0;
439 
440 	sysc = oh->class->sysc;
441 
442 	if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
443 		omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs)
444 				   & SYSS_RESETDONE_MASK),
445 				  MAX_MODULE_SOFTRESET_WAIT, c);
446 	else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
447 		softrst_mask = (0x1 << sysc->sysc_fields->srst_shift);
448 		omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs)
449 				    & softrst_mask),
450 				  MAX_MODULE_SOFTRESET_WAIT, c);
451 	}
452 
453 	return c;
454 }
455 
456 /**
457  * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
458  * @oh: struct omap_hwmod *
459  *
460  * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
461  * of some modules. When the DMA must perform read/write accesses, the
462  * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
463  * for power management, software must set the DMADISABLE bit back to 1.
464  *
465  * Set the DMADISABLE bit in @v for hwmod @oh.  Returns -EINVAL upon
466  * error or 0 upon success.
467  */
468 static int _set_dmadisable(struct omap_hwmod *oh)
469 {
470 	u32 v;
471 	u32 dmadisable_mask;
472 
473 	if (!oh->class->sysc ||
474 	    !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE))
475 		return -EINVAL;
476 
477 	if (!oh->class->sysc->sysc_fields) {
478 		WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
479 		return -EINVAL;
480 	}
481 
482 	/* clocks must be on for this operation */
483 	if (oh->_state != _HWMOD_STATE_ENABLED) {
484 		pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name);
485 		return -EINVAL;
486 	}
487 
488 	pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name);
489 
490 	v = oh->_sysc_cache;
491 	dmadisable_mask =
492 		(0x1 << oh->class->sysc->sysc_fields->dmadisable_shift);
493 	v |= dmadisable_mask;
494 	_write_sysconfig(v, oh);
495 
496 	return 0;
497 }
498 
499 /**
500  * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
501  * @oh: struct omap_hwmod *
502  * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
503  * @v: pointer to register contents to modify
504  *
505  * Update the module autoidle bit in @v to be @autoidle for the @oh
506  * hwmod.  The autoidle bit controls whether the module can gate
507  * internal clocks automatically when it isn't doing anything; the
508  * exact function of this bit varies on a per-module basis.  This
509  * function does not write to the hardware.  Returns -EINVAL upon
510  * error or 0 upon success.
511  */
512 static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
513 				u32 *v)
514 {
515 	u32 autoidle_mask;
516 	u8 autoidle_shift;
517 
518 	if (!oh->class->sysc ||
519 	    !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
520 		return -EINVAL;
521 
522 	if (!oh->class->sysc->sysc_fields) {
523 		WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
524 		return -EINVAL;
525 	}
526 
527 	autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
528 	autoidle_mask = (0x1 << autoidle_shift);
529 
530 	*v &= ~autoidle_mask;
531 	*v |= autoidle << autoidle_shift;
532 
533 	return 0;
534 }
535 
536 /**
537  * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
538  * @oh: struct omap_hwmod *
539  * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
540  *
541  * Set or clear the I/O pad wakeup flag in the mux entries for the
542  * hwmod @oh.  This function changes the @oh->mux->pads_dynamic array
543  * in memory.  If the hwmod is currently idled, and the new idle
544  * values don't match the previous ones, this function will also
545  * update the SCM PADCTRL registers.  Otherwise, if the hwmod is not
546  * currently idled, this function won't touch the hardware: the new
547  * mux settings are written to the SCM PADCTRL registers when the
548  * hwmod is idled.  No return value.
549  */
550 static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
551 {
552 	struct omap_device_pad *pad;
553 	bool change = false;
554 	u16 prev_idle;
555 	int j;
556 
557 	if (!oh->mux || !oh->mux->enabled)
558 		return;
559 
560 	for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
561 		pad = oh->mux->pads_dynamic[j];
562 
563 		if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
564 			continue;
565 
566 		prev_idle = pad->idle;
567 
568 		if (set_wake)
569 			pad->idle |= OMAP_WAKEUP_EN;
570 		else
571 			pad->idle &= ~OMAP_WAKEUP_EN;
572 
573 		if (prev_idle != pad->idle)
574 			change = true;
575 	}
576 
577 	if (change && oh->_state == _HWMOD_STATE_IDLE)
578 		omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
579 }
580 
581 /**
582  * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
583  * @oh: struct omap_hwmod *
584  *
585  * Allow the hardware module @oh to send wakeups.  Returns -EINVAL
586  * upon error or 0 upon success.
587  */
588 static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
589 {
590 	if (!oh->class->sysc ||
591 	    !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
592 	      (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
593 	      (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
594 		return -EINVAL;
595 
596 	if (!oh->class->sysc->sysc_fields) {
597 		WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
598 		return -EINVAL;
599 	}
600 
601 	if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
602 		*v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
603 
604 	if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
605 		_set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
606 	if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
607 		_set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
608 
609 	/* XXX test pwrdm_get_wken for this hwmod's subsystem */
610 
611 	oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
612 
613 	return 0;
614 }
615 
616 /**
617  * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
618  * @oh: struct omap_hwmod *
619  *
620  * Prevent the hardware module @oh to send wakeups.  Returns -EINVAL
621  * upon error or 0 upon success.
622  */
623 static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
624 {
625 	if (!oh->class->sysc ||
626 	    !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
627 	      (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
628 	      (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
629 		return -EINVAL;
630 
631 	if (!oh->class->sysc->sysc_fields) {
632 		WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
633 		return -EINVAL;
634 	}
635 
636 	if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
637 		*v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
638 
639 	if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
640 		_set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
641 	if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
642 		_set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
643 
644 	/* XXX test pwrdm_get_wken for this hwmod's subsystem */
645 
646 	oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
647 
648 	return 0;
649 }
650 
651 static struct clockdomain *_get_clkdm(struct omap_hwmod *oh)
652 {
653 	struct clk_hw_omap *clk;
654 
655 	if (oh->clkdm) {
656 		return oh->clkdm;
657 	} else if (oh->_clk) {
658 		clk = to_clk_hw_omap(__clk_get_hw(oh->_clk));
659 		return  clk->clkdm;
660 	}
661 	return NULL;
662 }
663 
664 /**
665  * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
666  * @oh: struct omap_hwmod *
667  *
668  * Prevent the hardware module @oh from entering idle while the
669  * hardare module initiator @init_oh is active.  Useful when a module
670  * will be accessed by a particular initiator (e.g., if a module will
671  * be accessed by the IVA, there should be a sleepdep between the IVA
672  * initiator and the module).  Only applies to modules in smart-idle
673  * mode.  If the clockdomain is marked as not needing autodeps, return
674  * 0 without doing anything.  Otherwise, returns -EINVAL upon error or
675  * passes along clkdm_add_sleepdep() value upon success.
676  */
677 static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
678 {
679 	struct clockdomain *clkdm, *init_clkdm;
680 
681 	clkdm = _get_clkdm(oh);
682 	init_clkdm = _get_clkdm(init_oh);
683 
684 	if (!clkdm || !init_clkdm)
685 		return -EINVAL;
686 
687 	if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
688 		return 0;
689 
690 	return clkdm_add_sleepdep(clkdm, init_clkdm);
691 }
692 
693 /**
694  * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
695  * @oh: struct omap_hwmod *
696  *
697  * Allow the hardware module @oh to enter idle while the hardare
698  * module initiator @init_oh is active.  Useful when a module will not
699  * be accessed by a particular initiator (e.g., if a module will not
700  * be accessed by the IVA, there should be no sleepdep between the IVA
701  * initiator and the module).  Only applies to modules in smart-idle
702  * mode.  If the clockdomain is marked as not needing autodeps, return
703  * 0 without doing anything.  Returns -EINVAL upon error or passes
704  * along clkdm_del_sleepdep() value upon success.
705  */
706 static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
707 {
708 	struct clockdomain *clkdm, *init_clkdm;
709 
710 	clkdm = _get_clkdm(oh);
711 	init_clkdm = _get_clkdm(init_oh);
712 
713 	if (!clkdm || !init_clkdm)
714 		return -EINVAL;
715 
716 	if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
717 		return 0;
718 
719 	return clkdm_del_sleepdep(clkdm, init_clkdm);
720 }
721 
722 /**
723  * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
724  * @oh: struct omap_hwmod *
725  *
726  * Called from _init_clocks().  Populates the @oh _clk (main
727  * functional clock pointer) if a main_clk is present.  Returns 0 on
728  * success or -EINVAL on error.
729  */
730 static int _init_main_clk(struct omap_hwmod *oh)
731 {
732 	int ret = 0;
733 
734 	if (!oh->main_clk)
735 		return 0;
736 
737 	oh->_clk = clk_get(NULL, oh->main_clk);
738 	if (IS_ERR(oh->_clk)) {
739 		pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
740 			   oh->name, oh->main_clk);
741 		return -EINVAL;
742 	}
743 	/*
744 	 * HACK: This needs a re-visit once clk_prepare() is implemented
745 	 * to do something meaningful. Today its just a no-op.
746 	 * If clk_prepare() is used at some point to do things like
747 	 * voltage scaling etc, then this would have to be moved to
748 	 * some point where subsystems like i2c and pmic become
749 	 * available.
750 	 */
751 	clk_prepare(oh->_clk);
752 
753 	if (!_get_clkdm(oh))
754 		pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n",
755 			   oh->name, oh->main_clk);
756 
757 	return ret;
758 }
759 
760 /**
761  * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
762  * @oh: struct omap_hwmod *
763  *
764  * Called from _init_clocks().  Populates the @oh OCP slave interface
765  * clock pointers.  Returns 0 on success or -EINVAL on error.
766  */
767 static int _init_interface_clks(struct omap_hwmod *oh)
768 {
769 	struct omap_hwmod_ocp_if *os;
770 	struct list_head *p;
771 	struct clk *c;
772 	int i = 0;
773 	int ret = 0;
774 
775 	p = oh->slave_ports.next;
776 
777 	while (i < oh->slaves_cnt) {
778 		os = _fetch_next_ocp_if(&p, &i);
779 		if (!os->clk)
780 			continue;
781 
782 		c = clk_get(NULL, os->clk);
783 		if (IS_ERR(c)) {
784 			pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
785 				   oh->name, os->clk);
786 			ret = -EINVAL;
787 		}
788 		os->_clk = c;
789 		/*
790 		 * HACK: This needs a re-visit once clk_prepare() is implemented
791 		 * to do something meaningful. Today its just a no-op.
792 		 * If clk_prepare() is used at some point to do things like
793 		 * voltage scaling etc, then this would have to be moved to
794 		 * some point where subsystems like i2c and pmic become
795 		 * available.
796 		 */
797 		clk_prepare(os->_clk);
798 	}
799 
800 	return ret;
801 }
802 
803 /**
804  * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
805  * @oh: struct omap_hwmod *
806  *
807  * Called from _init_clocks().  Populates the @oh omap_hwmod_opt_clk
808  * clock pointers.  Returns 0 on success or -EINVAL on error.
809  */
810 static int _init_opt_clks(struct omap_hwmod *oh)
811 {
812 	struct omap_hwmod_opt_clk *oc;
813 	struct clk *c;
814 	int i;
815 	int ret = 0;
816 
817 	for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
818 		c = clk_get(NULL, oc->clk);
819 		if (IS_ERR(c)) {
820 			pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
821 				   oh->name, oc->clk);
822 			ret = -EINVAL;
823 		}
824 		oc->_clk = c;
825 		/*
826 		 * HACK: This needs a re-visit once clk_prepare() is implemented
827 		 * to do something meaningful. Today its just a no-op.
828 		 * If clk_prepare() is used at some point to do things like
829 		 * voltage scaling etc, then this would have to be moved to
830 		 * some point where subsystems like i2c and pmic become
831 		 * available.
832 		 */
833 		clk_prepare(oc->_clk);
834 	}
835 
836 	return ret;
837 }
838 
839 /**
840  * _enable_clocks - enable hwmod main clock and interface clocks
841  * @oh: struct omap_hwmod *
842  *
843  * Enables all clocks necessary for register reads and writes to succeed
844  * on the hwmod @oh.  Returns 0.
845  */
846 static int _enable_clocks(struct omap_hwmod *oh)
847 {
848 	struct omap_hwmod_ocp_if *os;
849 	struct list_head *p;
850 	int i = 0;
851 
852 	pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
853 
854 	if (oh->_clk)
855 		clk_enable(oh->_clk);
856 
857 	p = oh->slave_ports.next;
858 
859 	while (i < oh->slaves_cnt) {
860 		os = _fetch_next_ocp_if(&p, &i);
861 
862 		if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
863 			clk_enable(os->_clk);
864 	}
865 
866 	/* The opt clocks are controlled by the device driver. */
867 
868 	return 0;
869 }
870 
871 /**
872  * _disable_clocks - disable hwmod main clock and interface clocks
873  * @oh: struct omap_hwmod *
874  *
875  * Disables the hwmod @oh main functional and interface clocks.  Returns 0.
876  */
877 static int _disable_clocks(struct omap_hwmod *oh)
878 {
879 	struct omap_hwmod_ocp_if *os;
880 	struct list_head *p;
881 	int i = 0;
882 
883 	pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
884 
885 	if (oh->_clk)
886 		clk_disable(oh->_clk);
887 
888 	p = oh->slave_ports.next;
889 
890 	while (i < oh->slaves_cnt) {
891 		os = _fetch_next_ocp_if(&p, &i);
892 
893 		if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
894 			clk_disable(os->_clk);
895 	}
896 
897 	/* The opt clocks are controlled by the device driver. */
898 
899 	return 0;
900 }
901 
902 static void _enable_optional_clocks(struct omap_hwmod *oh)
903 {
904 	struct omap_hwmod_opt_clk *oc;
905 	int i;
906 
907 	pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
908 
909 	for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
910 		if (oc->_clk) {
911 			pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
912 				 __clk_get_name(oc->_clk));
913 			clk_enable(oc->_clk);
914 		}
915 }
916 
917 static void _disable_optional_clocks(struct omap_hwmod *oh)
918 {
919 	struct omap_hwmod_opt_clk *oc;
920 	int i;
921 
922 	pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
923 
924 	for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
925 		if (oc->_clk) {
926 			pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
927 				 __clk_get_name(oc->_clk));
928 			clk_disable(oc->_clk);
929 		}
930 }
931 
932 /**
933  * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
934  * @oh: struct omap_hwmod *
935  *
936  * Enables the PRCM module mode related to the hwmod @oh.
937  * No return value.
938  */
939 static void _omap4_enable_module(struct omap_hwmod *oh)
940 {
941 	if (!oh->clkdm || !oh->prcm.omap4.modulemode)
942 		return;
943 
944 	pr_debug("omap_hwmod: %s: %s: %d\n",
945 		 oh->name, __func__, oh->prcm.omap4.modulemode);
946 
947 	omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
948 				   oh->clkdm->prcm_partition,
949 				   oh->clkdm->cm_inst,
950 				   oh->clkdm->clkdm_offs,
951 				   oh->prcm.omap4.clkctrl_offs);
952 }
953 
954 /**
955  * _am33xx_enable_module - enable CLKCTRL modulemode on AM33XX
956  * @oh: struct omap_hwmod *
957  *
958  * Enables the PRCM module mode related to the hwmod @oh.
959  * No return value.
960  */
961 static void _am33xx_enable_module(struct omap_hwmod *oh)
962 {
963 	if (!oh->clkdm || !oh->prcm.omap4.modulemode)
964 		return;
965 
966 	pr_debug("omap_hwmod: %s: %s: %d\n",
967 		 oh->name, __func__, oh->prcm.omap4.modulemode);
968 
969 	am33xx_cm_module_enable(oh->prcm.omap4.modulemode, oh->clkdm->cm_inst,
970 				oh->clkdm->clkdm_offs,
971 				oh->prcm.omap4.clkctrl_offs);
972 }
973 
974 /**
975  * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
976  * @oh: struct omap_hwmod *
977  *
978  * Wait for a module @oh to enter slave idle.  Returns 0 if the module
979  * does not have an IDLEST bit or if the module successfully enters
980  * slave idle; otherwise, pass along the return value of the
981  * appropriate *_cm*_wait_module_idle() function.
982  */
983 static int _omap4_wait_target_disable(struct omap_hwmod *oh)
984 {
985 	if (!oh)
986 		return -EINVAL;
987 
988 	if (oh->_int_flags & _HWMOD_NO_MPU_PORT || !oh->clkdm)
989 		return 0;
990 
991 	if (oh->flags & HWMOD_NO_IDLEST)
992 		return 0;
993 
994 	return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
995 					     oh->clkdm->cm_inst,
996 					     oh->clkdm->clkdm_offs,
997 					     oh->prcm.omap4.clkctrl_offs);
998 }
999 
1000 /**
1001  * _am33xx_wait_target_disable - wait for a module to be disabled on AM33XX
1002  * @oh: struct omap_hwmod *
1003  *
1004  * Wait for a module @oh to enter slave idle.  Returns 0 if the module
1005  * does not have an IDLEST bit or if the module successfully enters
1006  * slave idle; otherwise, pass along the return value of the
1007  * appropriate *_cm*_wait_module_idle() function.
1008  */
1009 static int _am33xx_wait_target_disable(struct omap_hwmod *oh)
1010 {
1011 	if (!oh)
1012 		return -EINVAL;
1013 
1014 	if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
1015 		return 0;
1016 
1017 	if (oh->flags & HWMOD_NO_IDLEST)
1018 		return 0;
1019 
1020 	return am33xx_cm_wait_module_idle(oh->clkdm->cm_inst,
1021 					     oh->clkdm->clkdm_offs,
1022 					     oh->prcm.omap4.clkctrl_offs);
1023 }
1024 
1025 /**
1026  * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
1027  * @oh: struct omap_hwmod *oh
1028  *
1029  * Count and return the number of MPU IRQs associated with the hwmod
1030  * @oh.  Used to allocate struct resource data.  Returns 0 if @oh is
1031  * NULL.
1032  */
1033 static int _count_mpu_irqs(struct omap_hwmod *oh)
1034 {
1035 	struct omap_hwmod_irq_info *ohii;
1036 	int i = 0;
1037 
1038 	if (!oh || !oh->mpu_irqs)
1039 		return 0;
1040 
1041 	do {
1042 		ohii = &oh->mpu_irqs[i++];
1043 	} while (ohii->irq != -1);
1044 
1045 	return i-1;
1046 }
1047 
1048 /**
1049  * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
1050  * @oh: struct omap_hwmod *oh
1051  *
1052  * Count and return the number of SDMA request lines associated with
1053  * the hwmod @oh.  Used to allocate struct resource data.  Returns 0
1054  * if @oh is NULL.
1055  */
1056 static int _count_sdma_reqs(struct omap_hwmod *oh)
1057 {
1058 	struct omap_hwmod_dma_info *ohdi;
1059 	int i = 0;
1060 
1061 	if (!oh || !oh->sdma_reqs)
1062 		return 0;
1063 
1064 	do {
1065 		ohdi = &oh->sdma_reqs[i++];
1066 	} while (ohdi->dma_req != -1);
1067 
1068 	return i-1;
1069 }
1070 
1071 /**
1072  * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
1073  * @oh: struct omap_hwmod *oh
1074  *
1075  * Count and return the number of address space ranges associated with
1076  * the hwmod @oh.  Used to allocate struct resource data.  Returns 0
1077  * if @oh is NULL.
1078  */
1079 static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
1080 {
1081 	struct omap_hwmod_addr_space *mem;
1082 	int i = 0;
1083 
1084 	if (!os || !os->addr)
1085 		return 0;
1086 
1087 	do {
1088 		mem = &os->addr[i++];
1089 	} while (mem->pa_start != mem->pa_end);
1090 
1091 	return i-1;
1092 }
1093 
1094 /**
1095  * _get_mpu_irq_by_name - fetch MPU interrupt line number by name
1096  * @oh: struct omap_hwmod * to operate on
1097  * @name: pointer to the name of the MPU interrupt number to fetch (optional)
1098  * @irq: pointer to an unsigned int to store the MPU IRQ number to
1099  *
1100  * Retrieve a MPU hardware IRQ line number named by @name associated
1101  * with the IP block pointed to by @oh.  The IRQ number will be filled
1102  * into the address pointed to by @dma.  When @name is non-null, the
1103  * IRQ line number associated with the named entry will be returned.
1104  * If @name is null, the first matching entry will be returned.  Data
1105  * order is not meaningful in hwmod data, so callers are strongly
1106  * encouraged to use a non-null @name whenever possible to avoid
1107  * unpredictable effects if hwmod data is later added that causes data
1108  * ordering to change.  Returns 0 upon success or a negative error
1109  * code upon error.
1110  */
1111 static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name,
1112 				unsigned int *irq)
1113 {
1114 	int i;
1115 	bool found = false;
1116 
1117 	if (!oh->mpu_irqs)
1118 		return -ENOENT;
1119 
1120 	i = 0;
1121 	while (oh->mpu_irqs[i].irq != -1) {
1122 		if (name == oh->mpu_irqs[i].name ||
1123 		    !strcmp(name, oh->mpu_irqs[i].name)) {
1124 			found = true;
1125 			break;
1126 		}
1127 		i++;
1128 	}
1129 
1130 	if (!found)
1131 		return -ENOENT;
1132 
1133 	*irq = oh->mpu_irqs[i].irq;
1134 
1135 	return 0;
1136 }
1137 
1138 /**
1139  * _get_sdma_req_by_name - fetch SDMA request line ID by name
1140  * @oh: struct omap_hwmod * to operate on
1141  * @name: pointer to the name of the SDMA request line to fetch (optional)
1142  * @dma: pointer to an unsigned int to store the request line ID to
1143  *
1144  * Retrieve an SDMA request line ID named by @name on the IP block
1145  * pointed to by @oh.  The ID will be filled into the address pointed
1146  * to by @dma.  When @name is non-null, the request line ID associated
1147  * with the named entry will be returned.  If @name is null, the first
1148  * matching entry will be returned.  Data order is not meaningful in
1149  * hwmod data, so callers are strongly encouraged to use a non-null
1150  * @name whenever possible to avoid unpredictable effects if hwmod
1151  * data is later added that causes data ordering to change.  Returns 0
1152  * upon success or a negative error code upon error.
1153  */
1154 static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name,
1155 				 unsigned int *dma)
1156 {
1157 	int i;
1158 	bool found = false;
1159 
1160 	if (!oh->sdma_reqs)
1161 		return -ENOENT;
1162 
1163 	i = 0;
1164 	while (oh->sdma_reqs[i].dma_req != -1) {
1165 		if (name == oh->sdma_reqs[i].name ||
1166 		    !strcmp(name, oh->sdma_reqs[i].name)) {
1167 			found = true;
1168 			break;
1169 		}
1170 		i++;
1171 	}
1172 
1173 	if (!found)
1174 		return -ENOENT;
1175 
1176 	*dma = oh->sdma_reqs[i].dma_req;
1177 
1178 	return 0;
1179 }
1180 
1181 /**
1182  * _get_addr_space_by_name - fetch address space start & end by name
1183  * @oh: struct omap_hwmod * to operate on
1184  * @name: pointer to the name of the address space to fetch (optional)
1185  * @pa_start: pointer to a u32 to store the starting address to
1186  * @pa_end: pointer to a u32 to store the ending address to
1187  *
1188  * Retrieve address space start and end addresses for the IP block
1189  * pointed to by @oh.  The data will be filled into the addresses
1190  * pointed to by @pa_start and @pa_end.  When @name is non-null, the
1191  * address space data associated with the named entry will be
1192  * returned.  If @name is null, the first matching entry will be
1193  * returned.  Data order is not meaningful in hwmod data, so callers
1194  * are strongly encouraged to use a non-null @name whenever possible
1195  * to avoid unpredictable effects if hwmod data is later added that
1196  * causes data ordering to change.  Returns 0 upon success or a
1197  * negative error code upon error.
1198  */
1199 static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,
1200 				   u32 *pa_start, u32 *pa_end)
1201 {
1202 	int i, j;
1203 	struct omap_hwmod_ocp_if *os;
1204 	struct list_head *p = NULL;
1205 	bool found = false;
1206 
1207 	p = oh->slave_ports.next;
1208 
1209 	i = 0;
1210 	while (i < oh->slaves_cnt) {
1211 		os = _fetch_next_ocp_if(&p, &i);
1212 
1213 		if (!os->addr)
1214 			return -ENOENT;
1215 
1216 		j = 0;
1217 		while (os->addr[j].pa_start != os->addr[j].pa_end) {
1218 			if (name == os->addr[j].name ||
1219 			    !strcmp(name, os->addr[j].name)) {
1220 				found = true;
1221 				break;
1222 			}
1223 			j++;
1224 		}
1225 
1226 		if (found)
1227 			break;
1228 	}
1229 
1230 	if (!found)
1231 		return -ENOENT;
1232 
1233 	*pa_start = os->addr[j].pa_start;
1234 	*pa_end = os->addr[j].pa_end;
1235 
1236 	return 0;
1237 }
1238 
1239 /**
1240  * _save_mpu_port_index - find and save the index to @oh's MPU port
1241  * @oh: struct omap_hwmod *
1242  *
1243  * Determines the array index of the OCP slave port that the MPU uses
1244  * to address the device, and saves it into the struct omap_hwmod.
1245  * Intended to be called during hwmod registration only. No return
1246  * value.
1247  */
1248 static void __init _save_mpu_port_index(struct omap_hwmod *oh)
1249 {
1250 	struct omap_hwmod_ocp_if *os = NULL;
1251 	struct list_head *p;
1252 	int i = 0;
1253 
1254 	if (!oh)
1255 		return;
1256 
1257 	oh->_int_flags |= _HWMOD_NO_MPU_PORT;
1258 
1259 	p = oh->slave_ports.next;
1260 
1261 	while (i < oh->slaves_cnt) {
1262 		os = _fetch_next_ocp_if(&p, &i);
1263 		if (os->user & OCP_USER_MPU) {
1264 			oh->_mpu_port = os;
1265 			oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
1266 			break;
1267 		}
1268 	}
1269 
1270 	return;
1271 }
1272 
1273 /**
1274  * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
1275  * @oh: struct omap_hwmod *
1276  *
1277  * Given a pointer to a struct omap_hwmod record @oh, return a pointer
1278  * to the struct omap_hwmod_ocp_if record that is used by the MPU to
1279  * communicate with the IP block.  This interface need not be directly
1280  * connected to the MPU (and almost certainly is not), but is directly
1281  * connected to the IP block represented by @oh.  Returns a pointer
1282  * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
1283  * error or if there does not appear to be a path from the MPU to this
1284  * IP block.
1285  */
1286 static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
1287 {
1288 	if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
1289 		return NULL;
1290 
1291 	return oh->_mpu_port;
1292 };
1293 
1294 /**
1295  * _find_mpu_rt_addr_space - return MPU register target address space for @oh
1296  * @oh: struct omap_hwmod *
1297  *
1298  * Returns a pointer to the struct omap_hwmod_addr_space record representing
1299  * the register target MPU address space; or returns NULL upon error.
1300  */
1301 static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh)
1302 {
1303 	struct omap_hwmod_ocp_if *os;
1304 	struct omap_hwmod_addr_space *mem;
1305 	int found = 0, i = 0;
1306 
1307 	os = _find_mpu_rt_port(oh);
1308 	if (!os || !os->addr)
1309 		return NULL;
1310 
1311 	do {
1312 		mem = &os->addr[i++];
1313 		if (mem->flags & ADDR_TYPE_RT)
1314 			found = 1;
1315 	} while (!found && mem->pa_start != mem->pa_end);
1316 
1317 	return (found) ? mem : NULL;
1318 }
1319 
1320 /**
1321  * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
1322  * @oh: struct omap_hwmod *
1323  *
1324  * Ensure that the OCP_SYSCONFIG register for the IP block represented
1325  * by @oh is set to indicate to the PRCM that the IP block is active.
1326  * Usually this means placing the module into smart-idle mode and
1327  * smart-standby, but if there is a bug in the automatic idle handling
1328  * for the IP block, it may need to be placed into the force-idle or
1329  * no-idle variants of these modes.  No return value.
1330  */
1331 static void _enable_sysc(struct omap_hwmod *oh)
1332 {
1333 	u8 idlemode, sf;
1334 	u32 v;
1335 	bool clkdm_act;
1336 	struct clockdomain *clkdm;
1337 
1338 	if (!oh->class->sysc)
1339 		return;
1340 
1341 	/*
1342 	 * Wait until reset has completed, this is needed as the IP
1343 	 * block is reset automatically by hardware in some cases
1344 	 * (off-mode for example), and the drivers require the
1345 	 * IP to be ready when they access it
1346 	 */
1347 	if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1348 		_enable_optional_clocks(oh);
1349 	_wait_softreset_complete(oh);
1350 	if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1351 		_disable_optional_clocks(oh);
1352 
1353 	v = oh->_sysc_cache;
1354 	sf = oh->class->sysc->sysc_flags;
1355 
1356 	clkdm = _get_clkdm(oh);
1357 	if (sf & SYSC_HAS_SIDLEMODE) {
1358 		clkdm_act = (clkdm && clkdm->flags & CLKDM_ACTIVE_WITH_MPU);
1359 		if (clkdm_act && !(oh->class->sysc->idlemodes &
1360 				   (SIDLE_SMART | SIDLE_SMART_WKUP)))
1361 			idlemode = HWMOD_IDLEMODE_FORCE;
1362 		else
1363 			idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
1364 				HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
1365 		_set_slave_idlemode(oh, idlemode, &v);
1366 	}
1367 
1368 	if (sf & SYSC_HAS_MIDLEMODE) {
1369 		if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1370 			idlemode = HWMOD_IDLEMODE_NO;
1371 		} else {
1372 			if (sf & SYSC_HAS_ENAWAKEUP)
1373 				_enable_wakeup(oh, &v);
1374 			if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1375 				idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1376 			else
1377 				idlemode = HWMOD_IDLEMODE_SMART;
1378 		}
1379 		_set_master_standbymode(oh, idlemode, &v);
1380 	}
1381 
1382 	/*
1383 	 * XXX The clock framework should handle this, by
1384 	 * calling into this code.  But this must wait until the
1385 	 * clock structures are tagged with omap_hwmod entries
1386 	 */
1387 	if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
1388 	    (sf & SYSC_HAS_CLOCKACTIVITY))
1389 		_set_clockactivity(oh, oh->class->sysc->clockact, &v);
1390 
1391 	/* If slave is in SMARTIDLE, also enable wakeup */
1392 	if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
1393 		_enable_wakeup(oh, &v);
1394 
1395 	_write_sysconfig(v, oh);
1396 
1397 	/*
1398 	 * Set the autoidle bit only after setting the smartidle bit
1399 	 * Setting this will not have any impact on the other modules.
1400 	 */
1401 	if (sf & SYSC_HAS_AUTOIDLE) {
1402 		idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
1403 			0 : 1;
1404 		_set_module_autoidle(oh, idlemode, &v);
1405 		_write_sysconfig(v, oh);
1406 	}
1407 }
1408 
1409 /**
1410  * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
1411  * @oh: struct omap_hwmod *
1412  *
1413  * If module is marked as SWSUP_SIDLE, force the module into slave
1414  * idle; otherwise, configure it for smart-idle.  If module is marked
1415  * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
1416  * configure it for smart-standby.  No return value.
1417  */
1418 static void _idle_sysc(struct omap_hwmod *oh)
1419 {
1420 	u8 idlemode, sf;
1421 	u32 v;
1422 
1423 	if (!oh->class->sysc)
1424 		return;
1425 
1426 	v = oh->_sysc_cache;
1427 	sf = oh->class->sysc->sysc_flags;
1428 
1429 	if (sf & SYSC_HAS_SIDLEMODE) {
1430 		/* XXX What about HWMOD_IDLEMODE_SMART_WKUP? */
1431 		if (oh->flags & HWMOD_SWSUP_SIDLE ||
1432 		    !(oh->class->sysc->idlemodes &
1433 		      (SIDLE_SMART | SIDLE_SMART_WKUP)))
1434 			idlemode = HWMOD_IDLEMODE_FORCE;
1435 		else
1436 			idlemode = HWMOD_IDLEMODE_SMART;
1437 		_set_slave_idlemode(oh, idlemode, &v);
1438 	}
1439 
1440 	if (sf & SYSC_HAS_MIDLEMODE) {
1441 		if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
1442 			idlemode = HWMOD_IDLEMODE_FORCE;
1443 		} else {
1444 			if (sf & SYSC_HAS_ENAWAKEUP)
1445 				_enable_wakeup(oh, &v);
1446 			if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
1447 				idlemode = HWMOD_IDLEMODE_SMART_WKUP;
1448 			else
1449 				idlemode = HWMOD_IDLEMODE_SMART;
1450 		}
1451 		_set_master_standbymode(oh, idlemode, &v);
1452 	}
1453 
1454 	/* If slave is in SMARTIDLE, also enable wakeup */
1455 	if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
1456 		_enable_wakeup(oh, &v);
1457 
1458 	_write_sysconfig(v, oh);
1459 }
1460 
1461 /**
1462  * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
1463  * @oh: struct omap_hwmod *
1464  *
1465  * Force the module into slave idle and master suspend. No return
1466  * value.
1467  */
1468 static void _shutdown_sysc(struct omap_hwmod *oh)
1469 {
1470 	u32 v;
1471 	u8 sf;
1472 
1473 	if (!oh->class->sysc)
1474 		return;
1475 
1476 	v = oh->_sysc_cache;
1477 	sf = oh->class->sysc->sysc_flags;
1478 
1479 	if (sf & SYSC_HAS_SIDLEMODE)
1480 		_set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
1481 
1482 	if (sf & SYSC_HAS_MIDLEMODE)
1483 		_set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
1484 
1485 	if (sf & SYSC_HAS_AUTOIDLE)
1486 		_set_module_autoidle(oh, 1, &v);
1487 
1488 	_write_sysconfig(v, oh);
1489 }
1490 
1491 /**
1492  * _lookup - find an omap_hwmod by name
1493  * @name: find an omap_hwmod by name
1494  *
1495  * Return a pointer to an omap_hwmod by name, or NULL if not found.
1496  */
1497 static struct omap_hwmod *_lookup(const char *name)
1498 {
1499 	struct omap_hwmod *oh, *temp_oh;
1500 
1501 	oh = NULL;
1502 
1503 	list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
1504 		if (!strcmp(name, temp_oh->name)) {
1505 			oh = temp_oh;
1506 			break;
1507 		}
1508 	}
1509 
1510 	return oh;
1511 }
1512 
1513 /**
1514  * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
1515  * @oh: struct omap_hwmod *
1516  *
1517  * Convert a clockdomain name stored in a struct omap_hwmod into a
1518  * clockdomain pointer, and save it into the struct omap_hwmod.
1519  * Return -EINVAL if the clkdm_name lookup failed.
1520  */
1521 static int _init_clkdm(struct omap_hwmod *oh)
1522 {
1523 	if (!oh->clkdm_name) {
1524 		pr_debug("omap_hwmod: %s: missing clockdomain\n", oh->name);
1525 		return 0;
1526 	}
1527 
1528 	oh->clkdm = clkdm_lookup(oh->clkdm_name);
1529 	if (!oh->clkdm) {
1530 		pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
1531 			oh->name, oh->clkdm_name);
1532 		return -EINVAL;
1533 	}
1534 
1535 	pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
1536 		oh->name, oh->clkdm_name);
1537 
1538 	return 0;
1539 }
1540 
1541 /**
1542  * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
1543  * well the clockdomain.
1544  * @oh: struct omap_hwmod *
1545  * @data: not used; pass NULL
1546  *
1547  * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
1548  * Resolves all clock names embedded in the hwmod.  Returns 0 on
1549  * success, or a negative error code on failure.
1550  */
1551 static int _init_clocks(struct omap_hwmod *oh, void *data)
1552 {
1553 	int ret = 0;
1554 
1555 	if (oh->_state != _HWMOD_STATE_REGISTERED)
1556 		return 0;
1557 
1558 	pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
1559 
1560 	if (soc_ops.init_clkdm)
1561 		ret |= soc_ops.init_clkdm(oh);
1562 
1563 	ret |= _init_main_clk(oh);
1564 	ret |= _init_interface_clks(oh);
1565 	ret |= _init_opt_clks(oh);
1566 
1567 	if (!ret)
1568 		oh->_state = _HWMOD_STATE_CLKS_INITED;
1569 	else
1570 		pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
1571 
1572 	return ret;
1573 }
1574 
1575 /**
1576  * _lookup_hardreset - fill register bit info for this hwmod/reset line
1577  * @oh: struct omap_hwmod *
1578  * @name: name of the reset line in the context of this hwmod
1579  * @ohri: struct omap_hwmod_rst_info * that this function will fill in
1580  *
1581  * Return the bit position of the reset line that match the
1582  * input name. Return -ENOENT if not found.
1583  */
1584 static int _lookup_hardreset(struct omap_hwmod *oh, const char *name,
1585 			     struct omap_hwmod_rst_info *ohri)
1586 {
1587 	int i;
1588 
1589 	for (i = 0; i < oh->rst_lines_cnt; i++) {
1590 		const char *rst_line = oh->rst_lines[i].name;
1591 		if (!strcmp(rst_line, name)) {
1592 			ohri->rst_shift = oh->rst_lines[i].rst_shift;
1593 			ohri->st_shift = oh->rst_lines[i].st_shift;
1594 			pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
1595 				 oh->name, __func__, rst_line, ohri->rst_shift,
1596 				 ohri->st_shift);
1597 
1598 			return 0;
1599 		}
1600 	}
1601 
1602 	return -ENOENT;
1603 }
1604 
1605 /**
1606  * _assert_hardreset - assert the HW reset line of submodules
1607  * contained in the hwmod module.
1608  * @oh: struct omap_hwmod *
1609  * @name: name of the reset line to lookup and assert
1610  *
1611  * Some IP like dsp, ipu or iva contain processor that require an HW
1612  * reset line to be assert / deassert in order to enable fully the IP.
1613  * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1614  * asserting the hardreset line on the currently-booted SoC, or passes
1615  * along the return value from _lookup_hardreset() or the SoC's
1616  * assert_hardreset code.
1617  */
1618 static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
1619 {
1620 	struct omap_hwmod_rst_info ohri;
1621 	int ret = -EINVAL;
1622 
1623 	if (!oh)
1624 		return -EINVAL;
1625 
1626 	if (!soc_ops.assert_hardreset)
1627 		return -ENOSYS;
1628 
1629 	ret = _lookup_hardreset(oh, name, &ohri);
1630 	if (ret < 0)
1631 		return ret;
1632 
1633 	ret = soc_ops.assert_hardreset(oh, &ohri);
1634 
1635 	return ret;
1636 }
1637 
1638 /**
1639  * _deassert_hardreset - deassert the HW reset line of submodules contained
1640  * in the hwmod module.
1641  * @oh: struct omap_hwmod *
1642  * @name: name of the reset line to look up and deassert
1643  *
1644  * Some IP like dsp, ipu or iva contain processor that require an HW
1645  * reset line to be assert / deassert in order to enable fully the IP.
1646  * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
1647  * deasserting the hardreset line on the currently-booted SoC, or passes
1648  * along the return value from _lookup_hardreset() or the SoC's
1649  * deassert_hardreset code.
1650  */
1651 static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1652 {
1653 	struct omap_hwmod_rst_info ohri;
1654 	int ret = -EINVAL;
1655 	int hwsup = 0;
1656 
1657 	if (!oh)
1658 		return -EINVAL;
1659 
1660 	if (!soc_ops.deassert_hardreset)
1661 		return -ENOSYS;
1662 
1663 	ret = _lookup_hardreset(oh, name, &ohri);
1664 	if (IS_ERR_VALUE(ret))
1665 		return ret;
1666 
1667 	if (oh->clkdm) {
1668 		/*
1669 		 * A clockdomain must be in SW_SUP otherwise reset
1670 		 * might not be completed. The clockdomain can be set
1671 		 * in HW_AUTO only when the module become ready.
1672 		 */
1673 		hwsup = clkdm_in_hwsup(oh->clkdm);
1674 		ret = clkdm_hwmod_enable(oh->clkdm, oh);
1675 		if (ret) {
1676 			WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
1677 			     oh->name, oh->clkdm->name, ret);
1678 			return ret;
1679 		}
1680 	}
1681 
1682 	_enable_clocks(oh);
1683 	if (soc_ops.enable_module)
1684 		soc_ops.enable_module(oh);
1685 
1686 	ret = soc_ops.deassert_hardreset(oh, &ohri);
1687 
1688 	if (soc_ops.disable_module)
1689 		soc_ops.disable_module(oh);
1690 	_disable_clocks(oh);
1691 
1692 	if (ret == -EBUSY)
1693 		pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
1694 
1695 	if (!ret) {
1696 		/*
1697 		 * Set the clockdomain to HW_AUTO, assuming that the
1698 		 * previous state was HW_AUTO.
1699 		 */
1700 		if (oh->clkdm && hwsup)
1701 			clkdm_allow_idle(oh->clkdm);
1702 	} else {
1703 		if (oh->clkdm)
1704 			clkdm_hwmod_disable(oh->clkdm, oh);
1705 	}
1706 
1707 	return ret;
1708 }
1709 
1710 /**
1711  * _read_hardreset - read the HW reset line state of submodules
1712  * contained in the hwmod module
1713  * @oh: struct omap_hwmod *
1714  * @name: name of the reset line to look up and read
1715  *
1716  * Return the state of the reset line.  Returns -EINVAL if @oh is
1717  * null, -ENOSYS if we have no way of reading the hardreset line
1718  * status on the currently-booted SoC, or passes along the return
1719  * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
1720  * code.
1721  */
1722 static int _read_hardreset(struct omap_hwmod *oh, const char *name)
1723 {
1724 	struct omap_hwmod_rst_info ohri;
1725 	int ret = -EINVAL;
1726 
1727 	if (!oh)
1728 		return -EINVAL;
1729 
1730 	if (!soc_ops.is_hardreset_asserted)
1731 		return -ENOSYS;
1732 
1733 	ret = _lookup_hardreset(oh, name, &ohri);
1734 	if (ret < 0)
1735 		return ret;
1736 
1737 	return soc_ops.is_hardreset_asserted(oh, &ohri);
1738 }
1739 
1740 /**
1741  * _are_all_hardreset_lines_asserted - return true if the @oh is hard-reset
1742  * @oh: struct omap_hwmod *
1743  *
1744  * If all hardreset lines associated with @oh are asserted, then return true.
1745  * Otherwise, if part of @oh is out hardreset or if no hardreset lines
1746  * associated with @oh are asserted, then return false.
1747  * This function is used to avoid executing some parts of the IP block
1748  * enable/disable sequence if its hardreset line is set.
1749  */
1750 static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh)
1751 {
1752 	int i, rst_cnt = 0;
1753 
1754 	if (oh->rst_lines_cnt == 0)
1755 		return false;
1756 
1757 	for (i = 0; i < oh->rst_lines_cnt; i++)
1758 		if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1759 			rst_cnt++;
1760 
1761 	if (oh->rst_lines_cnt == rst_cnt)
1762 		return true;
1763 
1764 	return false;
1765 }
1766 
1767 /**
1768  * _are_any_hardreset_lines_asserted - return true if any part of @oh is
1769  * hard-reset
1770  * @oh: struct omap_hwmod *
1771  *
1772  * If any hardreset lines associated with @oh are asserted, then
1773  * return true.  Otherwise, if no hardreset lines associated with @oh
1774  * are asserted, or if @oh has no hardreset lines, then return false.
1775  * This function is used to avoid executing some parts of the IP block
1776  * enable/disable sequence if any hardreset line is set.
1777  */
1778 static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
1779 {
1780 	int rst_cnt = 0;
1781 	int i;
1782 
1783 	for (i = 0; i < oh->rst_lines_cnt && rst_cnt == 0; i++)
1784 		if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
1785 			rst_cnt++;
1786 
1787 	return (rst_cnt) ? true : false;
1788 }
1789 
1790 /**
1791  * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
1792  * @oh: struct omap_hwmod *
1793  *
1794  * Disable the PRCM module mode related to the hwmod @oh.
1795  * Return EINVAL if the modulemode is not supported and 0 in case of success.
1796  */
1797 static int _omap4_disable_module(struct omap_hwmod *oh)
1798 {
1799 	int v;
1800 
1801 	if (!oh->clkdm || !oh->prcm.omap4.modulemode)
1802 		return -EINVAL;
1803 
1804 	/*
1805 	 * Since integration code might still be doing something, only
1806 	 * disable if all lines are under hardreset.
1807 	 */
1808 	if (_are_any_hardreset_lines_asserted(oh))
1809 		return 0;
1810 
1811 	pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1812 
1813 	omap4_cminst_module_disable(oh->clkdm->prcm_partition,
1814 				    oh->clkdm->cm_inst,
1815 				    oh->clkdm->clkdm_offs,
1816 				    oh->prcm.omap4.clkctrl_offs);
1817 
1818 	v = _omap4_wait_target_disable(oh);
1819 	if (v)
1820 		pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1821 			oh->name);
1822 
1823 	return 0;
1824 }
1825 
1826 /**
1827  * _am33xx_disable_module - enable CLKCTRL modulemode on AM33XX
1828  * @oh: struct omap_hwmod *
1829  *
1830  * Disable the PRCM module mode related to the hwmod @oh.
1831  * Return EINVAL if the modulemode is not supported and 0 in case of success.
1832  */
1833 static int _am33xx_disable_module(struct omap_hwmod *oh)
1834 {
1835 	int v;
1836 
1837 	if (!oh->clkdm || !oh->prcm.omap4.modulemode)
1838 		return -EINVAL;
1839 
1840 	pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
1841 
1842 	if (_are_any_hardreset_lines_asserted(oh))
1843 		return 0;
1844 
1845 	am33xx_cm_module_disable(oh->clkdm->cm_inst, oh->clkdm->clkdm_offs,
1846 				 oh->prcm.omap4.clkctrl_offs);
1847 
1848 	v = _am33xx_wait_target_disable(oh);
1849 	if (v)
1850 		pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
1851 			oh->name);
1852 
1853 	return 0;
1854 }
1855 
1856 /**
1857  * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
1858  * @oh: struct omap_hwmod *
1859  *
1860  * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit.  hwmod must be
1861  * enabled for this to work.  Returns -ENOENT if the hwmod cannot be
1862  * reset this way, -EINVAL if the hwmod is in the wrong state,
1863  * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1864  *
1865  * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
1866  * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
1867  * use the SYSCONFIG softreset bit to provide the status.
1868  *
1869  * Note that some IP like McBSP do have reset control but don't have
1870  * reset status.
1871  */
1872 static int _ocp_softreset(struct omap_hwmod *oh)
1873 {
1874 	u32 v;
1875 	int c = 0;
1876 	int ret = 0;
1877 
1878 	if (!oh->class->sysc ||
1879 	    !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
1880 		return -ENOENT;
1881 
1882 	/* clocks must be on for this operation */
1883 	if (oh->_state != _HWMOD_STATE_ENABLED) {
1884 		pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n",
1885 			oh->name);
1886 		return -EINVAL;
1887 	}
1888 
1889 	/* For some modules, all optionnal clocks need to be enabled as well */
1890 	if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1891 		_enable_optional_clocks(oh);
1892 
1893 	pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
1894 
1895 	v = oh->_sysc_cache;
1896 	ret = _set_softreset(oh, &v);
1897 	if (ret)
1898 		goto dis_opt_clks;
1899 	_write_sysconfig(v, oh);
1900 
1901 	if (oh->class->sysc->srst_udelay)
1902 		udelay(oh->class->sysc->srst_udelay);
1903 
1904 	c = _wait_softreset_complete(oh);
1905 	if (c == MAX_MODULE_SOFTRESET_WAIT)
1906 		pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
1907 			   oh->name, MAX_MODULE_SOFTRESET_WAIT);
1908 	else
1909 		pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
1910 
1911 	/*
1912 	 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
1913 	 * _wait_target_ready() or _reset()
1914 	 */
1915 
1916 	ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
1917 
1918 dis_opt_clks:
1919 	if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
1920 		_disable_optional_clocks(oh);
1921 
1922 	return ret;
1923 }
1924 
1925 /**
1926  * _reset - reset an omap_hwmod
1927  * @oh: struct omap_hwmod *
1928  *
1929  * Resets an omap_hwmod @oh.  If the module has a custom reset
1930  * function pointer defined, then call it to reset the IP block, and
1931  * pass along its return value to the caller.  Otherwise, if the IP
1932  * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
1933  * associated with it, call a function to reset the IP block via that
1934  * method, and pass along the return value to the caller.  Finally, if
1935  * the IP block has some hardreset lines associated with it, assert
1936  * all of those, but do _not_ deassert them. (This is because driver
1937  * authors have expressed an apparent requirement to control the
1938  * deassertion of the hardreset lines themselves.)
1939  *
1940  * The default software reset mechanism for most OMAP IP blocks is
1941  * triggered via the OCP_SYSCONFIG.SOFTRESET bit.  However, some
1942  * hwmods cannot be reset via this method.  Some are not targets and
1943  * therefore have no OCP header registers to access.  Others (like the
1944  * IVA) have idiosyncratic reset sequences.  So for these relatively
1945  * rare cases, custom reset code can be supplied in the struct
1946  * omap_hwmod_class .reset function pointer.
1947  *
1948  * _set_dmadisable() is called to set the DMADISABLE bit so that it
1949  * does not prevent idling of the system. This is necessary for cases
1950  * where ROMCODE/BOOTLOADER uses dma and transfers control to the
1951  * kernel without disabling dma.
1952  *
1953  * Passes along the return value from either _ocp_softreset() or the
1954  * custom reset function - these must return -EINVAL if the hwmod
1955  * cannot be reset this way or if the hwmod is in the wrong state,
1956  * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
1957  */
1958 static int _reset(struct omap_hwmod *oh)
1959 {
1960 	int i, r;
1961 
1962 	pr_debug("omap_hwmod: %s: resetting\n", oh->name);
1963 
1964 	if (oh->class->reset) {
1965 		r = oh->class->reset(oh);
1966 	} else {
1967 		if (oh->rst_lines_cnt > 0) {
1968 			for (i = 0; i < oh->rst_lines_cnt; i++)
1969 				_assert_hardreset(oh, oh->rst_lines[i].name);
1970 			return 0;
1971 		} else {
1972 			r = _ocp_softreset(oh);
1973 			if (r == -ENOENT)
1974 				r = 0;
1975 		}
1976 	}
1977 
1978 	_set_dmadisable(oh);
1979 
1980 	/*
1981 	 * OCP_SYSCONFIG bits need to be reprogrammed after a
1982 	 * softreset.  The _enable() function should be split to avoid
1983 	 * the rewrite of the OCP_SYSCONFIG register.
1984 	 */
1985 	if (oh->class->sysc) {
1986 		_update_sysc_cache(oh);
1987 		_enable_sysc(oh);
1988 	}
1989 
1990 	return r;
1991 }
1992 
1993 /**
1994  * _reconfigure_io_chain - clear any I/O chain wakeups and reconfigure chain
1995  *
1996  * Call the appropriate PRM function to clear any logged I/O chain
1997  * wakeups and to reconfigure the chain.  This apparently needs to be
1998  * done upon every mux change.  Since hwmods can be concurrently
1999  * enabled and idled, hold a spinlock around the I/O chain
2000  * reconfiguration sequence.  No return value.
2001  *
2002  * XXX When the PRM code is moved to drivers, this function can be removed,
2003  * as the PRM infrastructure should abstract this.
2004  */
2005 static void _reconfigure_io_chain(void)
2006 {
2007 	unsigned long flags;
2008 
2009 	spin_lock_irqsave(&io_chain_lock, flags);
2010 
2011 	if (cpu_is_omap34xx() && omap3_has_io_chain_ctrl())
2012 		omap3xxx_prm_reconfigure_io_chain();
2013 	else if (cpu_is_omap44xx())
2014 		omap44xx_prm_reconfigure_io_chain();
2015 
2016 	spin_unlock_irqrestore(&io_chain_lock, flags);
2017 }
2018 
2019 /**
2020  * _omap4_update_context_lost - increment hwmod context loss counter if
2021  * hwmod context was lost, and clear hardware context loss reg
2022  * @oh: hwmod to check for context loss
2023  *
2024  * If the PRCM indicates that the hwmod @oh lost context, increment
2025  * our in-memory context loss counter, and clear the RM_*_CONTEXT
2026  * bits. No return value.
2027  */
2028 static void _omap4_update_context_lost(struct omap_hwmod *oh)
2029 {
2030 	if (oh->prcm.omap4.flags & HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT)
2031 		return;
2032 
2033 	if (!prm_was_any_context_lost_old(oh->clkdm->pwrdm.ptr->prcm_partition,
2034 					  oh->clkdm->pwrdm.ptr->prcm_offs,
2035 					  oh->prcm.omap4.context_offs))
2036 		return;
2037 
2038 	oh->prcm.omap4.context_lost_counter++;
2039 	prm_clear_context_loss_flags_old(oh->clkdm->pwrdm.ptr->prcm_partition,
2040 					 oh->clkdm->pwrdm.ptr->prcm_offs,
2041 					 oh->prcm.omap4.context_offs);
2042 }
2043 
2044 /**
2045  * _omap4_get_context_lost - get context loss counter for a hwmod
2046  * @oh: hwmod to get context loss counter for
2047  *
2048  * Returns the in-memory context loss counter for a hwmod.
2049  */
2050 static int _omap4_get_context_lost(struct omap_hwmod *oh)
2051 {
2052 	return oh->prcm.omap4.context_lost_counter;
2053 }
2054 
2055 /**
2056  * _enable - enable an omap_hwmod
2057  * @oh: struct omap_hwmod *
2058  *
2059  * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
2060  * register target.  Returns -EINVAL if the hwmod is in the wrong
2061  * state or passes along the return value of _wait_target_ready().
2062  */
2063 static int _enable(struct omap_hwmod *oh)
2064 {
2065 	int r;
2066 	int hwsup = 0;
2067 
2068 	pr_debug("omap_hwmod: %s: enabling\n", oh->name);
2069 
2070 	/*
2071 	 * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
2072 	 * state at init.  Now that someone is really trying to enable
2073 	 * them, just ensure that the hwmod mux is set.
2074 	 */
2075 	if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
2076 		/*
2077 		 * If the caller has mux data populated, do the mux'ing
2078 		 * which wouldn't have been done as part of the _enable()
2079 		 * done during setup.
2080 		 */
2081 		if (oh->mux)
2082 			omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
2083 
2084 		oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
2085 		return 0;
2086 	}
2087 
2088 	if (oh->_state != _HWMOD_STATE_INITIALIZED &&
2089 	    oh->_state != _HWMOD_STATE_IDLE &&
2090 	    oh->_state != _HWMOD_STATE_DISABLED) {
2091 		WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
2092 			oh->name);
2093 		return -EINVAL;
2094 	}
2095 
2096 	/*
2097 	 * If an IP block contains HW reset lines and all of them are
2098 	 * asserted, we let integration code associated with that
2099 	 * block handle the enable.  We've received very little
2100 	 * information on what those driver authors need, and until
2101 	 * detailed information is provided and the driver code is
2102 	 * posted to the public lists, this is probably the best we
2103 	 * can do.
2104 	 */
2105 	if (_are_all_hardreset_lines_asserted(oh))
2106 		return 0;
2107 
2108 	/* Mux pins for device runtime if populated */
2109 	if (oh->mux && (!oh->mux->enabled ||
2110 			((oh->_state == _HWMOD_STATE_IDLE) &&
2111 			 oh->mux->pads_dynamic))) {
2112 		omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
2113 		_reconfigure_io_chain();
2114 	}
2115 
2116 	_add_initiator_dep(oh, mpu_oh);
2117 
2118 	if (oh->clkdm) {
2119 		/*
2120 		 * A clockdomain must be in SW_SUP before enabling
2121 		 * completely the module. The clockdomain can be set
2122 		 * in HW_AUTO only when the module become ready.
2123 		 */
2124 		hwsup = clkdm_in_hwsup(oh->clkdm) &&
2125 			!clkdm_missing_idle_reporting(oh->clkdm);
2126 		r = clkdm_hwmod_enable(oh->clkdm, oh);
2127 		if (r) {
2128 			WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
2129 			     oh->name, oh->clkdm->name, r);
2130 			return r;
2131 		}
2132 	}
2133 
2134 	_enable_clocks(oh);
2135 	if (soc_ops.enable_module)
2136 		soc_ops.enable_module(oh);
2137 
2138 	if (soc_ops.update_context_lost)
2139 		soc_ops.update_context_lost(oh);
2140 
2141 	r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
2142 		-EINVAL;
2143 	if (!r) {
2144 		/*
2145 		 * Set the clockdomain to HW_AUTO only if the target is ready,
2146 		 * assuming that the previous state was HW_AUTO
2147 		 */
2148 		if (oh->clkdm && hwsup)
2149 			clkdm_allow_idle(oh->clkdm);
2150 
2151 		oh->_state = _HWMOD_STATE_ENABLED;
2152 
2153 		/* Access the sysconfig only if the target is ready */
2154 		if (oh->class->sysc) {
2155 			if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
2156 				_update_sysc_cache(oh);
2157 			_enable_sysc(oh);
2158 		}
2159 	} else {
2160 		if (soc_ops.disable_module)
2161 			soc_ops.disable_module(oh);
2162 		_disable_clocks(oh);
2163 		pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
2164 			 oh->name, r);
2165 
2166 		if (oh->clkdm)
2167 			clkdm_hwmod_disable(oh->clkdm, oh);
2168 	}
2169 
2170 	return r;
2171 }
2172 
2173 /**
2174  * _idle - idle an omap_hwmod
2175  * @oh: struct omap_hwmod *
2176  *
2177  * Idles an omap_hwmod @oh.  This should be called once the hwmod has
2178  * no further work.  Returns -EINVAL if the hwmod is in the wrong
2179  * state or returns 0.
2180  */
2181 static int _idle(struct omap_hwmod *oh)
2182 {
2183 	pr_debug("omap_hwmod: %s: idling\n", oh->name);
2184 
2185 	if (oh->_state != _HWMOD_STATE_ENABLED) {
2186 		WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
2187 			oh->name);
2188 		return -EINVAL;
2189 	}
2190 
2191 	if (_are_all_hardreset_lines_asserted(oh))
2192 		return 0;
2193 
2194 	if (oh->class->sysc)
2195 		_idle_sysc(oh);
2196 	_del_initiator_dep(oh, mpu_oh);
2197 
2198 	if (soc_ops.disable_module)
2199 		soc_ops.disable_module(oh);
2200 
2201 	/*
2202 	 * The module must be in idle mode before disabling any parents
2203 	 * clocks. Otherwise, the parent clock might be disabled before
2204 	 * the module transition is done, and thus will prevent the
2205 	 * transition to complete properly.
2206 	 */
2207 	_disable_clocks(oh);
2208 	if (oh->clkdm)
2209 		clkdm_hwmod_disable(oh->clkdm, oh);
2210 
2211 	/* Mux pins for device idle if populated */
2212 	if (oh->mux && oh->mux->pads_dynamic) {
2213 		omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
2214 		_reconfigure_io_chain();
2215 	}
2216 
2217 	oh->_state = _HWMOD_STATE_IDLE;
2218 
2219 	return 0;
2220 }
2221 
2222 /**
2223  * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
2224  * @oh: struct omap_hwmod *
2225  * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
2226  *
2227  * Sets the IP block's OCP autoidle bit in hardware, and updates our
2228  * local copy. Intended to be used by drivers that require
2229  * direct manipulation of the AUTOIDLE bits.
2230  * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
2231  * along the return value from _set_module_autoidle().
2232  *
2233  * Any users of this function should be scrutinized carefully.
2234  */
2235 int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
2236 {
2237 	u32 v;
2238 	int retval = 0;
2239 	unsigned long flags;
2240 
2241 	if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
2242 		return -EINVAL;
2243 
2244 	spin_lock_irqsave(&oh->_lock, flags);
2245 
2246 	v = oh->_sysc_cache;
2247 
2248 	retval = _set_module_autoidle(oh, autoidle, &v);
2249 
2250 	if (!retval)
2251 		_write_sysconfig(v, oh);
2252 
2253 	spin_unlock_irqrestore(&oh->_lock, flags);
2254 
2255 	return retval;
2256 }
2257 
2258 /**
2259  * _shutdown - shutdown an omap_hwmod
2260  * @oh: struct omap_hwmod *
2261  *
2262  * Shut down an omap_hwmod @oh.  This should be called when the driver
2263  * used for the hwmod is removed or unloaded or if the driver is not
2264  * used by the system.  Returns -EINVAL if the hwmod is in the wrong
2265  * state or returns 0.
2266  */
2267 static int _shutdown(struct omap_hwmod *oh)
2268 {
2269 	int ret, i;
2270 	u8 prev_state;
2271 
2272 	if (oh->_state != _HWMOD_STATE_IDLE &&
2273 	    oh->_state != _HWMOD_STATE_ENABLED) {
2274 		WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
2275 			oh->name);
2276 		return -EINVAL;
2277 	}
2278 
2279 	if (_are_all_hardreset_lines_asserted(oh))
2280 		return 0;
2281 
2282 	pr_debug("omap_hwmod: %s: disabling\n", oh->name);
2283 
2284 	if (oh->class->pre_shutdown) {
2285 		prev_state = oh->_state;
2286 		if (oh->_state == _HWMOD_STATE_IDLE)
2287 			_enable(oh);
2288 		ret = oh->class->pre_shutdown(oh);
2289 		if (ret) {
2290 			if (prev_state == _HWMOD_STATE_IDLE)
2291 				_idle(oh);
2292 			return ret;
2293 		}
2294 	}
2295 
2296 	if (oh->class->sysc) {
2297 		if (oh->_state == _HWMOD_STATE_IDLE)
2298 			_enable(oh);
2299 		_shutdown_sysc(oh);
2300 	}
2301 
2302 	/* clocks and deps are already disabled in idle */
2303 	if (oh->_state == _HWMOD_STATE_ENABLED) {
2304 		_del_initiator_dep(oh, mpu_oh);
2305 		/* XXX what about the other system initiators here? dma, dsp */
2306 		if (soc_ops.disable_module)
2307 			soc_ops.disable_module(oh);
2308 		_disable_clocks(oh);
2309 		if (oh->clkdm)
2310 			clkdm_hwmod_disable(oh->clkdm, oh);
2311 	}
2312 	/* XXX Should this code also force-disable the optional clocks? */
2313 
2314 	for (i = 0; i < oh->rst_lines_cnt; i++)
2315 		_assert_hardreset(oh, oh->rst_lines[i].name);
2316 
2317 	/* Mux pins to safe mode or use populated off mode values */
2318 	if (oh->mux)
2319 		omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
2320 
2321 	oh->_state = _HWMOD_STATE_DISABLED;
2322 
2323 	return 0;
2324 }
2325 
2326 /**
2327  * _init_mpu_rt_base - populate the virtual address for a hwmod
2328  * @oh: struct omap_hwmod * to locate the virtual address
2329  *
2330  * Cache the virtual address used by the MPU to access this IP block's
2331  * registers.  This address is needed early so the OCP registers that
2332  * are part of the device's address space can be ioremapped properly.
2333  * No return value.
2334  */
2335 static void __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data)
2336 {
2337 	struct omap_hwmod_addr_space *mem;
2338 	void __iomem *va_start;
2339 
2340 	if (!oh)
2341 		return;
2342 
2343 	_save_mpu_port_index(oh);
2344 
2345 	if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
2346 		return;
2347 
2348 	mem = _find_mpu_rt_addr_space(oh);
2349 	if (!mem) {
2350 		pr_debug("omap_hwmod: %s: no MPU register target found\n",
2351 			 oh->name);
2352 		return;
2353 	}
2354 
2355 	va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
2356 	if (!va_start) {
2357 		pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
2358 		return;
2359 	}
2360 
2361 	pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
2362 		 oh->name, va_start);
2363 
2364 	oh->_mpu_rt_va = va_start;
2365 }
2366 
2367 /**
2368  * _init - initialize internal data for the hwmod @oh
2369  * @oh: struct omap_hwmod *
2370  * @n: (unused)
2371  *
2372  * Look up the clocks and the address space used by the MPU to access
2373  * registers belonging to the hwmod @oh.  @oh must already be
2374  * registered at this point.  This is the first of two phases for
2375  * hwmod initialization.  Code called here does not touch any hardware
2376  * registers, it simply prepares internal data structures.  Returns 0
2377  * upon success or if the hwmod isn't registered, or -EINVAL upon
2378  * failure.
2379  */
2380 static int __init _init(struct omap_hwmod *oh, void *data)
2381 {
2382 	int r;
2383 
2384 	if (oh->_state != _HWMOD_STATE_REGISTERED)
2385 		return 0;
2386 
2387 	_init_mpu_rt_base(oh, NULL);
2388 
2389 	r = _init_clocks(oh, NULL);
2390 	if (IS_ERR_VALUE(r)) {
2391 		WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
2392 		return -EINVAL;
2393 	}
2394 
2395 	oh->_state = _HWMOD_STATE_INITIALIZED;
2396 
2397 	return 0;
2398 }
2399 
2400 /**
2401  * _setup_iclk_autoidle - configure an IP block's interface clocks
2402  * @oh: struct omap_hwmod *
2403  *
2404  * Set up the module's interface clocks.  XXX This function is still mostly
2405  * a stub; implementing this properly requires iclk autoidle usecounting in
2406  * the clock code.   No return value.
2407  */
2408 static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
2409 {
2410 	struct omap_hwmod_ocp_if *os;
2411 	struct list_head *p;
2412 	int i = 0;
2413 	if (oh->_state != _HWMOD_STATE_INITIALIZED)
2414 		return;
2415 
2416 	p = oh->slave_ports.next;
2417 
2418 	while (i < oh->slaves_cnt) {
2419 		os = _fetch_next_ocp_if(&p, &i);
2420 		if (!os->_clk)
2421 			continue;
2422 
2423 		if (os->flags & OCPIF_SWSUP_IDLE) {
2424 			/* XXX omap_iclk_deny_idle(c); */
2425 		} else {
2426 			/* XXX omap_iclk_allow_idle(c); */
2427 			clk_enable(os->_clk);
2428 		}
2429 	}
2430 
2431 	return;
2432 }
2433 
2434 /**
2435  * _setup_reset - reset an IP block during the setup process
2436  * @oh: struct omap_hwmod *
2437  *
2438  * Reset the IP block corresponding to the hwmod @oh during the setup
2439  * process.  The IP block is first enabled so it can be successfully
2440  * reset.  Returns 0 upon success or a negative error code upon
2441  * failure.
2442  */
2443 static int __init _setup_reset(struct omap_hwmod *oh)
2444 {
2445 	int r;
2446 
2447 	if (oh->_state != _HWMOD_STATE_INITIALIZED)
2448 		return -EINVAL;
2449 
2450 	if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK)
2451 		return -EPERM;
2452 
2453 	if (oh->rst_lines_cnt == 0) {
2454 		r = _enable(oh);
2455 		if (r) {
2456 			pr_warning("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
2457 				   oh->name, oh->_state);
2458 			return -EINVAL;
2459 		}
2460 	}
2461 
2462 	if (!(oh->flags & HWMOD_INIT_NO_RESET))
2463 		r = _reset(oh);
2464 
2465 	return r;
2466 }
2467 
2468 /**
2469  * _setup_postsetup - transition to the appropriate state after _setup
2470  * @oh: struct omap_hwmod *
2471  *
2472  * Place an IP block represented by @oh into a "post-setup" state --
2473  * either IDLE, ENABLED, or DISABLED.  ("post-setup" simply means that
2474  * this function is called at the end of _setup().)  The postsetup
2475  * state for an IP block can be changed by calling
2476  * omap_hwmod_enter_postsetup_state() early in the boot process,
2477  * before one of the omap_hwmod_setup*() functions are called for the
2478  * IP block.
2479  *
2480  * The IP block stays in this state until a PM runtime-based driver is
2481  * loaded for that IP block.  A post-setup state of IDLE is
2482  * appropriate for almost all IP blocks with runtime PM-enabled
2483  * drivers, since those drivers are able to enable the IP block.  A
2484  * post-setup state of ENABLED is appropriate for kernels with PM
2485  * runtime disabled.  The DISABLED state is appropriate for unusual IP
2486  * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
2487  * included, since the WDTIMER starts running on reset and will reset
2488  * the MPU if left active.
2489  *
2490  * This post-setup mechanism is deprecated.  Once all of the OMAP
2491  * drivers have been converted to use PM runtime, and all of the IP
2492  * block data and interconnect data is available to the hwmod code, it
2493  * should be possible to replace this mechanism with a "lazy reset"
2494  * arrangement.  In a "lazy reset" setup, each IP block is enabled
2495  * when the driver first probes, then all remaining IP blocks without
2496  * drivers are either shut down or enabled after the drivers have
2497  * loaded.  However, this cannot take place until the above
2498  * preconditions have been met, since otherwise the late reset code
2499  * has no way of knowing which IP blocks are in use by drivers, and
2500  * which ones are unused.
2501  *
2502  * No return value.
2503  */
2504 static void __init _setup_postsetup(struct omap_hwmod *oh)
2505 {
2506 	u8 postsetup_state;
2507 
2508 	if (oh->rst_lines_cnt > 0)
2509 		return;
2510 
2511 	postsetup_state = oh->_postsetup_state;
2512 	if (postsetup_state == _HWMOD_STATE_UNKNOWN)
2513 		postsetup_state = _HWMOD_STATE_ENABLED;
2514 
2515 	/*
2516 	 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
2517 	 * it should be set by the core code as a runtime flag during startup
2518 	 */
2519 	if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
2520 	    (postsetup_state == _HWMOD_STATE_IDLE)) {
2521 		oh->_int_flags |= _HWMOD_SKIP_ENABLE;
2522 		postsetup_state = _HWMOD_STATE_ENABLED;
2523 	}
2524 
2525 	if (postsetup_state == _HWMOD_STATE_IDLE)
2526 		_idle(oh);
2527 	else if (postsetup_state == _HWMOD_STATE_DISABLED)
2528 		_shutdown(oh);
2529 	else if (postsetup_state != _HWMOD_STATE_ENABLED)
2530 		WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
2531 		     oh->name, postsetup_state);
2532 
2533 	return;
2534 }
2535 
2536 /**
2537  * _setup - prepare IP block hardware for use
2538  * @oh: struct omap_hwmod *
2539  * @n: (unused, pass NULL)
2540  *
2541  * Configure the IP block represented by @oh.  This may include
2542  * enabling the IP block, resetting it, and placing it into a
2543  * post-setup state, depending on the type of IP block and applicable
2544  * flags.  IP blocks are reset to prevent any previous configuration
2545  * by the bootloader or previous operating system from interfering
2546  * with power management or other parts of the system.  The reset can
2547  * be avoided; see omap_hwmod_no_setup_reset().  This is the second of
2548  * two phases for hwmod initialization.  Code called here generally
2549  * affects the IP block hardware, or system integration hardware
2550  * associated with the IP block.  Returns 0.
2551  */
2552 static int __init _setup(struct omap_hwmod *oh, void *data)
2553 {
2554 	if (oh->_state != _HWMOD_STATE_INITIALIZED)
2555 		return 0;
2556 
2557 	_setup_iclk_autoidle(oh);
2558 
2559 	if (!_setup_reset(oh))
2560 		_setup_postsetup(oh);
2561 
2562 	return 0;
2563 }
2564 
2565 /**
2566  * _register - register a struct omap_hwmod
2567  * @oh: struct omap_hwmod *
2568  *
2569  * Registers the omap_hwmod @oh.  Returns -EEXIST if an omap_hwmod
2570  * already has been registered by the same name; -EINVAL if the
2571  * omap_hwmod is in the wrong state, if @oh is NULL, if the
2572  * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
2573  * name, or if the omap_hwmod's class is missing a name; or 0 upon
2574  * success.
2575  *
2576  * XXX The data should be copied into bootmem, so the original data
2577  * should be marked __initdata and freed after init.  This would allow
2578  * unneeded omap_hwmods to be freed on multi-OMAP configurations.  Note
2579  * that the copy process would be relatively complex due to the large number
2580  * of substructures.
2581  */
2582 static int __init _register(struct omap_hwmod *oh)
2583 {
2584 	if (!oh || !oh->name || !oh->class || !oh->class->name ||
2585 	    (oh->_state != _HWMOD_STATE_UNKNOWN))
2586 		return -EINVAL;
2587 
2588 	pr_debug("omap_hwmod: %s: registering\n", oh->name);
2589 
2590 	if (_lookup(oh->name))
2591 		return -EEXIST;
2592 
2593 	list_add_tail(&oh->node, &omap_hwmod_list);
2594 
2595 	INIT_LIST_HEAD(&oh->master_ports);
2596 	INIT_LIST_HEAD(&oh->slave_ports);
2597 	spin_lock_init(&oh->_lock);
2598 
2599 	oh->_state = _HWMOD_STATE_REGISTERED;
2600 
2601 	/*
2602 	 * XXX Rather than doing a strcmp(), this should test a flag
2603 	 * set in the hwmod data, inserted by the autogenerator code.
2604 	 */
2605 	if (!strcmp(oh->name, MPU_INITIATOR_NAME))
2606 		mpu_oh = oh;
2607 
2608 	return 0;
2609 }
2610 
2611 /**
2612  * _alloc_links - return allocated memory for hwmod links
2613  * @ml: pointer to a struct omap_hwmod_link * for the master link
2614  * @sl: pointer to a struct omap_hwmod_link * for the slave link
2615  *
2616  * Return pointers to two struct omap_hwmod_link records, via the
2617  * addresses pointed to by @ml and @sl.  Will first attempt to return
2618  * memory allocated as part of a large initial block, but if that has
2619  * been exhausted, will allocate memory itself.  Since ideally this
2620  * second allocation path will never occur, the number of these
2621  * 'supplemental' allocations will be logged when debugging is
2622  * enabled.  Returns 0.
2623  */
2624 static int __init _alloc_links(struct omap_hwmod_link **ml,
2625 			       struct omap_hwmod_link **sl)
2626 {
2627 	unsigned int sz;
2628 
2629 	if ((free_ls + LINKS_PER_OCP_IF) <= max_ls) {
2630 		*ml = &linkspace[free_ls++];
2631 		*sl = &linkspace[free_ls++];
2632 		return 0;
2633 	}
2634 
2635 	sz = sizeof(struct omap_hwmod_link) * LINKS_PER_OCP_IF;
2636 
2637 	*sl = NULL;
2638 	*ml = alloc_bootmem(sz);
2639 
2640 	memset(*ml, 0, sz);
2641 
2642 	*sl = (void *)(*ml) + sizeof(struct omap_hwmod_link);
2643 
2644 	ls_supp++;
2645 	pr_debug("omap_hwmod: supplemental link allocations needed: %d\n",
2646 		 ls_supp * LINKS_PER_OCP_IF);
2647 
2648 	return 0;
2649 };
2650 
2651 /**
2652  * _add_link - add an interconnect between two IP blocks
2653  * @oi: pointer to a struct omap_hwmod_ocp_if record
2654  *
2655  * Add struct omap_hwmod_link records connecting the master IP block
2656  * specified in @oi->master to @oi, and connecting the slave IP block
2657  * specified in @oi->slave to @oi.  This code is assumed to run before
2658  * preemption or SMP has been enabled, thus avoiding the need for
2659  * locking in this code.  Changes to this assumption will require
2660  * additional locking.  Returns 0.
2661  */
2662 static int __init _add_link(struct omap_hwmod_ocp_if *oi)
2663 {
2664 	struct omap_hwmod_link *ml, *sl;
2665 
2666 	pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
2667 		 oi->slave->name);
2668 
2669 	_alloc_links(&ml, &sl);
2670 
2671 	ml->ocp_if = oi;
2672 	INIT_LIST_HEAD(&ml->node);
2673 	list_add(&ml->node, &oi->master->master_ports);
2674 	oi->master->masters_cnt++;
2675 
2676 	sl->ocp_if = oi;
2677 	INIT_LIST_HEAD(&sl->node);
2678 	list_add(&sl->node, &oi->slave->slave_ports);
2679 	oi->slave->slaves_cnt++;
2680 
2681 	return 0;
2682 }
2683 
2684 /**
2685  * _register_link - register a struct omap_hwmod_ocp_if
2686  * @oi: struct omap_hwmod_ocp_if *
2687  *
2688  * Registers the omap_hwmod_ocp_if record @oi.  Returns -EEXIST if it
2689  * has already been registered; -EINVAL if @oi is NULL or if the
2690  * record pointed to by @oi is missing required fields; or 0 upon
2691  * success.
2692  *
2693  * XXX The data should be copied into bootmem, so the original data
2694  * should be marked __initdata and freed after init.  This would allow
2695  * unneeded omap_hwmods to be freed on multi-OMAP configurations.
2696  */
2697 static int __init _register_link(struct omap_hwmod_ocp_if *oi)
2698 {
2699 	if (!oi || !oi->master || !oi->slave || !oi->user)
2700 		return -EINVAL;
2701 
2702 	if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
2703 		return -EEXIST;
2704 
2705 	pr_debug("omap_hwmod: registering link from %s to %s\n",
2706 		 oi->master->name, oi->slave->name);
2707 
2708 	/*
2709 	 * Register the connected hwmods, if they haven't been
2710 	 * registered already
2711 	 */
2712 	if (oi->master->_state != _HWMOD_STATE_REGISTERED)
2713 		_register(oi->master);
2714 
2715 	if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
2716 		_register(oi->slave);
2717 
2718 	_add_link(oi);
2719 
2720 	oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
2721 
2722 	return 0;
2723 }
2724 
2725 /**
2726  * _alloc_linkspace - allocate large block of hwmod links
2727  * @ois: pointer to an array of struct omap_hwmod_ocp_if records to count
2728  *
2729  * Allocate a large block of struct omap_hwmod_link records.  This
2730  * improves boot time significantly by avoiding the need to allocate
2731  * individual records one by one.  If the number of records to
2732  * allocate in the block hasn't been manually specified, this function
2733  * will count the number of struct omap_hwmod_ocp_if records in @ois
2734  * and use that to determine the allocation size.  For SoC families
2735  * that require multiple list registrations, such as OMAP3xxx, this
2736  * estimation process isn't optimal, so manual estimation is advised
2737  * in those cases.  Returns -EEXIST if the allocation has already occurred
2738  * or 0 upon success.
2739  */
2740 static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois)
2741 {
2742 	unsigned int i = 0;
2743 	unsigned int sz;
2744 
2745 	if (linkspace) {
2746 		WARN(1, "linkspace already allocated\n");
2747 		return -EEXIST;
2748 	}
2749 
2750 	if (max_ls == 0)
2751 		while (ois[i++])
2752 			max_ls += LINKS_PER_OCP_IF;
2753 
2754 	sz = sizeof(struct omap_hwmod_link) * max_ls;
2755 
2756 	pr_debug("omap_hwmod: %s: allocating %d byte linkspace (%d links)\n",
2757 		 __func__, sz, max_ls);
2758 
2759 	linkspace = alloc_bootmem(sz);
2760 
2761 	memset(linkspace, 0, sz);
2762 
2763 	return 0;
2764 }
2765 
2766 /* Static functions intended only for use in soc_ops field function pointers */
2767 
2768 /**
2769  * _omap2xxx_wait_target_ready - wait for a module to leave slave idle
2770  * @oh: struct omap_hwmod *
2771  *
2772  * Wait for a module @oh to leave slave idle.  Returns 0 if the module
2773  * does not have an IDLEST bit or if the module successfully leaves
2774  * slave idle; otherwise, pass along the return value of the
2775  * appropriate *_cm*_wait_module_ready() function.
2776  */
2777 static int _omap2xxx_wait_target_ready(struct omap_hwmod *oh)
2778 {
2779 	if (!oh)
2780 		return -EINVAL;
2781 
2782 	if (oh->flags & HWMOD_NO_IDLEST)
2783 		return 0;
2784 
2785 	if (!_find_mpu_rt_port(oh))
2786 		return 0;
2787 
2788 	/* XXX check module SIDLEMODE, hardreset status, enabled clocks */
2789 
2790 	return omap2xxx_cm_wait_module_ready(oh->prcm.omap2.module_offs,
2791 					     oh->prcm.omap2.idlest_reg_id,
2792 					     oh->prcm.omap2.idlest_idle_bit);
2793 }
2794 
2795 /**
2796  * _omap3xxx_wait_target_ready - wait for a module to leave slave idle
2797  * @oh: struct omap_hwmod *
2798  *
2799  * Wait for a module @oh to leave slave idle.  Returns 0 if the module
2800  * does not have an IDLEST bit or if the module successfully leaves
2801  * slave idle; otherwise, pass along the return value of the
2802  * appropriate *_cm*_wait_module_ready() function.
2803  */
2804 static int _omap3xxx_wait_target_ready(struct omap_hwmod *oh)
2805 {
2806 	if (!oh)
2807 		return -EINVAL;
2808 
2809 	if (oh->flags & HWMOD_NO_IDLEST)
2810 		return 0;
2811 
2812 	if (!_find_mpu_rt_port(oh))
2813 		return 0;
2814 
2815 	/* XXX check module SIDLEMODE, hardreset status, enabled clocks */
2816 
2817 	return omap3xxx_cm_wait_module_ready(oh->prcm.omap2.module_offs,
2818 					     oh->prcm.omap2.idlest_reg_id,
2819 					     oh->prcm.omap2.idlest_idle_bit);
2820 }
2821 
2822 /**
2823  * _omap4_wait_target_ready - wait for a module to leave slave idle
2824  * @oh: struct omap_hwmod *
2825  *
2826  * Wait for a module @oh to leave slave idle.  Returns 0 if the module
2827  * does not have an IDLEST bit or if the module successfully leaves
2828  * slave idle; otherwise, pass along the return value of the
2829  * appropriate *_cm*_wait_module_ready() function.
2830  */
2831 static int _omap4_wait_target_ready(struct omap_hwmod *oh)
2832 {
2833 	if (!oh)
2834 		return -EINVAL;
2835 
2836 	if (oh->flags & HWMOD_NO_IDLEST || !oh->clkdm)
2837 		return 0;
2838 
2839 	if (!_find_mpu_rt_port(oh))
2840 		return 0;
2841 
2842 	/* XXX check module SIDLEMODE, hardreset status */
2843 
2844 	return omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
2845 					      oh->clkdm->cm_inst,
2846 					      oh->clkdm->clkdm_offs,
2847 					      oh->prcm.omap4.clkctrl_offs);
2848 }
2849 
2850 /**
2851  * _am33xx_wait_target_ready - wait for a module to leave slave idle
2852  * @oh: struct omap_hwmod *
2853  *
2854  * Wait for a module @oh to leave slave idle.  Returns 0 if the module
2855  * does not have an IDLEST bit or if the module successfully leaves
2856  * slave idle; otherwise, pass along the return value of the
2857  * appropriate *_cm*_wait_module_ready() function.
2858  */
2859 static int _am33xx_wait_target_ready(struct omap_hwmod *oh)
2860 {
2861 	if (!oh || !oh->clkdm)
2862 		return -EINVAL;
2863 
2864 	if (oh->flags & HWMOD_NO_IDLEST)
2865 		return 0;
2866 
2867 	if (!_find_mpu_rt_port(oh))
2868 		return 0;
2869 
2870 	/* XXX check module SIDLEMODE, hardreset status */
2871 
2872 	return am33xx_cm_wait_module_ready(oh->clkdm->cm_inst,
2873 					      oh->clkdm->clkdm_offs,
2874 					      oh->prcm.omap4.clkctrl_offs);
2875 }
2876 
2877 /**
2878  * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2879  * @oh: struct omap_hwmod * to assert hardreset
2880  * @ohri: hardreset line data
2881  *
2882  * Call omap2_prm_assert_hardreset() with parameters extracted from
2883  * the hwmod @oh and the hardreset line data @ohri.  Only intended for
2884  * use as an soc_ops function pointer.  Passes along the return value
2885  * from omap2_prm_assert_hardreset().  XXX This function is scheduled
2886  * for removal when the PRM code is moved into drivers/.
2887  */
2888 static int _omap2_assert_hardreset(struct omap_hwmod *oh,
2889 				   struct omap_hwmod_rst_info *ohri)
2890 {
2891 	return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
2892 					  ohri->rst_shift);
2893 }
2894 
2895 /**
2896  * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
2897  * @oh: struct omap_hwmod * to deassert hardreset
2898  * @ohri: hardreset line data
2899  *
2900  * Call omap2_prm_deassert_hardreset() with parameters extracted from
2901  * the hwmod @oh and the hardreset line data @ohri.  Only intended for
2902  * use as an soc_ops function pointer.  Passes along the return value
2903  * from omap2_prm_deassert_hardreset().  XXX This function is
2904  * scheduled for removal when the PRM code is moved into drivers/.
2905  */
2906 static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
2907 				     struct omap_hwmod_rst_info *ohri)
2908 {
2909 	return omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
2910 					    ohri->rst_shift,
2911 					    ohri->st_shift);
2912 }
2913 
2914 /**
2915  * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
2916  * @oh: struct omap_hwmod * to test hardreset
2917  * @ohri: hardreset line data
2918  *
2919  * Call omap2_prm_is_hardreset_asserted() with parameters extracted
2920  * from the hwmod @oh and the hardreset line data @ohri.  Only
2921  * intended for use as an soc_ops function pointer.  Passes along the
2922  * return value from omap2_prm_is_hardreset_asserted().  XXX This
2923  * function is scheduled for removal when the PRM code is moved into
2924  * drivers/.
2925  */
2926 static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
2927 					struct omap_hwmod_rst_info *ohri)
2928 {
2929 	return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
2930 					       ohri->st_shift);
2931 }
2932 
2933 /**
2934  * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2935  * @oh: struct omap_hwmod * to assert hardreset
2936  * @ohri: hardreset line data
2937  *
2938  * Call omap4_prminst_assert_hardreset() with parameters extracted
2939  * from the hwmod @oh and the hardreset line data @ohri.  Only
2940  * intended for use as an soc_ops function pointer.  Passes along the
2941  * return value from omap4_prminst_assert_hardreset().  XXX This
2942  * function is scheduled for removal when the PRM code is moved into
2943  * drivers/.
2944  */
2945 static int _omap4_assert_hardreset(struct omap_hwmod *oh,
2946 				   struct omap_hwmod_rst_info *ohri)
2947 {
2948 	if (!oh->clkdm)
2949 		return -EINVAL;
2950 
2951 	return omap4_prminst_assert_hardreset(ohri->rst_shift,
2952 				oh->clkdm->pwrdm.ptr->prcm_partition,
2953 				oh->clkdm->pwrdm.ptr->prcm_offs,
2954 				oh->prcm.omap4.rstctrl_offs);
2955 }
2956 
2957 /**
2958  * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
2959  * @oh: struct omap_hwmod * to deassert hardreset
2960  * @ohri: hardreset line data
2961  *
2962  * Call omap4_prminst_deassert_hardreset() with parameters extracted
2963  * from the hwmod @oh and the hardreset line data @ohri.  Only
2964  * intended for use as an soc_ops function pointer.  Passes along the
2965  * return value from omap4_prminst_deassert_hardreset().  XXX This
2966  * function is scheduled for removal when the PRM code is moved into
2967  * drivers/.
2968  */
2969 static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
2970 				     struct omap_hwmod_rst_info *ohri)
2971 {
2972 	if (!oh->clkdm)
2973 		return -EINVAL;
2974 
2975 	if (ohri->st_shift)
2976 		pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
2977 		       oh->name, ohri->name);
2978 	return omap4_prminst_deassert_hardreset(ohri->rst_shift,
2979 				oh->clkdm->pwrdm.ptr->prcm_partition,
2980 				oh->clkdm->pwrdm.ptr->prcm_offs,
2981 				oh->prcm.omap4.rstctrl_offs);
2982 }
2983 
2984 /**
2985  * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
2986  * @oh: struct omap_hwmod * to test hardreset
2987  * @ohri: hardreset line data
2988  *
2989  * Call omap4_prminst_is_hardreset_asserted() with parameters
2990  * extracted from the hwmod @oh and the hardreset line data @ohri.
2991  * Only intended for use as an soc_ops function pointer.  Passes along
2992  * the return value from omap4_prminst_is_hardreset_asserted().  XXX
2993  * This function is scheduled for removal when the PRM code is moved
2994  * into drivers/.
2995  */
2996 static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
2997 					struct omap_hwmod_rst_info *ohri)
2998 {
2999 	if (!oh->clkdm)
3000 		return -EINVAL;
3001 
3002 	return omap4_prminst_is_hardreset_asserted(ohri->rst_shift,
3003 				oh->clkdm->pwrdm.ptr->prcm_partition,
3004 				oh->clkdm->pwrdm.ptr->prcm_offs,
3005 				oh->prcm.omap4.rstctrl_offs);
3006 }
3007 
3008 /**
3009  * _am33xx_assert_hardreset - call AM33XX PRM hardreset fn with hwmod args
3010  * @oh: struct omap_hwmod * to assert hardreset
3011  * @ohri: hardreset line data
3012  *
3013  * Call am33xx_prminst_assert_hardreset() with parameters extracted
3014  * from the hwmod @oh and the hardreset line data @ohri.  Only
3015  * intended for use as an soc_ops function pointer.  Passes along the
3016  * return value from am33xx_prminst_assert_hardreset().  XXX This
3017  * function is scheduled for removal when the PRM code is moved into
3018  * drivers/.
3019  */
3020 static int _am33xx_assert_hardreset(struct omap_hwmod *oh,
3021 				   struct omap_hwmod_rst_info *ohri)
3022 
3023 {
3024 	return am33xx_prm_assert_hardreset(ohri->rst_shift,
3025 				oh->clkdm->pwrdm.ptr->prcm_offs,
3026 				oh->prcm.omap4.rstctrl_offs);
3027 }
3028 
3029 /**
3030  * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
3031  * @oh: struct omap_hwmod * to deassert hardreset
3032  * @ohri: hardreset line data
3033  *
3034  * Call am33xx_prminst_deassert_hardreset() with parameters extracted
3035  * from the hwmod @oh and the hardreset line data @ohri.  Only
3036  * intended for use as an soc_ops function pointer.  Passes along the
3037  * return value from am33xx_prminst_deassert_hardreset().  XXX This
3038  * function is scheduled for removal when the PRM code is moved into
3039  * drivers/.
3040  */
3041 static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
3042 				     struct omap_hwmod_rst_info *ohri)
3043 {
3044 	if (ohri->st_shift)
3045 		pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
3046 		       oh->name, ohri->name);
3047 
3048 	return am33xx_prm_deassert_hardreset(ohri->rst_shift,
3049 				oh->clkdm->pwrdm.ptr->prcm_offs,
3050 				oh->prcm.omap4.rstctrl_offs,
3051 				oh->prcm.omap4.rstst_offs);
3052 }
3053 
3054 /**
3055  * _am33xx_is_hardreset_asserted - call AM33XX PRM hardreset fn with hwmod args
3056  * @oh: struct omap_hwmod * to test hardreset
3057  * @ohri: hardreset line data
3058  *
3059  * Call am33xx_prminst_is_hardreset_asserted() with parameters
3060  * extracted from the hwmod @oh and the hardreset line data @ohri.
3061  * Only intended for use as an soc_ops function pointer.  Passes along
3062  * the return value from am33xx_prminst_is_hardreset_asserted().  XXX
3063  * This function is scheduled for removal when the PRM code is moved
3064  * into drivers/.
3065  */
3066 static int _am33xx_is_hardreset_asserted(struct omap_hwmod *oh,
3067 					struct omap_hwmod_rst_info *ohri)
3068 {
3069 	return am33xx_prm_is_hardreset_asserted(ohri->rst_shift,
3070 				oh->clkdm->pwrdm.ptr->prcm_offs,
3071 				oh->prcm.omap4.rstctrl_offs);
3072 }
3073 
3074 /* Public functions */
3075 
3076 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
3077 {
3078 	if (oh->flags & HWMOD_16BIT_REG)
3079 		return __raw_readw(oh->_mpu_rt_va + reg_offs);
3080 	else
3081 		return __raw_readl(oh->_mpu_rt_va + reg_offs);
3082 }
3083 
3084 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
3085 {
3086 	if (oh->flags & HWMOD_16BIT_REG)
3087 		__raw_writew(v, oh->_mpu_rt_va + reg_offs);
3088 	else
3089 		__raw_writel(v, oh->_mpu_rt_va + reg_offs);
3090 }
3091 
3092 /**
3093  * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
3094  * @oh: struct omap_hwmod *
3095  *
3096  * This is a public function exposed to drivers. Some drivers may need to do
3097  * some settings before and after resetting the device.  Those drivers after
3098  * doing the necessary settings could use this function to start a reset by
3099  * setting the SYSCONFIG.SOFTRESET bit.
3100  */
3101 int omap_hwmod_softreset(struct omap_hwmod *oh)
3102 {
3103 	u32 v;
3104 	int ret;
3105 
3106 	if (!oh || !(oh->_sysc_cache))
3107 		return -EINVAL;
3108 
3109 	v = oh->_sysc_cache;
3110 	ret = _set_softreset(oh, &v);
3111 	if (ret)
3112 		goto error;
3113 	_write_sysconfig(v, oh);
3114 
3115 error:
3116 	return ret;
3117 }
3118 
3119 /**
3120  * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
3121  * @oh: struct omap_hwmod *
3122  * @idlemode: SIDLEMODE field bits (shifted to bit 0)
3123  *
3124  * Sets the IP block's OCP slave idlemode in hardware, and updates our
3125  * local copy.  Intended to be used by drivers that have some erratum
3126  * that requires direct manipulation of the SIDLEMODE bits.  Returns
3127  * -EINVAL if @oh is null, or passes along the return value from
3128  * _set_slave_idlemode().
3129  *
3130  * XXX Does this function have any current users?  If not, we should
3131  * remove it; it is better to let the rest of the hwmod code handle this.
3132  * Any users of this function should be scrutinized carefully.
3133  */
3134 int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
3135 {
3136 	u32 v;
3137 	int retval = 0;
3138 
3139 	if (!oh)
3140 		return -EINVAL;
3141 
3142 	v = oh->_sysc_cache;
3143 
3144 	retval = _set_slave_idlemode(oh, idlemode, &v);
3145 	if (!retval)
3146 		_write_sysconfig(v, oh);
3147 
3148 	return retval;
3149 }
3150 
3151 /**
3152  * omap_hwmod_lookup - look up a registered omap_hwmod by name
3153  * @name: name of the omap_hwmod to look up
3154  *
3155  * Given a @name of an omap_hwmod, return a pointer to the registered
3156  * struct omap_hwmod *, or NULL upon error.
3157  */
3158 struct omap_hwmod *omap_hwmod_lookup(const char *name)
3159 {
3160 	struct omap_hwmod *oh;
3161 
3162 	if (!name)
3163 		return NULL;
3164 
3165 	oh = _lookup(name);
3166 
3167 	return oh;
3168 }
3169 
3170 /**
3171  * omap_hwmod_for_each - call function for each registered omap_hwmod
3172  * @fn: pointer to a callback function
3173  * @data: void * data to pass to callback function
3174  *
3175  * Call @fn for each registered omap_hwmod, passing @data to each
3176  * function.  @fn must return 0 for success or any other value for
3177  * failure.  If @fn returns non-zero, the iteration across omap_hwmods
3178  * will stop and the non-zero return value will be passed to the
3179  * caller of omap_hwmod_for_each().  @fn is called with
3180  * omap_hwmod_for_each() held.
3181  */
3182 int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
3183 			void *data)
3184 {
3185 	struct omap_hwmod *temp_oh;
3186 	int ret = 0;
3187 
3188 	if (!fn)
3189 		return -EINVAL;
3190 
3191 	list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3192 		ret = (*fn)(temp_oh, data);
3193 		if (ret)
3194 			break;
3195 	}
3196 
3197 	return ret;
3198 }
3199 
3200 /**
3201  * omap_hwmod_register_links - register an array of hwmod links
3202  * @ois: pointer to an array of omap_hwmod_ocp_if to register
3203  *
3204  * Intended to be called early in boot before the clock framework is
3205  * initialized.  If @ois is not null, will register all omap_hwmods
3206  * listed in @ois that are valid for this chip.  Returns -EINVAL if
3207  * omap_hwmod_init() hasn't been called before calling this function,
3208  * -ENOMEM if the link memory area can't be allocated, or 0 upon
3209  * success.
3210  */
3211 int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
3212 {
3213 	int r, i;
3214 
3215 	if (!inited)
3216 		return -EINVAL;
3217 
3218 	if (!ois)
3219 		return 0;
3220 
3221 	if (!linkspace) {
3222 		if (_alloc_linkspace(ois)) {
3223 			pr_err("omap_hwmod: could not allocate link space\n");
3224 			return -ENOMEM;
3225 		}
3226 	}
3227 
3228 	i = 0;
3229 	do {
3230 		r = _register_link(ois[i]);
3231 		WARN(r && r != -EEXIST,
3232 		     "omap_hwmod: _register_link(%s -> %s) returned %d\n",
3233 		     ois[i]->master->name, ois[i]->slave->name, r);
3234 	} while (ois[++i]);
3235 
3236 	return 0;
3237 }
3238 
3239 /**
3240  * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
3241  * @oh: pointer to the hwmod currently being set up (usually not the MPU)
3242  *
3243  * If the hwmod data corresponding to the MPU subsystem IP block
3244  * hasn't been initialized and set up yet, do so now.  This must be
3245  * done first since sleep dependencies may be added from other hwmods
3246  * to the MPU.  Intended to be called only by omap_hwmod_setup*().  No
3247  * return value.
3248  */
3249 static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
3250 {
3251 	if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
3252 		pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
3253 		       __func__, MPU_INITIATOR_NAME);
3254 	else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
3255 		omap_hwmod_setup_one(MPU_INITIATOR_NAME);
3256 }
3257 
3258 /**
3259  * omap_hwmod_setup_one - set up a single hwmod
3260  * @oh_name: const char * name of the already-registered hwmod to set up
3261  *
3262  * Initialize and set up a single hwmod.  Intended to be used for a
3263  * small number of early devices, such as the timer IP blocks used for
3264  * the scheduler clock.  Must be called after omap2_clk_init().
3265  * Resolves the struct clk names to struct clk pointers for each
3266  * registered omap_hwmod.  Also calls _setup() on each hwmod.  Returns
3267  * -EINVAL upon error or 0 upon success.
3268  */
3269 int __init omap_hwmod_setup_one(const char *oh_name)
3270 {
3271 	struct omap_hwmod *oh;
3272 
3273 	pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
3274 
3275 	oh = _lookup(oh_name);
3276 	if (!oh) {
3277 		WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
3278 		return -EINVAL;
3279 	}
3280 
3281 	_ensure_mpu_hwmod_is_setup(oh);
3282 
3283 	_init(oh, NULL);
3284 	_setup(oh, NULL);
3285 
3286 	return 0;
3287 }
3288 
3289 /**
3290  * omap_hwmod_setup_all - set up all registered IP blocks
3291  *
3292  * Initialize and set up all IP blocks registered with the hwmod code.
3293  * Must be called after omap2_clk_init().  Resolves the struct clk
3294  * names to struct clk pointers for each registered omap_hwmod.  Also
3295  * calls _setup() on each hwmod.  Returns 0 upon success.
3296  */
3297 static int __init omap_hwmod_setup_all(void)
3298 {
3299 	_ensure_mpu_hwmod_is_setup(NULL);
3300 
3301 	omap_hwmod_for_each(_init, NULL);
3302 	omap_hwmod_for_each(_setup, NULL);
3303 
3304 	return 0;
3305 }
3306 core_initcall(omap_hwmod_setup_all);
3307 
3308 /**
3309  * omap_hwmod_enable - enable an omap_hwmod
3310  * @oh: struct omap_hwmod *
3311  *
3312  * Enable an omap_hwmod @oh.  Intended to be called by omap_device_enable().
3313  * Returns -EINVAL on error or passes along the return value from _enable().
3314  */
3315 int omap_hwmod_enable(struct omap_hwmod *oh)
3316 {
3317 	int r;
3318 	unsigned long flags;
3319 
3320 	if (!oh)
3321 		return -EINVAL;
3322 
3323 	spin_lock_irqsave(&oh->_lock, flags);
3324 	r = _enable(oh);
3325 	spin_unlock_irqrestore(&oh->_lock, flags);
3326 
3327 	return r;
3328 }
3329 
3330 /**
3331  * omap_hwmod_idle - idle an omap_hwmod
3332  * @oh: struct omap_hwmod *
3333  *
3334  * Idle an omap_hwmod @oh.  Intended to be called by omap_device_idle().
3335  * Returns -EINVAL on error or passes along the return value from _idle().
3336  */
3337 int omap_hwmod_idle(struct omap_hwmod *oh)
3338 {
3339 	unsigned long flags;
3340 
3341 	if (!oh)
3342 		return -EINVAL;
3343 
3344 	spin_lock_irqsave(&oh->_lock, flags);
3345 	_idle(oh);
3346 	spin_unlock_irqrestore(&oh->_lock, flags);
3347 
3348 	return 0;
3349 }
3350 
3351 /**
3352  * omap_hwmod_shutdown - shutdown an omap_hwmod
3353  * @oh: struct omap_hwmod *
3354  *
3355  * Shutdown an omap_hwmod @oh.  Intended to be called by
3356  * omap_device_shutdown().  Returns -EINVAL on error or passes along
3357  * the return value from _shutdown().
3358  */
3359 int omap_hwmod_shutdown(struct omap_hwmod *oh)
3360 {
3361 	unsigned long flags;
3362 
3363 	if (!oh)
3364 		return -EINVAL;
3365 
3366 	spin_lock_irqsave(&oh->_lock, flags);
3367 	_shutdown(oh);
3368 	spin_unlock_irqrestore(&oh->_lock, flags);
3369 
3370 	return 0;
3371 }
3372 
3373 /**
3374  * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
3375  * @oh: struct omap_hwmod *oh
3376  *
3377  * Intended to be called by the omap_device code.
3378  */
3379 int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
3380 {
3381 	unsigned long flags;
3382 
3383 	spin_lock_irqsave(&oh->_lock, flags);
3384 	_enable_clocks(oh);
3385 	spin_unlock_irqrestore(&oh->_lock, flags);
3386 
3387 	return 0;
3388 }
3389 
3390 /**
3391  * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
3392  * @oh: struct omap_hwmod *oh
3393  *
3394  * Intended to be called by the omap_device code.
3395  */
3396 int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
3397 {
3398 	unsigned long flags;
3399 
3400 	spin_lock_irqsave(&oh->_lock, flags);
3401 	_disable_clocks(oh);
3402 	spin_unlock_irqrestore(&oh->_lock, flags);
3403 
3404 	return 0;
3405 }
3406 
3407 /**
3408  * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
3409  * @oh: struct omap_hwmod *oh
3410  *
3411  * Intended to be called by drivers and core code when all posted
3412  * writes to a device must complete before continuing further
3413  * execution (for example, after clearing some device IRQSTATUS
3414  * register bits)
3415  *
3416  * XXX what about targets with multiple OCP threads?
3417  */
3418 void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
3419 {
3420 	BUG_ON(!oh);
3421 
3422 	if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
3423 		WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n",
3424 			oh->name);
3425 		return;
3426 	}
3427 
3428 	/*
3429 	 * Forces posted writes to complete on the OCP thread handling
3430 	 * register writes
3431 	 */
3432 	omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
3433 }
3434 
3435 /**
3436  * omap_hwmod_reset - reset the hwmod
3437  * @oh: struct omap_hwmod *
3438  *
3439  * Under some conditions, a driver may wish to reset the entire device.
3440  * Called from omap_device code.  Returns -EINVAL on error or passes along
3441  * the return value from _reset().
3442  */
3443 int omap_hwmod_reset(struct omap_hwmod *oh)
3444 {
3445 	int r;
3446 	unsigned long flags;
3447 
3448 	if (!oh)
3449 		return -EINVAL;
3450 
3451 	spin_lock_irqsave(&oh->_lock, flags);
3452 	r = _reset(oh);
3453 	spin_unlock_irqrestore(&oh->_lock, flags);
3454 
3455 	return r;
3456 }
3457 
3458 /*
3459  * IP block data retrieval functions
3460  */
3461 
3462 /**
3463  * omap_hwmod_count_resources - count number of struct resources needed by hwmod
3464  * @oh: struct omap_hwmod *
3465  * @flags: Type of resources to include when counting (IRQ/DMA/MEM)
3466  *
3467  * Count the number of struct resource array elements necessary to
3468  * contain omap_hwmod @oh resources.  Intended to be called by code
3469  * that registers omap_devices.  Intended to be used to determine the
3470  * size of a dynamically-allocated struct resource array, before
3471  * calling omap_hwmod_fill_resources().  Returns the number of struct
3472  * resource array elements needed.
3473  *
3474  * XXX This code is not optimized.  It could attempt to merge adjacent
3475  * resource IDs.
3476  *
3477  */
3478 int omap_hwmod_count_resources(struct omap_hwmod *oh, unsigned long flags)
3479 {
3480 	int ret = 0;
3481 
3482 	if (flags & IORESOURCE_IRQ)
3483 		ret += _count_mpu_irqs(oh);
3484 
3485 	if (flags & IORESOURCE_DMA)
3486 		ret += _count_sdma_reqs(oh);
3487 
3488 	if (flags & IORESOURCE_MEM) {
3489 		int i = 0;
3490 		struct omap_hwmod_ocp_if *os;
3491 		struct list_head *p = oh->slave_ports.next;
3492 
3493 		while (i < oh->slaves_cnt) {
3494 			os = _fetch_next_ocp_if(&p, &i);
3495 			ret += _count_ocp_if_addr_spaces(os);
3496 		}
3497 	}
3498 
3499 	return ret;
3500 }
3501 
3502 /**
3503  * omap_hwmod_fill_resources - fill struct resource array with hwmod data
3504  * @oh: struct omap_hwmod *
3505  * @res: pointer to the first element of an array of struct resource to fill
3506  *
3507  * Fill the struct resource array @res with resource data from the
3508  * omap_hwmod @oh.  Intended to be called by code that registers
3509  * omap_devices.  See also omap_hwmod_count_resources().  Returns the
3510  * number of array elements filled.
3511  */
3512 int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
3513 {
3514 	struct omap_hwmod_ocp_if *os;
3515 	struct list_head *p;
3516 	int i, j, mpu_irqs_cnt, sdma_reqs_cnt, addr_cnt;
3517 	int r = 0;
3518 
3519 	/* For each IRQ, DMA, memory area, fill in array.*/
3520 
3521 	mpu_irqs_cnt = _count_mpu_irqs(oh);
3522 	for (i = 0; i < mpu_irqs_cnt; i++) {
3523 		(res + r)->name = (oh->mpu_irqs + i)->name;
3524 		(res + r)->start = (oh->mpu_irqs + i)->irq;
3525 		(res + r)->end = (oh->mpu_irqs + i)->irq;
3526 		(res + r)->flags = IORESOURCE_IRQ;
3527 		r++;
3528 	}
3529 
3530 	sdma_reqs_cnt = _count_sdma_reqs(oh);
3531 	for (i = 0; i < sdma_reqs_cnt; i++) {
3532 		(res + r)->name = (oh->sdma_reqs + i)->name;
3533 		(res + r)->start = (oh->sdma_reqs + i)->dma_req;
3534 		(res + r)->end = (oh->sdma_reqs + i)->dma_req;
3535 		(res + r)->flags = IORESOURCE_DMA;
3536 		r++;
3537 	}
3538 
3539 	p = oh->slave_ports.next;
3540 
3541 	i = 0;
3542 	while (i < oh->slaves_cnt) {
3543 		os = _fetch_next_ocp_if(&p, &i);
3544 		addr_cnt = _count_ocp_if_addr_spaces(os);
3545 
3546 		for (j = 0; j < addr_cnt; j++) {
3547 			(res + r)->name = (os->addr + j)->name;
3548 			(res + r)->start = (os->addr + j)->pa_start;
3549 			(res + r)->end = (os->addr + j)->pa_end;
3550 			(res + r)->flags = IORESOURCE_MEM;
3551 			r++;
3552 		}
3553 	}
3554 
3555 	return r;
3556 }
3557 
3558 /**
3559  * omap_hwmod_fill_dma_resources - fill struct resource array with dma data
3560  * @oh: struct omap_hwmod *
3561  * @res: pointer to the array of struct resource to fill
3562  *
3563  * Fill the struct resource array @res with dma resource data from the
3564  * omap_hwmod @oh.  Intended to be called by code that registers
3565  * omap_devices.  See also omap_hwmod_count_resources().  Returns the
3566  * number of array elements filled.
3567  */
3568 int omap_hwmod_fill_dma_resources(struct omap_hwmod *oh, struct resource *res)
3569 {
3570 	int i, sdma_reqs_cnt;
3571 	int r = 0;
3572 
3573 	sdma_reqs_cnt = _count_sdma_reqs(oh);
3574 	for (i = 0; i < sdma_reqs_cnt; i++) {
3575 		(res + r)->name = (oh->sdma_reqs + i)->name;
3576 		(res + r)->start = (oh->sdma_reqs + i)->dma_req;
3577 		(res + r)->end = (oh->sdma_reqs + i)->dma_req;
3578 		(res + r)->flags = IORESOURCE_DMA;
3579 		r++;
3580 	}
3581 
3582 	return r;
3583 }
3584 
3585 /**
3586  * omap_hwmod_get_resource_byname - fetch IP block integration data by name
3587  * @oh: struct omap_hwmod * to operate on
3588  * @type: one of the IORESOURCE_* constants from include/linux/ioport.h
3589  * @name: pointer to the name of the data to fetch (optional)
3590  * @rsrc: pointer to a struct resource, allocated by the caller
3591  *
3592  * Retrieve MPU IRQ, SDMA request line, or address space start/end
3593  * data for the IP block pointed to by @oh.  The data will be filled
3594  * into a struct resource record pointed to by @rsrc.  The struct
3595  * resource must be allocated by the caller.  When @name is non-null,
3596  * the data associated with the matching entry in the IRQ/SDMA/address
3597  * space hwmod data arrays will be returned.  If @name is null, the
3598  * first array entry will be returned.  Data order is not meaningful
3599  * in hwmod data, so callers are strongly encouraged to use a non-null
3600  * @name whenever possible to avoid unpredictable effects if hwmod
3601  * data is later added that causes data ordering to change.  This
3602  * function is only intended for use by OMAP core code.  Device
3603  * drivers should not call this function - the appropriate bus-related
3604  * data accessor functions should be used instead.  Returns 0 upon
3605  * success or a negative error code upon error.
3606  */
3607 int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
3608 				   const char *name, struct resource *rsrc)
3609 {
3610 	int r;
3611 	unsigned int irq, dma;
3612 	u32 pa_start, pa_end;
3613 
3614 	if (!oh || !rsrc)
3615 		return -EINVAL;
3616 
3617 	if (type == IORESOURCE_IRQ) {
3618 		r = _get_mpu_irq_by_name(oh, name, &irq);
3619 		if (r)
3620 			return r;
3621 
3622 		rsrc->start = irq;
3623 		rsrc->end = irq;
3624 	} else if (type == IORESOURCE_DMA) {
3625 		r = _get_sdma_req_by_name(oh, name, &dma);
3626 		if (r)
3627 			return r;
3628 
3629 		rsrc->start = dma;
3630 		rsrc->end = dma;
3631 	} else if (type == IORESOURCE_MEM) {
3632 		r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end);
3633 		if (r)
3634 			return r;
3635 
3636 		rsrc->start = pa_start;
3637 		rsrc->end = pa_end;
3638 	} else {
3639 		return -EINVAL;
3640 	}
3641 
3642 	rsrc->flags = type;
3643 	rsrc->name = name;
3644 
3645 	return 0;
3646 }
3647 
3648 /**
3649  * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
3650  * @oh: struct omap_hwmod *
3651  *
3652  * Return the powerdomain pointer associated with the OMAP module
3653  * @oh's main clock.  If @oh does not have a main clk, return the
3654  * powerdomain associated with the interface clock associated with the
3655  * module's MPU port. (XXX Perhaps this should use the SDMA port
3656  * instead?)  Returns NULL on error, or a struct powerdomain * on
3657  * success.
3658  */
3659 struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
3660 {
3661 	struct clk *c;
3662 	struct omap_hwmod_ocp_if *oi;
3663 	struct clockdomain *clkdm;
3664 	struct clk_hw_omap *clk;
3665 
3666 	if (!oh)
3667 		return NULL;
3668 
3669 	if (oh->clkdm)
3670 		return oh->clkdm->pwrdm.ptr;
3671 
3672 	if (oh->_clk) {
3673 		c = oh->_clk;
3674 	} else {
3675 		oi = _find_mpu_rt_port(oh);
3676 		if (!oi)
3677 			return NULL;
3678 		c = oi->_clk;
3679 	}
3680 
3681 	clk = to_clk_hw_omap(__clk_get_hw(c));
3682 	clkdm = clk->clkdm;
3683 	if (!clkdm)
3684 		return NULL;
3685 
3686 	return clkdm->pwrdm.ptr;
3687 }
3688 
3689 /**
3690  * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
3691  * @oh: struct omap_hwmod *
3692  *
3693  * Returns the virtual address corresponding to the beginning of the
3694  * module's register target, in the address range that is intended to
3695  * be used by the MPU.  Returns the virtual address upon success or NULL
3696  * upon error.
3697  */
3698 void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
3699 {
3700 	if (!oh)
3701 		return NULL;
3702 
3703 	if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
3704 		return NULL;
3705 
3706 	if (oh->_state == _HWMOD_STATE_UNKNOWN)
3707 		return NULL;
3708 
3709 	return oh->_mpu_rt_va;
3710 }
3711 
3712 /**
3713  * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
3714  * @oh: struct omap_hwmod *
3715  * @init_oh: struct omap_hwmod * (initiator)
3716  *
3717  * Add a sleep dependency between the initiator @init_oh and @oh.
3718  * Intended to be called by DSP/Bridge code via platform_data for the
3719  * DSP case; and by the DMA code in the sDMA case.  DMA code, *Bridge
3720  * code needs to add/del initiator dependencies dynamically
3721  * before/after accessing a device.  Returns the return value from
3722  * _add_initiator_dep().
3723  *
3724  * XXX Keep a usecount in the clockdomain code
3725  */
3726 int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
3727 				 struct omap_hwmod *init_oh)
3728 {
3729 	return _add_initiator_dep(oh, init_oh);
3730 }
3731 
3732 /*
3733  * XXX what about functions for drivers to save/restore ocp_sysconfig
3734  * for context save/restore operations?
3735  */
3736 
3737 /**
3738  * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
3739  * @oh: struct omap_hwmod *
3740  * @init_oh: struct omap_hwmod * (initiator)
3741  *
3742  * Remove a sleep dependency between the initiator @init_oh and @oh.
3743  * Intended to be called by DSP/Bridge code via platform_data for the
3744  * DSP case; and by the DMA code in the sDMA case.  DMA code, *Bridge
3745  * code needs to add/del initiator dependencies dynamically
3746  * before/after accessing a device.  Returns the return value from
3747  * _del_initiator_dep().
3748  *
3749  * XXX Keep a usecount in the clockdomain code
3750  */
3751 int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
3752 				 struct omap_hwmod *init_oh)
3753 {
3754 	return _del_initiator_dep(oh, init_oh);
3755 }
3756 
3757 /**
3758  * omap_hwmod_enable_wakeup - allow device to wake up the system
3759  * @oh: struct omap_hwmod *
3760  *
3761  * Sets the module OCP socket ENAWAKEUP bit to allow the module to
3762  * send wakeups to the PRCM, and enable I/O ring wakeup events for
3763  * this IP block if it has dynamic mux entries.  Eventually this
3764  * should set PRCM wakeup registers to cause the PRCM to receive
3765  * wakeup events from the module.  Does not set any wakeup routing
3766  * registers beyond this point - if the module is to wake up any other
3767  * module or subsystem, that must be set separately.  Called by
3768  * omap_device code.  Returns -EINVAL on error or 0 upon success.
3769  */
3770 int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
3771 {
3772 	unsigned long flags;
3773 	u32 v;
3774 
3775 	spin_lock_irqsave(&oh->_lock, flags);
3776 
3777 	if (oh->class->sysc &&
3778 	    (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3779 		v = oh->_sysc_cache;
3780 		_enable_wakeup(oh, &v);
3781 		_write_sysconfig(v, oh);
3782 	}
3783 
3784 	_set_idle_ioring_wakeup(oh, true);
3785 	spin_unlock_irqrestore(&oh->_lock, flags);
3786 
3787 	return 0;
3788 }
3789 
3790 /**
3791  * omap_hwmod_disable_wakeup - prevent device from waking the system
3792  * @oh: struct omap_hwmod *
3793  *
3794  * Clears the module OCP socket ENAWAKEUP bit to prevent the module
3795  * from sending wakeups to the PRCM, and disable I/O ring wakeup
3796  * events for this IP block if it has dynamic mux entries.  Eventually
3797  * this should clear PRCM wakeup registers to cause the PRCM to ignore
3798  * wakeup events from the module.  Does not set any wakeup routing
3799  * registers beyond this point - if the module is to wake up any other
3800  * module or subsystem, that must be set separately.  Called by
3801  * omap_device code.  Returns -EINVAL on error or 0 upon success.
3802  */
3803 int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
3804 {
3805 	unsigned long flags;
3806 	u32 v;
3807 
3808 	spin_lock_irqsave(&oh->_lock, flags);
3809 
3810 	if (oh->class->sysc &&
3811 	    (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
3812 		v = oh->_sysc_cache;
3813 		_disable_wakeup(oh, &v);
3814 		_write_sysconfig(v, oh);
3815 	}
3816 
3817 	_set_idle_ioring_wakeup(oh, false);
3818 	spin_unlock_irqrestore(&oh->_lock, flags);
3819 
3820 	return 0;
3821 }
3822 
3823 /**
3824  * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
3825  * contained in the hwmod module.
3826  * @oh: struct omap_hwmod *
3827  * @name: name of the reset line to lookup and assert
3828  *
3829  * Some IP like dsp, ipu or iva contain processor that require
3830  * an HW reset line to be assert / deassert in order to enable fully
3831  * the IP.  Returns -EINVAL if @oh is null or if the operation is not
3832  * yet supported on this OMAP; otherwise, passes along the return value
3833  * from _assert_hardreset().
3834  */
3835 int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
3836 {
3837 	int ret;
3838 	unsigned long flags;
3839 
3840 	if (!oh)
3841 		return -EINVAL;
3842 
3843 	spin_lock_irqsave(&oh->_lock, flags);
3844 	ret = _assert_hardreset(oh, name);
3845 	spin_unlock_irqrestore(&oh->_lock, flags);
3846 
3847 	return ret;
3848 }
3849 
3850 /**
3851  * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
3852  * contained in the hwmod module.
3853  * @oh: struct omap_hwmod *
3854  * @name: name of the reset line to look up and deassert
3855  *
3856  * Some IP like dsp, ipu or iva contain processor that require
3857  * an HW reset line to be assert / deassert in order to enable fully
3858  * the IP.  Returns -EINVAL if @oh is null or if the operation is not
3859  * yet supported on this OMAP; otherwise, passes along the return value
3860  * from _deassert_hardreset().
3861  */
3862 int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
3863 {
3864 	int ret;
3865 	unsigned long flags;
3866 
3867 	if (!oh)
3868 		return -EINVAL;
3869 
3870 	spin_lock_irqsave(&oh->_lock, flags);
3871 	ret = _deassert_hardreset(oh, name);
3872 	spin_unlock_irqrestore(&oh->_lock, flags);
3873 
3874 	return ret;
3875 }
3876 
3877 /**
3878  * omap_hwmod_read_hardreset - read the HW reset line state of submodules
3879  * contained in the hwmod module
3880  * @oh: struct omap_hwmod *
3881  * @name: name of the reset line to look up and read
3882  *
3883  * Return the current state of the hwmod @oh's reset line named @name:
3884  * returns -EINVAL upon parameter error or if this operation
3885  * is unsupported on the current OMAP; otherwise, passes along the return
3886  * value from _read_hardreset().
3887  */
3888 int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
3889 {
3890 	int ret;
3891 	unsigned long flags;
3892 
3893 	if (!oh)
3894 		return -EINVAL;
3895 
3896 	spin_lock_irqsave(&oh->_lock, flags);
3897 	ret = _read_hardreset(oh, name);
3898 	spin_unlock_irqrestore(&oh->_lock, flags);
3899 
3900 	return ret;
3901 }
3902 
3903 
3904 /**
3905  * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
3906  * @classname: struct omap_hwmod_class name to search for
3907  * @fn: callback function pointer to call for each hwmod in class @classname
3908  * @user: arbitrary context data to pass to the callback function
3909  *
3910  * For each omap_hwmod of class @classname, call @fn.
3911  * If the callback function returns something other than
3912  * zero, the iterator is terminated, and the callback function's return
3913  * value is passed back to the caller.  Returns 0 upon success, -EINVAL
3914  * if @classname or @fn are NULL, or passes back the error code from @fn.
3915  */
3916 int omap_hwmod_for_each_by_class(const char *classname,
3917 				 int (*fn)(struct omap_hwmod *oh,
3918 					   void *user),
3919 				 void *user)
3920 {
3921 	struct omap_hwmod *temp_oh;
3922 	int ret = 0;
3923 
3924 	if (!classname || !fn)
3925 		return -EINVAL;
3926 
3927 	pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
3928 		 __func__, classname);
3929 
3930 	list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
3931 		if (!strcmp(temp_oh->class->name, classname)) {
3932 			pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
3933 				 __func__, temp_oh->name);
3934 			ret = (*fn)(temp_oh, user);
3935 			if (ret)
3936 				break;
3937 		}
3938 	}
3939 
3940 	if (ret)
3941 		pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
3942 			 __func__, ret);
3943 
3944 	return ret;
3945 }
3946 
3947 /**
3948  * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
3949  * @oh: struct omap_hwmod *
3950  * @state: state that _setup() should leave the hwmod in
3951  *
3952  * Sets the hwmod state that @oh will enter at the end of _setup()
3953  * (called by omap_hwmod_setup_*()).  See also the documentation
3954  * for _setup_postsetup(), above.  Returns 0 upon success or
3955  * -EINVAL if there is a problem with the arguments or if the hwmod is
3956  * in the wrong state.
3957  */
3958 int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
3959 {
3960 	int ret;
3961 	unsigned long flags;
3962 
3963 	if (!oh)
3964 		return -EINVAL;
3965 
3966 	if (state != _HWMOD_STATE_DISABLED &&
3967 	    state != _HWMOD_STATE_ENABLED &&
3968 	    state != _HWMOD_STATE_IDLE)
3969 		return -EINVAL;
3970 
3971 	spin_lock_irqsave(&oh->_lock, flags);
3972 
3973 	if (oh->_state != _HWMOD_STATE_REGISTERED) {
3974 		ret = -EINVAL;
3975 		goto ohsps_unlock;
3976 	}
3977 
3978 	oh->_postsetup_state = state;
3979 	ret = 0;
3980 
3981 ohsps_unlock:
3982 	spin_unlock_irqrestore(&oh->_lock, flags);
3983 
3984 	return ret;
3985 }
3986 
3987 /**
3988  * omap_hwmod_get_context_loss_count - get lost context count
3989  * @oh: struct omap_hwmod *
3990  *
3991  * Returns the context loss count of associated @oh
3992  * upon success, or zero if no context loss data is available.
3993  *
3994  * On OMAP4, this queries the per-hwmod context loss register,
3995  * assuming one exists.  If not, or on OMAP2/3, this queries the
3996  * enclosing powerdomain context loss count.
3997  */
3998 int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
3999 {
4000 	struct powerdomain *pwrdm;
4001 	int ret = 0;
4002 
4003 	if (soc_ops.get_context_lost)
4004 		return soc_ops.get_context_lost(oh);
4005 
4006 	pwrdm = omap_hwmod_get_pwrdm(oh);
4007 	if (pwrdm)
4008 		ret = pwrdm_get_context_loss_count(pwrdm);
4009 
4010 	return ret;
4011 }
4012 
4013 /**
4014  * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
4015  * @oh: struct omap_hwmod *
4016  *
4017  * Prevent the hwmod @oh from being reset during the setup process.
4018  * Intended for use by board-*.c files on boards with devices that
4019  * cannot tolerate being reset.  Must be called before the hwmod has
4020  * been set up.  Returns 0 upon success or negative error code upon
4021  * failure.
4022  */
4023 int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
4024 {
4025 	if (!oh)
4026 		return -EINVAL;
4027 
4028 	if (oh->_state != _HWMOD_STATE_REGISTERED) {
4029 		pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
4030 			oh->name);
4031 		return -EINVAL;
4032 	}
4033 
4034 	oh->flags |= HWMOD_INIT_NO_RESET;
4035 
4036 	return 0;
4037 }
4038 
4039 /**
4040  * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ
4041  * @oh: struct omap_hwmod * containing hwmod mux entries
4042  * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup
4043  * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup
4044  *
4045  * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux
4046  * entry number @pad_idx for the hwmod @oh, trigger the interrupt
4047  * service routine for the hwmod's mpu_irqs array index @irq_idx.  If
4048  * this function is not called for a given pad_idx, then the ISR
4049  * associated with @oh's first MPU IRQ will be triggered when an I/O
4050  * pad wakeup occurs on that pad.  Note that @pad_idx is the index of
4051  * the _dynamic or wakeup_ entry: if there are other entries not
4052  * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these
4053  * entries are NOT COUNTED in the dynamic pad index.  This function
4054  * must be called separately for each pad that requires its interrupt
4055  * to be re-routed this way.  Returns -EINVAL if there is an argument
4056  * problem or if @oh does not have hwmod mux entries or MPU IRQs;
4057  * returns -ENOMEM if memory cannot be allocated; or 0 upon success.
4058  *
4059  * XXX This function interface is fragile.  Rather than using array
4060  * indexes, which are subject to unpredictable change, it should be
4061  * using hwmod IRQ names, and some other stable key for the hwmod mux
4062  * pad records.
4063  */
4064 int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
4065 {
4066 	int nr_irqs;
4067 
4068 	might_sleep();
4069 
4070 	if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 ||
4071 	    pad_idx >= oh->mux->nr_pads_dynamic)
4072 		return -EINVAL;
4073 
4074 	/* Check the number of available mpu_irqs */
4075 	for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++)
4076 		;
4077 
4078 	if (irq_idx >= nr_irqs)
4079 		return -EINVAL;
4080 
4081 	if (!oh->mux->irqs) {
4082 		/* XXX What frees this? */
4083 		oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic,
4084 			GFP_KERNEL);
4085 		if (!oh->mux->irqs)
4086 			return -ENOMEM;
4087 	}
4088 	oh->mux->irqs[pad_idx] = irq_idx;
4089 
4090 	return 0;
4091 }
4092 
4093 /**
4094  * omap_hwmod_init - initialize the hwmod code
4095  *
4096  * Sets up some function pointers needed by the hwmod code to operate on the
4097  * currently-booted SoC.  Intended to be called once during kernel init
4098  * before any hwmods are registered.  No return value.
4099  */
4100 void __init omap_hwmod_init(void)
4101 {
4102 	if (cpu_is_omap24xx()) {
4103 		soc_ops.wait_target_ready = _omap2xxx_wait_target_ready;
4104 		soc_ops.assert_hardreset = _omap2_assert_hardreset;
4105 		soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
4106 		soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
4107 	} else if (cpu_is_omap34xx()) {
4108 		soc_ops.wait_target_ready = _omap3xxx_wait_target_ready;
4109 		soc_ops.assert_hardreset = _omap2_assert_hardreset;
4110 		soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
4111 		soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
4112 	} else if (cpu_is_omap44xx() || soc_is_omap54xx()) {
4113 		soc_ops.enable_module = _omap4_enable_module;
4114 		soc_ops.disable_module = _omap4_disable_module;
4115 		soc_ops.wait_target_ready = _omap4_wait_target_ready;
4116 		soc_ops.assert_hardreset = _omap4_assert_hardreset;
4117 		soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
4118 		soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
4119 		soc_ops.init_clkdm = _init_clkdm;
4120 		soc_ops.update_context_lost = _omap4_update_context_lost;
4121 		soc_ops.get_context_lost = _omap4_get_context_lost;
4122 	} else if (soc_is_am33xx()) {
4123 		soc_ops.enable_module = _am33xx_enable_module;
4124 		soc_ops.disable_module = _am33xx_disable_module;
4125 		soc_ops.wait_target_ready = _am33xx_wait_target_ready;
4126 		soc_ops.assert_hardreset = _am33xx_assert_hardreset;
4127 		soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
4128 		soc_ops.is_hardreset_asserted = _am33xx_is_hardreset_asserted;
4129 		soc_ops.init_clkdm = _init_clkdm;
4130 	} else {
4131 		WARN(1, "omap_hwmod: unknown SoC type\n");
4132 	}
4133 
4134 	inited = true;
4135 }
4136 
4137 /**
4138  * omap_hwmod_get_main_clk - get pointer to main clock name
4139  * @oh: struct omap_hwmod *
4140  *
4141  * Returns the main clock name assocated with @oh upon success,
4142  * or NULL if @oh is NULL.
4143  */
4144 const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh)
4145 {
4146 	if (!oh)
4147 		return NULL;
4148 
4149 	return oh->main_clk;
4150 }
4151