1 /* 2 * omap_hwmod implementation for OMAP2/3/4 3 * 4 * Copyright (C) 2009-2011 Nokia Corporation 5 * Copyright (C) 2011-2012 Texas Instruments, Inc. 6 * 7 * Paul Walmsley, Benoît Cousson, Kevin Hilman 8 * 9 * Created in collaboration with (alphabetical order): Thara Gopinath, 10 * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand 11 * Sawant, Santosh Shilimkar, Richard Woodruff 12 * 13 * This program is free software; you can redistribute it and/or modify 14 * it under the terms of the GNU General Public License version 2 as 15 * published by the Free Software Foundation. 16 * 17 * Introduction 18 * ------------ 19 * One way to view an OMAP SoC is as a collection of largely unrelated 20 * IP blocks connected by interconnects. The IP blocks include 21 * devices such as ARM processors, audio serial interfaces, UARTs, 22 * etc. Some of these devices, like the DSP, are created by TI; 23 * others, like the SGX, largely originate from external vendors. In 24 * TI's documentation, on-chip devices are referred to as "OMAP 25 * modules." Some of these IP blocks are identical across several 26 * OMAP versions. Others are revised frequently. 27 * 28 * These OMAP modules are tied together by various interconnects. 29 * Most of the address and data flow between modules is via OCP-based 30 * interconnects such as the L3 and L4 buses; but there are other 31 * interconnects that distribute the hardware clock tree, handle idle 32 * and reset signaling, supply power, and connect the modules to 33 * various pads or balls on the OMAP package. 34 * 35 * OMAP hwmod provides a consistent way to describe the on-chip 36 * hardware blocks and their integration into the rest of the chip. 37 * This description can be automatically generated from the TI 38 * hardware database. OMAP hwmod provides a standard, consistent API 39 * to reset, enable, idle, and disable these hardware blocks. And 40 * hwmod provides a way for other core code, such as the Linux device 41 * code or the OMAP power management and address space mapping code, 42 * to query the hardware database. 43 * 44 * Using hwmod 45 * ----------- 46 * Drivers won't call hwmod functions directly. That is done by the 47 * omap_device code, and in rare occasions, by custom integration code 48 * in arch/arm/ *omap*. The omap_device code includes functions to 49 * build a struct platform_device using omap_hwmod data, and that is 50 * currently how hwmod data is communicated to drivers and to the 51 * Linux driver model. Most drivers will call omap_hwmod functions only 52 * indirectly, via pm_runtime*() functions. 53 * 54 * From a layering perspective, here is where the OMAP hwmod code 55 * fits into the kernel software stack: 56 * 57 * +-------------------------------+ 58 * | Device driver code | 59 * | (e.g., drivers/) | 60 * +-------------------------------+ 61 * | Linux driver model | 62 * | (platform_device / | 63 * | platform_driver data/code) | 64 * +-------------------------------+ 65 * | OMAP core-driver integration | 66 * |(arch/arm/mach-omap2/devices.c)| 67 * +-------------------------------+ 68 * | omap_device code | 69 * | (../plat-omap/omap_device.c) | 70 * +-------------------------------+ 71 * ----> | omap_hwmod code/data | <----- 72 * | (../mach-omap2/omap_hwmod*) | 73 * +-------------------------------+ 74 * | OMAP clock/PRCM/register fns | 75 * | ({read,write}l_relaxed, clk*) | 76 * +-------------------------------+ 77 * 78 * Device drivers should not contain any OMAP-specific code or data in 79 * them. They should only contain code to operate the IP block that 80 * the driver is responsible for. This is because these IP blocks can 81 * also appear in other SoCs, either from TI (such as DaVinci) or from 82 * other manufacturers; and drivers should be reusable across other 83 * platforms. 84 * 85 * The OMAP hwmod code also will attempt to reset and idle all on-chip 86 * devices upon boot. The goal here is for the kernel to be 87 * completely self-reliant and independent from bootloaders. This is 88 * to ensure a repeatable configuration, both to ensure consistent 89 * runtime behavior, and to make it easier for others to reproduce 90 * bugs. 91 * 92 * OMAP module activity states 93 * --------------------------- 94 * The hwmod code considers modules to be in one of several activity 95 * states. IP blocks start out in an UNKNOWN state, then once they 96 * are registered via the hwmod code, proceed to the REGISTERED state. 97 * Once their clock names are resolved to clock pointers, the module 98 * enters the CLKS_INITED state; and finally, once the module has been 99 * reset and the integration registers programmed, the INITIALIZED state 100 * is entered. The hwmod code will then place the module into either 101 * the IDLE state to save power, or in the case of a critical system 102 * module, the ENABLED state. 103 * 104 * OMAP core integration code can then call omap_hwmod*() functions 105 * directly to move the module between the IDLE, ENABLED, and DISABLED 106 * states, as needed. This is done during both the PM idle loop, and 107 * in the OMAP core integration code's implementation of the PM runtime 108 * functions. 109 * 110 * References 111 * ---------- 112 * This is a partial list. 113 * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064) 114 * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090) 115 * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108) 116 * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140) 117 * - Open Core Protocol Specification 2.2 118 * 119 * To do: 120 * - handle IO mapping 121 * - bus throughput & module latency measurement code 122 * 123 * XXX add tests at the beginning of each function to ensure the hwmod is 124 * in the appropriate state 125 * XXX error return values should be checked to ensure that they are 126 * appropriate 127 */ 128 #undef DEBUG 129 130 #include <linux/kernel.h> 131 #include <linux/errno.h> 132 #include <linux/io.h> 133 #include <linux/clk.h> 134 #include <linux/clk-provider.h> 135 #include <linux/delay.h> 136 #include <linux/err.h> 137 #include <linux/list.h> 138 #include <linux/mutex.h> 139 #include <linux/spinlock.h> 140 #include <linux/slab.h> 141 #include <linux/bootmem.h> 142 #include <linux/cpu.h> 143 #include <linux/of.h> 144 #include <linux/of_address.h> 145 146 #include <asm/system_misc.h> 147 148 #include "clock.h" 149 #include "omap_hwmod.h" 150 151 #include "soc.h" 152 #include "common.h" 153 #include "clockdomain.h" 154 #include "powerdomain.h" 155 #include "cm2xxx.h" 156 #include "cm3xxx.h" 157 #include "cm33xx.h" 158 #include "prm.h" 159 #include "prm3xxx.h" 160 #include "prm44xx.h" 161 #include "prm33xx.h" 162 #include "prminst44xx.h" 163 #include "mux.h" 164 #include "pm.h" 165 166 /* Name of the OMAP hwmod for the MPU */ 167 #define MPU_INITIATOR_NAME "mpu" 168 169 /* 170 * Number of struct omap_hwmod_link records per struct 171 * omap_hwmod_ocp_if record (master->slave and slave->master) 172 */ 173 #define LINKS_PER_OCP_IF 2 174 175 /* 176 * Address offset (in bytes) between the reset control and the reset 177 * status registers: 4 bytes on OMAP4 178 */ 179 #define OMAP4_RST_CTRL_ST_OFFSET 4 180 181 /** 182 * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations 183 * @enable_module: function to enable a module (via MODULEMODE) 184 * @disable_module: function to disable a module (via MODULEMODE) 185 * 186 * XXX Eventually this functionality will be hidden inside the PRM/CM 187 * device drivers. Until then, this should avoid huge blocks of cpu_is_*() 188 * conditionals in this code. 189 */ 190 struct omap_hwmod_soc_ops { 191 void (*enable_module)(struct omap_hwmod *oh); 192 int (*disable_module)(struct omap_hwmod *oh); 193 int (*wait_target_ready)(struct omap_hwmod *oh); 194 int (*assert_hardreset)(struct omap_hwmod *oh, 195 struct omap_hwmod_rst_info *ohri); 196 int (*deassert_hardreset)(struct omap_hwmod *oh, 197 struct omap_hwmod_rst_info *ohri); 198 int (*is_hardreset_asserted)(struct omap_hwmod *oh, 199 struct omap_hwmod_rst_info *ohri); 200 int (*init_clkdm)(struct omap_hwmod *oh); 201 void (*update_context_lost)(struct omap_hwmod *oh); 202 int (*get_context_lost)(struct omap_hwmod *oh); 203 }; 204 205 /* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */ 206 static struct omap_hwmod_soc_ops soc_ops; 207 208 /* omap_hwmod_list contains all registered struct omap_hwmods */ 209 static LIST_HEAD(omap_hwmod_list); 210 211 /* mpu_oh: used to add/remove MPU initiator from sleepdep list */ 212 static struct omap_hwmod *mpu_oh; 213 214 /* io_chain_lock: used to serialize reconfigurations of the I/O chain */ 215 static DEFINE_SPINLOCK(io_chain_lock); 216 217 /* 218 * linkspace: ptr to a buffer that struct omap_hwmod_link records are 219 * allocated from - used to reduce the number of small memory 220 * allocations, which has a significant impact on performance 221 */ 222 static struct omap_hwmod_link *linkspace; 223 224 /* 225 * free_ls, max_ls: array indexes into linkspace; representing the 226 * next free struct omap_hwmod_link index, and the maximum number of 227 * struct omap_hwmod_link records allocated (respectively) 228 */ 229 static unsigned short free_ls, max_ls, ls_supp; 230 231 /* inited: set to true once the hwmod code is initialized */ 232 static bool inited; 233 234 /* Private functions */ 235 236 /** 237 * _fetch_next_ocp_if - return the next OCP interface in a list 238 * @p: ptr to a ptr to the list_head inside the ocp_if to return 239 * @i: pointer to the index of the element pointed to by @p in the list 240 * 241 * Return a pointer to the struct omap_hwmod_ocp_if record 242 * containing the struct list_head pointed to by @p, and increment 243 * @p such that a future call to this routine will return the next 244 * record. 245 */ 246 static struct omap_hwmod_ocp_if *_fetch_next_ocp_if(struct list_head **p, 247 int *i) 248 { 249 struct omap_hwmod_ocp_if *oi; 250 251 oi = list_entry(*p, struct omap_hwmod_link, node)->ocp_if; 252 *p = (*p)->next; 253 254 *i = *i + 1; 255 256 return oi; 257 } 258 259 /** 260 * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy 261 * @oh: struct omap_hwmod * 262 * 263 * Load the current value of the hwmod OCP_SYSCONFIG register into the 264 * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no 265 * OCP_SYSCONFIG register or 0 upon success. 266 */ 267 static int _update_sysc_cache(struct omap_hwmod *oh) 268 { 269 if (!oh->class->sysc) { 270 WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name); 271 return -EINVAL; 272 } 273 274 /* XXX ensure module interface clock is up */ 275 276 oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs); 277 278 if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE)) 279 oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED; 280 281 return 0; 282 } 283 284 /** 285 * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register 286 * @v: OCP_SYSCONFIG value to write 287 * @oh: struct omap_hwmod * 288 * 289 * Write @v into the module class' OCP_SYSCONFIG register, if it has 290 * one. No return value. 291 */ 292 static void _write_sysconfig(u32 v, struct omap_hwmod *oh) 293 { 294 if (!oh->class->sysc) { 295 WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name); 296 return; 297 } 298 299 /* XXX ensure module interface clock is up */ 300 301 /* Module might have lost context, always update cache and register */ 302 oh->_sysc_cache = v; 303 304 /* 305 * Some IP blocks (such as RTC) require unlocking of IP before 306 * accessing its registers. If a function pointer is present 307 * to unlock, then call it before accessing sysconfig and 308 * call lock after writing sysconfig. 309 */ 310 if (oh->class->unlock) 311 oh->class->unlock(oh); 312 313 omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs); 314 315 if (oh->class->lock) 316 oh->class->lock(oh); 317 } 318 319 /** 320 * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v 321 * @oh: struct omap_hwmod * 322 * @standbymode: MIDLEMODE field bits 323 * @v: pointer to register contents to modify 324 * 325 * Update the master standby mode bits in @v to be @standbymode for 326 * the @oh hwmod. Does not write to the hardware. Returns -EINVAL 327 * upon error or 0 upon success. 328 */ 329 static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode, 330 u32 *v) 331 { 332 u32 mstandby_mask; 333 u8 mstandby_shift; 334 335 if (!oh->class->sysc || 336 !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE)) 337 return -EINVAL; 338 339 if (!oh->class->sysc->sysc_fields) { 340 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); 341 return -EINVAL; 342 } 343 344 mstandby_shift = oh->class->sysc->sysc_fields->midle_shift; 345 mstandby_mask = (0x3 << mstandby_shift); 346 347 *v &= ~mstandby_mask; 348 *v |= __ffs(standbymode) << mstandby_shift; 349 350 return 0; 351 } 352 353 /** 354 * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v 355 * @oh: struct omap_hwmod * 356 * @idlemode: SIDLEMODE field bits 357 * @v: pointer to register contents to modify 358 * 359 * Update the slave idle mode bits in @v to be @idlemode for the @oh 360 * hwmod. Does not write to the hardware. Returns -EINVAL upon error 361 * or 0 upon success. 362 */ 363 static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v) 364 { 365 u32 sidle_mask; 366 u8 sidle_shift; 367 368 if (!oh->class->sysc || 369 !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE)) 370 return -EINVAL; 371 372 if (!oh->class->sysc->sysc_fields) { 373 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); 374 return -EINVAL; 375 } 376 377 sidle_shift = oh->class->sysc->sysc_fields->sidle_shift; 378 sidle_mask = (0x3 << sidle_shift); 379 380 *v &= ~sidle_mask; 381 *v |= __ffs(idlemode) << sidle_shift; 382 383 return 0; 384 } 385 386 /** 387 * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v 388 * @oh: struct omap_hwmod * 389 * @clockact: CLOCKACTIVITY field bits 390 * @v: pointer to register contents to modify 391 * 392 * Update the clockactivity mode bits in @v to be @clockact for the 393 * @oh hwmod. Used for additional powersaving on some modules. Does 394 * not write to the hardware. Returns -EINVAL upon error or 0 upon 395 * success. 396 */ 397 static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v) 398 { 399 u32 clkact_mask; 400 u8 clkact_shift; 401 402 if (!oh->class->sysc || 403 !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY)) 404 return -EINVAL; 405 406 if (!oh->class->sysc->sysc_fields) { 407 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); 408 return -EINVAL; 409 } 410 411 clkact_shift = oh->class->sysc->sysc_fields->clkact_shift; 412 clkact_mask = (0x3 << clkact_shift); 413 414 *v &= ~clkact_mask; 415 *v |= clockact << clkact_shift; 416 417 return 0; 418 } 419 420 /** 421 * _set_softreset: set OCP_SYSCONFIG.SOFTRESET bit in @v 422 * @oh: struct omap_hwmod * 423 * @v: pointer to register contents to modify 424 * 425 * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon 426 * error or 0 upon success. 427 */ 428 static int _set_softreset(struct omap_hwmod *oh, u32 *v) 429 { 430 u32 softrst_mask; 431 432 if (!oh->class->sysc || 433 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET)) 434 return -EINVAL; 435 436 if (!oh->class->sysc->sysc_fields) { 437 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); 438 return -EINVAL; 439 } 440 441 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift); 442 443 *v |= softrst_mask; 444 445 return 0; 446 } 447 448 /** 449 * _clear_softreset: clear OCP_SYSCONFIG.SOFTRESET bit in @v 450 * @oh: struct omap_hwmod * 451 * @v: pointer to register contents to modify 452 * 453 * Clear the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon 454 * error or 0 upon success. 455 */ 456 static int _clear_softreset(struct omap_hwmod *oh, u32 *v) 457 { 458 u32 softrst_mask; 459 460 if (!oh->class->sysc || 461 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET)) 462 return -EINVAL; 463 464 if (!oh->class->sysc->sysc_fields) { 465 WARN(1, 466 "omap_hwmod: %s: sysc_fields absent for sysconfig class\n", 467 oh->name); 468 return -EINVAL; 469 } 470 471 softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift); 472 473 *v &= ~softrst_mask; 474 475 return 0; 476 } 477 478 /** 479 * _wait_softreset_complete - wait for an OCP softreset to complete 480 * @oh: struct omap_hwmod * to wait on 481 * 482 * Wait until the IP block represented by @oh reports that its OCP 483 * softreset is complete. This can be triggered by software (see 484 * _ocp_softreset()) or by hardware upon returning from off-mode (one 485 * example is HSMMC). Waits for up to MAX_MODULE_SOFTRESET_WAIT 486 * microseconds. Returns the number of microseconds waited. 487 */ 488 static int _wait_softreset_complete(struct omap_hwmod *oh) 489 { 490 struct omap_hwmod_class_sysconfig *sysc; 491 u32 softrst_mask; 492 int c = 0; 493 494 sysc = oh->class->sysc; 495 496 if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS) 497 omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs) 498 & SYSS_RESETDONE_MASK), 499 MAX_MODULE_SOFTRESET_WAIT, c); 500 else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) { 501 softrst_mask = (0x1 << sysc->sysc_fields->srst_shift); 502 omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs) 503 & softrst_mask), 504 MAX_MODULE_SOFTRESET_WAIT, c); 505 } 506 507 return c; 508 } 509 510 /** 511 * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v 512 * @oh: struct omap_hwmod * 513 * 514 * The DMADISABLE bit is a semi-automatic bit present in sysconfig register 515 * of some modules. When the DMA must perform read/write accesses, the 516 * DMADISABLE bit is cleared by the hardware. But when the DMA must stop 517 * for power management, software must set the DMADISABLE bit back to 1. 518 * 519 * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon 520 * error or 0 upon success. 521 */ 522 static int _set_dmadisable(struct omap_hwmod *oh) 523 { 524 u32 v; 525 u32 dmadisable_mask; 526 527 if (!oh->class->sysc || 528 !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE)) 529 return -EINVAL; 530 531 if (!oh->class->sysc->sysc_fields) { 532 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); 533 return -EINVAL; 534 } 535 536 /* clocks must be on for this operation */ 537 if (oh->_state != _HWMOD_STATE_ENABLED) { 538 pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name); 539 return -EINVAL; 540 } 541 542 pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name); 543 544 v = oh->_sysc_cache; 545 dmadisable_mask = 546 (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift); 547 v |= dmadisable_mask; 548 _write_sysconfig(v, oh); 549 550 return 0; 551 } 552 553 /** 554 * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v 555 * @oh: struct omap_hwmod * 556 * @autoidle: desired AUTOIDLE bitfield value (0 or 1) 557 * @v: pointer to register contents to modify 558 * 559 * Update the module autoidle bit in @v to be @autoidle for the @oh 560 * hwmod. The autoidle bit controls whether the module can gate 561 * internal clocks automatically when it isn't doing anything; the 562 * exact function of this bit varies on a per-module basis. This 563 * function does not write to the hardware. Returns -EINVAL upon 564 * error or 0 upon success. 565 */ 566 static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle, 567 u32 *v) 568 { 569 u32 autoidle_mask; 570 u8 autoidle_shift; 571 572 if (!oh->class->sysc || 573 !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE)) 574 return -EINVAL; 575 576 if (!oh->class->sysc->sysc_fields) { 577 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); 578 return -EINVAL; 579 } 580 581 autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift; 582 autoidle_mask = (0x1 << autoidle_shift); 583 584 *v &= ~autoidle_mask; 585 *v |= autoidle << autoidle_shift; 586 587 return 0; 588 } 589 590 /** 591 * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux 592 * @oh: struct omap_hwmod * 593 * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable 594 * 595 * Set or clear the I/O pad wakeup flag in the mux entries for the 596 * hwmod @oh. This function changes the @oh->mux->pads_dynamic array 597 * in memory. If the hwmod is currently idled, and the new idle 598 * values don't match the previous ones, this function will also 599 * update the SCM PADCTRL registers. Otherwise, if the hwmod is not 600 * currently idled, this function won't touch the hardware: the new 601 * mux settings are written to the SCM PADCTRL registers when the 602 * hwmod is idled. No return value. 603 */ 604 static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake) 605 { 606 struct omap_device_pad *pad; 607 bool change = false; 608 u16 prev_idle; 609 int j; 610 611 if (!oh->mux || !oh->mux->enabled) 612 return; 613 614 for (j = 0; j < oh->mux->nr_pads_dynamic; j++) { 615 pad = oh->mux->pads_dynamic[j]; 616 617 if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP)) 618 continue; 619 620 prev_idle = pad->idle; 621 622 if (set_wake) 623 pad->idle |= OMAP_WAKEUP_EN; 624 else 625 pad->idle &= ~OMAP_WAKEUP_EN; 626 627 if (prev_idle != pad->idle) 628 change = true; 629 } 630 631 if (change && oh->_state == _HWMOD_STATE_IDLE) 632 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE); 633 } 634 635 /** 636 * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware 637 * @oh: struct omap_hwmod * 638 * 639 * Allow the hardware module @oh to send wakeups. Returns -EINVAL 640 * upon error or 0 upon success. 641 */ 642 static int _enable_wakeup(struct omap_hwmod *oh, u32 *v) 643 { 644 if (!oh->class->sysc || 645 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) || 646 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) || 647 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP))) 648 return -EINVAL; 649 650 if (!oh->class->sysc->sysc_fields) { 651 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); 652 return -EINVAL; 653 } 654 655 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) 656 *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift; 657 658 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) 659 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v); 660 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) 661 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v); 662 663 /* XXX test pwrdm_get_wken for this hwmod's subsystem */ 664 665 return 0; 666 } 667 668 /** 669 * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware 670 * @oh: struct omap_hwmod * 671 * 672 * Prevent the hardware module @oh to send wakeups. Returns -EINVAL 673 * upon error or 0 upon success. 674 */ 675 static int _disable_wakeup(struct omap_hwmod *oh, u32 *v) 676 { 677 if (!oh->class->sysc || 678 !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) || 679 (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) || 680 (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP))) 681 return -EINVAL; 682 683 if (!oh->class->sysc->sysc_fields) { 684 WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name); 685 return -EINVAL; 686 } 687 688 if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) 689 *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift); 690 691 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) 692 _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v); 693 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) 694 _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v); 695 696 /* XXX test pwrdm_get_wken for this hwmod's subsystem */ 697 698 return 0; 699 } 700 701 static struct clockdomain *_get_clkdm(struct omap_hwmod *oh) 702 { 703 struct clk_hw_omap *clk; 704 705 if (oh->clkdm) { 706 return oh->clkdm; 707 } else if (oh->_clk) { 708 if (__clk_get_flags(oh->_clk) & CLK_IS_BASIC) 709 return NULL; 710 clk = to_clk_hw_omap(__clk_get_hw(oh->_clk)); 711 return clk->clkdm; 712 } 713 return NULL; 714 } 715 716 /** 717 * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active 718 * @oh: struct omap_hwmod * 719 * 720 * Prevent the hardware module @oh from entering idle while the 721 * hardare module initiator @init_oh is active. Useful when a module 722 * will be accessed by a particular initiator (e.g., if a module will 723 * be accessed by the IVA, there should be a sleepdep between the IVA 724 * initiator and the module). Only applies to modules in smart-idle 725 * mode. If the clockdomain is marked as not needing autodeps, return 726 * 0 without doing anything. Otherwise, returns -EINVAL upon error or 727 * passes along clkdm_add_sleepdep() value upon success. 728 */ 729 static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh) 730 { 731 struct clockdomain *clkdm, *init_clkdm; 732 733 clkdm = _get_clkdm(oh); 734 init_clkdm = _get_clkdm(init_oh); 735 736 if (!clkdm || !init_clkdm) 737 return -EINVAL; 738 739 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS) 740 return 0; 741 742 return clkdm_add_sleepdep(clkdm, init_clkdm); 743 } 744 745 /** 746 * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active 747 * @oh: struct omap_hwmod * 748 * 749 * Allow the hardware module @oh to enter idle while the hardare 750 * module initiator @init_oh is active. Useful when a module will not 751 * be accessed by a particular initiator (e.g., if a module will not 752 * be accessed by the IVA, there should be no sleepdep between the IVA 753 * initiator and the module). Only applies to modules in smart-idle 754 * mode. If the clockdomain is marked as not needing autodeps, return 755 * 0 without doing anything. Returns -EINVAL upon error or passes 756 * along clkdm_del_sleepdep() value upon success. 757 */ 758 static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh) 759 { 760 struct clockdomain *clkdm, *init_clkdm; 761 762 clkdm = _get_clkdm(oh); 763 init_clkdm = _get_clkdm(init_oh); 764 765 if (!clkdm || !init_clkdm) 766 return -EINVAL; 767 768 if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS) 769 return 0; 770 771 return clkdm_del_sleepdep(clkdm, init_clkdm); 772 } 773 774 /** 775 * _init_main_clk - get a struct clk * for the the hwmod's main functional clk 776 * @oh: struct omap_hwmod * 777 * 778 * Called from _init_clocks(). Populates the @oh _clk (main 779 * functional clock pointer) if a main_clk is present. Returns 0 on 780 * success or -EINVAL on error. 781 */ 782 static int _init_main_clk(struct omap_hwmod *oh) 783 { 784 int ret = 0; 785 786 if (!oh->main_clk) 787 return 0; 788 789 oh->_clk = clk_get(NULL, oh->main_clk); 790 if (IS_ERR(oh->_clk)) { 791 pr_warn("omap_hwmod: %s: cannot clk_get main_clk %s\n", 792 oh->name, oh->main_clk); 793 return -EINVAL; 794 } 795 /* 796 * HACK: This needs a re-visit once clk_prepare() is implemented 797 * to do something meaningful. Today its just a no-op. 798 * If clk_prepare() is used at some point to do things like 799 * voltage scaling etc, then this would have to be moved to 800 * some point where subsystems like i2c and pmic become 801 * available. 802 */ 803 clk_prepare(oh->_clk); 804 805 if (!_get_clkdm(oh)) 806 pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n", 807 oh->name, oh->main_clk); 808 809 return ret; 810 } 811 812 /** 813 * _init_interface_clks - get a struct clk * for the the hwmod's interface clks 814 * @oh: struct omap_hwmod * 815 * 816 * Called from _init_clocks(). Populates the @oh OCP slave interface 817 * clock pointers. Returns 0 on success or -EINVAL on error. 818 */ 819 static int _init_interface_clks(struct omap_hwmod *oh) 820 { 821 struct omap_hwmod_ocp_if *os; 822 struct list_head *p; 823 struct clk *c; 824 int i = 0; 825 int ret = 0; 826 827 p = oh->slave_ports.next; 828 829 while (i < oh->slaves_cnt) { 830 os = _fetch_next_ocp_if(&p, &i); 831 if (!os->clk) 832 continue; 833 834 c = clk_get(NULL, os->clk); 835 if (IS_ERR(c)) { 836 pr_warn("omap_hwmod: %s: cannot clk_get interface_clk %s\n", 837 oh->name, os->clk); 838 ret = -EINVAL; 839 continue; 840 } 841 os->_clk = c; 842 /* 843 * HACK: This needs a re-visit once clk_prepare() is implemented 844 * to do something meaningful. Today its just a no-op. 845 * If clk_prepare() is used at some point to do things like 846 * voltage scaling etc, then this would have to be moved to 847 * some point where subsystems like i2c and pmic become 848 * available. 849 */ 850 clk_prepare(os->_clk); 851 } 852 853 return ret; 854 } 855 856 /** 857 * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks 858 * @oh: struct omap_hwmod * 859 * 860 * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk 861 * clock pointers. Returns 0 on success or -EINVAL on error. 862 */ 863 static int _init_opt_clks(struct omap_hwmod *oh) 864 { 865 struct omap_hwmod_opt_clk *oc; 866 struct clk *c; 867 int i; 868 int ret = 0; 869 870 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) { 871 c = clk_get(NULL, oc->clk); 872 if (IS_ERR(c)) { 873 pr_warn("omap_hwmod: %s: cannot clk_get opt_clk %s\n", 874 oh->name, oc->clk); 875 ret = -EINVAL; 876 continue; 877 } 878 oc->_clk = c; 879 /* 880 * HACK: This needs a re-visit once clk_prepare() is implemented 881 * to do something meaningful. Today its just a no-op. 882 * If clk_prepare() is used at some point to do things like 883 * voltage scaling etc, then this would have to be moved to 884 * some point where subsystems like i2c and pmic become 885 * available. 886 */ 887 clk_prepare(oc->_clk); 888 } 889 890 return ret; 891 } 892 893 static void _enable_optional_clocks(struct omap_hwmod *oh) 894 { 895 struct omap_hwmod_opt_clk *oc; 896 int i; 897 898 pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name); 899 900 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) 901 if (oc->_clk) { 902 pr_debug("omap_hwmod: enable %s:%s\n", oc->role, 903 __clk_get_name(oc->_clk)); 904 clk_enable(oc->_clk); 905 } 906 } 907 908 static void _disable_optional_clocks(struct omap_hwmod *oh) 909 { 910 struct omap_hwmod_opt_clk *oc; 911 int i; 912 913 pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name); 914 915 for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) 916 if (oc->_clk) { 917 pr_debug("omap_hwmod: disable %s:%s\n", oc->role, 918 __clk_get_name(oc->_clk)); 919 clk_disable(oc->_clk); 920 } 921 } 922 923 /** 924 * _enable_clocks - enable hwmod main clock and interface clocks 925 * @oh: struct omap_hwmod * 926 * 927 * Enables all clocks necessary for register reads and writes to succeed 928 * on the hwmod @oh. Returns 0. 929 */ 930 static int _enable_clocks(struct omap_hwmod *oh) 931 { 932 struct omap_hwmod_ocp_if *os; 933 struct list_head *p; 934 int i = 0; 935 936 pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name); 937 938 if (oh->_clk) 939 clk_enable(oh->_clk); 940 941 p = oh->slave_ports.next; 942 943 while (i < oh->slaves_cnt) { 944 os = _fetch_next_ocp_if(&p, &i); 945 946 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE)) 947 clk_enable(os->_clk); 948 } 949 950 if (oh->flags & HWMOD_OPT_CLKS_NEEDED) 951 _enable_optional_clocks(oh); 952 953 /* The opt clocks are controlled by the device driver. */ 954 955 return 0; 956 } 957 958 /** 959 * _disable_clocks - disable hwmod main clock and interface clocks 960 * @oh: struct omap_hwmod * 961 * 962 * Disables the hwmod @oh main functional and interface clocks. Returns 0. 963 */ 964 static int _disable_clocks(struct omap_hwmod *oh) 965 { 966 struct omap_hwmod_ocp_if *os; 967 struct list_head *p; 968 int i = 0; 969 970 pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name); 971 972 if (oh->_clk) 973 clk_disable(oh->_clk); 974 975 p = oh->slave_ports.next; 976 977 while (i < oh->slaves_cnt) { 978 os = _fetch_next_ocp_if(&p, &i); 979 980 if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE)) 981 clk_disable(os->_clk); 982 } 983 984 if (oh->flags & HWMOD_OPT_CLKS_NEEDED) 985 _disable_optional_clocks(oh); 986 987 /* The opt clocks are controlled by the device driver. */ 988 989 return 0; 990 } 991 992 /** 993 * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4 994 * @oh: struct omap_hwmod * 995 * 996 * Enables the PRCM module mode related to the hwmod @oh. 997 * No return value. 998 */ 999 static void _omap4_enable_module(struct omap_hwmod *oh) 1000 { 1001 if (!oh->clkdm || !oh->prcm.omap4.modulemode) 1002 return; 1003 1004 pr_debug("omap_hwmod: %s: %s: %d\n", 1005 oh->name, __func__, oh->prcm.omap4.modulemode); 1006 1007 omap_cm_module_enable(oh->prcm.omap4.modulemode, 1008 oh->clkdm->prcm_partition, 1009 oh->clkdm->cm_inst, oh->prcm.omap4.clkctrl_offs); 1010 } 1011 1012 /** 1013 * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4 1014 * @oh: struct omap_hwmod * 1015 * 1016 * Wait for a module @oh to enter slave idle. Returns 0 if the module 1017 * does not have an IDLEST bit or if the module successfully enters 1018 * slave idle; otherwise, pass along the return value of the 1019 * appropriate *_cm*_wait_module_idle() function. 1020 */ 1021 static int _omap4_wait_target_disable(struct omap_hwmod *oh) 1022 { 1023 if (!oh) 1024 return -EINVAL; 1025 1026 if (oh->_int_flags & _HWMOD_NO_MPU_PORT || !oh->clkdm) 1027 return 0; 1028 1029 if (oh->flags & HWMOD_NO_IDLEST) 1030 return 0; 1031 1032 return omap_cm_wait_module_idle(oh->clkdm->prcm_partition, 1033 oh->clkdm->cm_inst, 1034 oh->prcm.omap4.clkctrl_offs, 0); 1035 } 1036 1037 /** 1038 * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh 1039 * @oh: struct omap_hwmod *oh 1040 * 1041 * Count and return the number of MPU IRQs associated with the hwmod 1042 * @oh. Used to allocate struct resource data. Returns 0 if @oh is 1043 * NULL. 1044 */ 1045 static int _count_mpu_irqs(struct omap_hwmod *oh) 1046 { 1047 struct omap_hwmod_irq_info *ohii; 1048 int i = 0; 1049 1050 if (!oh || !oh->mpu_irqs) 1051 return 0; 1052 1053 do { 1054 ohii = &oh->mpu_irqs[i++]; 1055 } while (ohii->irq != -1); 1056 1057 return i-1; 1058 } 1059 1060 /** 1061 * _count_sdma_reqs - count the number of SDMA request lines associated with @oh 1062 * @oh: struct omap_hwmod *oh 1063 * 1064 * Count and return the number of SDMA request lines associated with 1065 * the hwmod @oh. Used to allocate struct resource data. Returns 0 1066 * if @oh is NULL. 1067 */ 1068 static int _count_sdma_reqs(struct omap_hwmod *oh) 1069 { 1070 struct omap_hwmod_dma_info *ohdi; 1071 int i = 0; 1072 1073 if (!oh || !oh->sdma_reqs) 1074 return 0; 1075 1076 do { 1077 ohdi = &oh->sdma_reqs[i++]; 1078 } while (ohdi->dma_req != -1); 1079 1080 return i-1; 1081 } 1082 1083 /** 1084 * _count_ocp_if_addr_spaces - count the number of address space entries for @oh 1085 * @oh: struct omap_hwmod *oh 1086 * 1087 * Count and return the number of address space ranges associated with 1088 * the hwmod @oh. Used to allocate struct resource data. Returns 0 1089 * if @oh is NULL. 1090 */ 1091 static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os) 1092 { 1093 struct omap_hwmod_addr_space *mem; 1094 int i = 0; 1095 1096 if (!os || !os->addr) 1097 return 0; 1098 1099 do { 1100 mem = &os->addr[i++]; 1101 } while (mem->pa_start != mem->pa_end); 1102 1103 return i-1; 1104 } 1105 1106 /** 1107 * _get_mpu_irq_by_name - fetch MPU interrupt line number by name 1108 * @oh: struct omap_hwmod * to operate on 1109 * @name: pointer to the name of the MPU interrupt number to fetch (optional) 1110 * @irq: pointer to an unsigned int to store the MPU IRQ number to 1111 * 1112 * Retrieve a MPU hardware IRQ line number named by @name associated 1113 * with the IP block pointed to by @oh. The IRQ number will be filled 1114 * into the address pointed to by @dma. When @name is non-null, the 1115 * IRQ line number associated with the named entry will be returned. 1116 * If @name is null, the first matching entry will be returned. Data 1117 * order is not meaningful in hwmod data, so callers are strongly 1118 * encouraged to use a non-null @name whenever possible to avoid 1119 * unpredictable effects if hwmod data is later added that causes data 1120 * ordering to change. Returns 0 upon success or a negative error 1121 * code upon error. 1122 */ 1123 static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name, 1124 unsigned int *irq) 1125 { 1126 int i; 1127 bool found = false; 1128 1129 if (!oh->mpu_irqs) 1130 return -ENOENT; 1131 1132 i = 0; 1133 while (oh->mpu_irqs[i].irq != -1) { 1134 if (name == oh->mpu_irqs[i].name || 1135 !strcmp(name, oh->mpu_irqs[i].name)) { 1136 found = true; 1137 break; 1138 } 1139 i++; 1140 } 1141 1142 if (!found) 1143 return -ENOENT; 1144 1145 *irq = oh->mpu_irqs[i].irq; 1146 1147 return 0; 1148 } 1149 1150 /** 1151 * _get_sdma_req_by_name - fetch SDMA request line ID by name 1152 * @oh: struct omap_hwmod * to operate on 1153 * @name: pointer to the name of the SDMA request line to fetch (optional) 1154 * @dma: pointer to an unsigned int to store the request line ID to 1155 * 1156 * Retrieve an SDMA request line ID named by @name on the IP block 1157 * pointed to by @oh. The ID will be filled into the address pointed 1158 * to by @dma. When @name is non-null, the request line ID associated 1159 * with the named entry will be returned. If @name is null, the first 1160 * matching entry will be returned. Data order is not meaningful in 1161 * hwmod data, so callers are strongly encouraged to use a non-null 1162 * @name whenever possible to avoid unpredictable effects if hwmod 1163 * data is later added that causes data ordering to change. Returns 0 1164 * upon success or a negative error code upon error. 1165 */ 1166 static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name, 1167 unsigned int *dma) 1168 { 1169 int i; 1170 bool found = false; 1171 1172 if (!oh->sdma_reqs) 1173 return -ENOENT; 1174 1175 i = 0; 1176 while (oh->sdma_reqs[i].dma_req != -1) { 1177 if (name == oh->sdma_reqs[i].name || 1178 !strcmp(name, oh->sdma_reqs[i].name)) { 1179 found = true; 1180 break; 1181 } 1182 i++; 1183 } 1184 1185 if (!found) 1186 return -ENOENT; 1187 1188 *dma = oh->sdma_reqs[i].dma_req; 1189 1190 return 0; 1191 } 1192 1193 /** 1194 * _get_addr_space_by_name - fetch address space start & end by name 1195 * @oh: struct omap_hwmod * to operate on 1196 * @name: pointer to the name of the address space to fetch (optional) 1197 * @pa_start: pointer to a u32 to store the starting address to 1198 * @pa_end: pointer to a u32 to store the ending address to 1199 * 1200 * Retrieve address space start and end addresses for the IP block 1201 * pointed to by @oh. The data will be filled into the addresses 1202 * pointed to by @pa_start and @pa_end. When @name is non-null, the 1203 * address space data associated with the named entry will be 1204 * returned. If @name is null, the first matching entry will be 1205 * returned. Data order is not meaningful in hwmod data, so callers 1206 * are strongly encouraged to use a non-null @name whenever possible 1207 * to avoid unpredictable effects if hwmod data is later added that 1208 * causes data ordering to change. Returns 0 upon success or a 1209 * negative error code upon error. 1210 */ 1211 static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name, 1212 u32 *pa_start, u32 *pa_end) 1213 { 1214 int i, j; 1215 struct omap_hwmod_ocp_if *os; 1216 struct list_head *p = NULL; 1217 bool found = false; 1218 1219 p = oh->slave_ports.next; 1220 1221 i = 0; 1222 while (i < oh->slaves_cnt) { 1223 os = _fetch_next_ocp_if(&p, &i); 1224 1225 if (!os->addr) 1226 return -ENOENT; 1227 1228 j = 0; 1229 while (os->addr[j].pa_start != os->addr[j].pa_end) { 1230 if (name == os->addr[j].name || 1231 !strcmp(name, os->addr[j].name)) { 1232 found = true; 1233 break; 1234 } 1235 j++; 1236 } 1237 1238 if (found) 1239 break; 1240 } 1241 1242 if (!found) 1243 return -ENOENT; 1244 1245 *pa_start = os->addr[j].pa_start; 1246 *pa_end = os->addr[j].pa_end; 1247 1248 return 0; 1249 } 1250 1251 /** 1252 * _save_mpu_port_index - find and save the index to @oh's MPU port 1253 * @oh: struct omap_hwmod * 1254 * 1255 * Determines the array index of the OCP slave port that the MPU uses 1256 * to address the device, and saves it into the struct omap_hwmod. 1257 * Intended to be called during hwmod registration only. No return 1258 * value. 1259 */ 1260 static void __init _save_mpu_port_index(struct omap_hwmod *oh) 1261 { 1262 struct omap_hwmod_ocp_if *os = NULL; 1263 struct list_head *p; 1264 int i = 0; 1265 1266 if (!oh) 1267 return; 1268 1269 oh->_int_flags |= _HWMOD_NO_MPU_PORT; 1270 1271 p = oh->slave_ports.next; 1272 1273 while (i < oh->slaves_cnt) { 1274 os = _fetch_next_ocp_if(&p, &i); 1275 if (os->user & OCP_USER_MPU) { 1276 oh->_mpu_port = os; 1277 oh->_int_flags &= ~_HWMOD_NO_MPU_PORT; 1278 break; 1279 } 1280 } 1281 1282 return; 1283 } 1284 1285 /** 1286 * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU 1287 * @oh: struct omap_hwmod * 1288 * 1289 * Given a pointer to a struct omap_hwmod record @oh, return a pointer 1290 * to the struct omap_hwmod_ocp_if record that is used by the MPU to 1291 * communicate with the IP block. This interface need not be directly 1292 * connected to the MPU (and almost certainly is not), but is directly 1293 * connected to the IP block represented by @oh. Returns a pointer 1294 * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon 1295 * error or if there does not appear to be a path from the MPU to this 1296 * IP block. 1297 */ 1298 static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh) 1299 { 1300 if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0) 1301 return NULL; 1302 1303 return oh->_mpu_port; 1304 }; 1305 1306 /** 1307 * _find_mpu_rt_addr_space - return MPU register target address space for @oh 1308 * @oh: struct omap_hwmod * 1309 * 1310 * Returns a pointer to the struct omap_hwmod_addr_space record representing 1311 * the register target MPU address space; or returns NULL upon error. 1312 */ 1313 static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh) 1314 { 1315 struct omap_hwmod_ocp_if *os; 1316 struct omap_hwmod_addr_space *mem; 1317 int found = 0, i = 0; 1318 1319 os = _find_mpu_rt_port(oh); 1320 if (!os || !os->addr) 1321 return NULL; 1322 1323 do { 1324 mem = &os->addr[i++]; 1325 if (mem->flags & ADDR_TYPE_RT) 1326 found = 1; 1327 } while (!found && mem->pa_start != mem->pa_end); 1328 1329 return (found) ? mem : NULL; 1330 } 1331 1332 /** 1333 * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG 1334 * @oh: struct omap_hwmod * 1335 * 1336 * Ensure that the OCP_SYSCONFIG register for the IP block represented 1337 * by @oh is set to indicate to the PRCM that the IP block is active. 1338 * Usually this means placing the module into smart-idle mode and 1339 * smart-standby, but if there is a bug in the automatic idle handling 1340 * for the IP block, it may need to be placed into the force-idle or 1341 * no-idle variants of these modes. No return value. 1342 */ 1343 static void _enable_sysc(struct omap_hwmod *oh) 1344 { 1345 u8 idlemode, sf; 1346 u32 v; 1347 bool clkdm_act; 1348 struct clockdomain *clkdm; 1349 1350 if (!oh->class->sysc) 1351 return; 1352 1353 /* 1354 * Wait until reset has completed, this is needed as the IP 1355 * block is reset automatically by hardware in some cases 1356 * (off-mode for example), and the drivers require the 1357 * IP to be ready when they access it 1358 */ 1359 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET) 1360 _enable_optional_clocks(oh); 1361 _wait_softreset_complete(oh); 1362 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET) 1363 _disable_optional_clocks(oh); 1364 1365 v = oh->_sysc_cache; 1366 sf = oh->class->sysc->sysc_flags; 1367 1368 clkdm = _get_clkdm(oh); 1369 if (sf & SYSC_HAS_SIDLEMODE) { 1370 if (oh->flags & HWMOD_SWSUP_SIDLE || 1371 oh->flags & HWMOD_SWSUP_SIDLE_ACT) { 1372 idlemode = HWMOD_IDLEMODE_NO; 1373 } else { 1374 if (sf & SYSC_HAS_ENAWAKEUP) 1375 _enable_wakeup(oh, &v); 1376 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) 1377 idlemode = HWMOD_IDLEMODE_SMART_WKUP; 1378 else 1379 idlemode = HWMOD_IDLEMODE_SMART; 1380 } 1381 1382 /* 1383 * This is special handling for some IPs like 1384 * 32k sync timer. Force them to idle! 1385 */ 1386 clkdm_act = (clkdm && clkdm->flags & CLKDM_ACTIVE_WITH_MPU); 1387 if (clkdm_act && !(oh->class->sysc->idlemodes & 1388 (SIDLE_SMART | SIDLE_SMART_WKUP))) 1389 idlemode = HWMOD_IDLEMODE_FORCE; 1390 1391 _set_slave_idlemode(oh, idlemode, &v); 1392 } 1393 1394 if (sf & SYSC_HAS_MIDLEMODE) { 1395 if (oh->flags & HWMOD_FORCE_MSTANDBY) { 1396 idlemode = HWMOD_IDLEMODE_FORCE; 1397 } else if (oh->flags & HWMOD_SWSUP_MSTANDBY) { 1398 idlemode = HWMOD_IDLEMODE_NO; 1399 } else { 1400 if (sf & SYSC_HAS_ENAWAKEUP) 1401 _enable_wakeup(oh, &v); 1402 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) 1403 idlemode = HWMOD_IDLEMODE_SMART_WKUP; 1404 else 1405 idlemode = HWMOD_IDLEMODE_SMART; 1406 } 1407 _set_master_standbymode(oh, idlemode, &v); 1408 } 1409 1410 /* 1411 * XXX The clock framework should handle this, by 1412 * calling into this code. But this must wait until the 1413 * clock structures are tagged with omap_hwmod entries 1414 */ 1415 if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) && 1416 (sf & SYSC_HAS_CLOCKACTIVITY)) 1417 _set_clockactivity(oh, oh->class->sysc->clockact, &v); 1418 1419 /* If the cached value is the same as the new value, skip the write */ 1420 if (oh->_sysc_cache != v) 1421 _write_sysconfig(v, oh); 1422 1423 /* 1424 * Set the autoidle bit only after setting the smartidle bit 1425 * Setting this will not have any impact on the other modules. 1426 */ 1427 if (sf & SYSC_HAS_AUTOIDLE) { 1428 idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ? 1429 0 : 1; 1430 _set_module_autoidle(oh, idlemode, &v); 1431 _write_sysconfig(v, oh); 1432 } 1433 } 1434 1435 /** 1436 * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG 1437 * @oh: struct omap_hwmod * 1438 * 1439 * If module is marked as SWSUP_SIDLE, force the module into slave 1440 * idle; otherwise, configure it for smart-idle. If module is marked 1441 * as SWSUP_MSUSPEND, force the module into master standby; otherwise, 1442 * configure it for smart-standby. No return value. 1443 */ 1444 static void _idle_sysc(struct omap_hwmod *oh) 1445 { 1446 u8 idlemode, sf; 1447 u32 v; 1448 1449 if (!oh->class->sysc) 1450 return; 1451 1452 v = oh->_sysc_cache; 1453 sf = oh->class->sysc->sysc_flags; 1454 1455 if (sf & SYSC_HAS_SIDLEMODE) { 1456 if (oh->flags & HWMOD_SWSUP_SIDLE) { 1457 idlemode = HWMOD_IDLEMODE_FORCE; 1458 } else { 1459 if (sf & SYSC_HAS_ENAWAKEUP) 1460 _enable_wakeup(oh, &v); 1461 if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) 1462 idlemode = HWMOD_IDLEMODE_SMART_WKUP; 1463 else 1464 idlemode = HWMOD_IDLEMODE_SMART; 1465 } 1466 _set_slave_idlemode(oh, idlemode, &v); 1467 } 1468 1469 if (sf & SYSC_HAS_MIDLEMODE) { 1470 if ((oh->flags & HWMOD_SWSUP_MSTANDBY) || 1471 (oh->flags & HWMOD_FORCE_MSTANDBY)) { 1472 idlemode = HWMOD_IDLEMODE_FORCE; 1473 } else { 1474 if (sf & SYSC_HAS_ENAWAKEUP) 1475 _enable_wakeup(oh, &v); 1476 if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) 1477 idlemode = HWMOD_IDLEMODE_SMART_WKUP; 1478 else 1479 idlemode = HWMOD_IDLEMODE_SMART; 1480 } 1481 _set_master_standbymode(oh, idlemode, &v); 1482 } 1483 1484 _write_sysconfig(v, oh); 1485 } 1486 1487 /** 1488 * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG 1489 * @oh: struct omap_hwmod * 1490 * 1491 * Force the module into slave idle and master suspend. No return 1492 * value. 1493 */ 1494 static void _shutdown_sysc(struct omap_hwmod *oh) 1495 { 1496 u32 v; 1497 u8 sf; 1498 1499 if (!oh->class->sysc) 1500 return; 1501 1502 v = oh->_sysc_cache; 1503 sf = oh->class->sysc->sysc_flags; 1504 1505 if (sf & SYSC_HAS_SIDLEMODE) 1506 _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v); 1507 1508 if (sf & SYSC_HAS_MIDLEMODE) 1509 _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v); 1510 1511 if (sf & SYSC_HAS_AUTOIDLE) 1512 _set_module_autoidle(oh, 1, &v); 1513 1514 _write_sysconfig(v, oh); 1515 } 1516 1517 /** 1518 * _lookup - find an omap_hwmod by name 1519 * @name: find an omap_hwmod by name 1520 * 1521 * Return a pointer to an omap_hwmod by name, or NULL if not found. 1522 */ 1523 static struct omap_hwmod *_lookup(const char *name) 1524 { 1525 struct omap_hwmod *oh, *temp_oh; 1526 1527 oh = NULL; 1528 1529 list_for_each_entry(temp_oh, &omap_hwmod_list, node) { 1530 if (!strcmp(name, temp_oh->name)) { 1531 oh = temp_oh; 1532 break; 1533 } 1534 } 1535 1536 return oh; 1537 } 1538 1539 /** 1540 * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod 1541 * @oh: struct omap_hwmod * 1542 * 1543 * Convert a clockdomain name stored in a struct omap_hwmod into a 1544 * clockdomain pointer, and save it into the struct omap_hwmod. 1545 * Return -EINVAL if the clkdm_name lookup failed. 1546 */ 1547 static int _init_clkdm(struct omap_hwmod *oh) 1548 { 1549 if (!oh->clkdm_name) { 1550 pr_debug("omap_hwmod: %s: missing clockdomain\n", oh->name); 1551 return 0; 1552 } 1553 1554 oh->clkdm = clkdm_lookup(oh->clkdm_name); 1555 if (!oh->clkdm) { 1556 pr_warn("omap_hwmod: %s: could not associate to clkdm %s\n", 1557 oh->name, oh->clkdm_name); 1558 return 0; 1559 } 1560 1561 pr_debug("omap_hwmod: %s: associated to clkdm %s\n", 1562 oh->name, oh->clkdm_name); 1563 1564 return 0; 1565 } 1566 1567 /** 1568 * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as 1569 * well the clockdomain. 1570 * @oh: struct omap_hwmod * 1571 * @data: not used; pass NULL 1572 * 1573 * Called by omap_hwmod_setup_*() (after omap2_clk_init()). 1574 * Resolves all clock names embedded in the hwmod. Returns 0 on 1575 * success, or a negative error code on failure. 1576 */ 1577 static int _init_clocks(struct omap_hwmod *oh, void *data) 1578 { 1579 int ret = 0; 1580 1581 if (oh->_state != _HWMOD_STATE_REGISTERED) 1582 return 0; 1583 1584 pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name); 1585 1586 if (soc_ops.init_clkdm) 1587 ret |= soc_ops.init_clkdm(oh); 1588 1589 ret |= _init_main_clk(oh); 1590 ret |= _init_interface_clks(oh); 1591 ret |= _init_opt_clks(oh); 1592 1593 if (!ret) 1594 oh->_state = _HWMOD_STATE_CLKS_INITED; 1595 else 1596 pr_warn("omap_hwmod: %s: cannot _init_clocks\n", oh->name); 1597 1598 return ret; 1599 } 1600 1601 /** 1602 * _lookup_hardreset - fill register bit info for this hwmod/reset line 1603 * @oh: struct omap_hwmod * 1604 * @name: name of the reset line in the context of this hwmod 1605 * @ohri: struct omap_hwmod_rst_info * that this function will fill in 1606 * 1607 * Return the bit position of the reset line that match the 1608 * input name. Return -ENOENT if not found. 1609 */ 1610 static int _lookup_hardreset(struct omap_hwmod *oh, const char *name, 1611 struct omap_hwmod_rst_info *ohri) 1612 { 1613 int i; 1614 1615 for (i = 0; i < oh->rst_lines_cnt; i++) { 1616 const char *rst_line = oh->rst_lines[i].name; 1617 if (!strcmp(rst_line, name)) { 1618 ohri->rst_shift = oh->rst_lines[i].rst_shift; 1619 ohri->st_shift = oh->rst_lines[i].st_shift; 1620 pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n", 1621 oh->name, __func__, rst_line, ohri->rst_shift, 1622 ohri->st_shift); 1623 1624 return 0; 1625 } 1626 } 1627 1628 return -ENOENT; 1629 } 1630 1631 /** 1632 * _assert_hardreset - assert the HW reset line of submodules 1633 * contained in the hwmod module. 1634 * @oh: struct omap_hwmod * 1635 * @name: name of the reset line to lookup and assert 1636 * 1637 * Some IP like dsp, ipu or iva contain processor that require an HW 1638 * reset line to be assert / deassert in order to enable fully the IP. 1639 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of 1640 * asserting the hardreset line on the currently-booted SoC, or passes 1641 * along the return value from _lookup_hardreset() or the SoC's 1642 * assert_hardreset code. 1643 */ 1644 static int _assert_hardreset(struct omap_hwmod *oh, const char *name) 1645 { 1646 struct omap_hwmod_rst_info ohri; 1647 int ret = -EINVAL; 1648 1649 if (!oh) 1650 return -EINVAL; 1651 1652 if (!soc_ops.assert_hardreset) 1653 return -ENOSYS; 1654 1655 ret = _lookup_hardreset(oh, name, &ohri); 1656 if (ret < 0) 1657 return ret; 1658 1659 ret = soc_ops.assert_hardreset(oh, &ohri); 1660 1661 return ret; 1662 } 1663 1664 /** 1665 * _deassert_hardreset - deassert the HW reset line of submodules contained 1666 * in the hwmod module. 1667 * @oh: struct omap_hwmod * 1668 * @name: name of the reset line to look up and deassert 1669 * 1670 * Some IP like dsp, ipu or iva contain processor that require an HW 1671 * reset line to be assert / deassert in order to enable fully the IP. 1672 * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of 1673 * deasserting the hardreset line on the currently-booted SoC, or passes 1674 * along the return value from _lookup_hardreset() or the SoC's 1675 * deassert_hardreset code. 1676 */ 1677 static int _deassert_hardreset(struct omap_hwmod *oh, const char *name) 1678 { 1679 struct omap_hwmod_rst_info ohri; 1680 int ret = -EINVAL; 1681 int hwsup = 0; 1682 1683 if (!oh) 1684 return -EINVAL; 1685 1686 if (!soc_ops.deassert_hardreset) 1687 return -ENOSYS; 1688 1689 ret = _lookup_hardreset(oh, name, &ohri); 1690 if (ret < 0) 1691 return ret; 1692 1693 if (oh->clkdm) { 1694 /* 1695 * A clockdomain must be in SW_SUP otherwise reset 1696 * might not be completed. The clockdomain can be set 1697 * in HW_AUTO only when the module become ready. 1698 */ 1699 hwsup = clkdm_in_hwsup(oh->clkdm); 1700 ret = clkdm_hwmod_enable(oh->clkdm, oh); 1701 if (ret) { 1702 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n", 1703 oh->name, oh->clkdm->name, ret); 1704 return ret; 1705 } 1706 } 1707 1708 _enable_clocks(oh); 1709 if (soc_ops.enable_module) 1710 soc_ops.enable_module(oh); 1711 1712 ret = soc_ops.deassert_hardreset(oh, &ohri); 1713 1714 if (soc_ops.disable_module) 1715 soc_ops.disable_module(oh); 1716 _disable_clocks(oh); 1717 1718 if (ret == -EBUSY) 1719 pr_warn("omap_hwmod: %s: failed to hardreset\n", oh->name); 1720 1721 if (oh->clkdm) { 1722 /* 1723 * Set the clockdomain to HW_AUTO, assuming that the 1724 * previous state was HW_AUTO. 1725 */ 1726 if (hwsup) 1727 clkdm_allow_idle(oh->clkdm); 1728 1729 clkdm_hwmod_disable(oh->clkdm, oh); 1730 } 1731 1732 return ret; 1733 } 1734 1735 /** 1736 * _read_hardreset - read the HW reset line state of submodules 1737 * contained in the hwmod module 1738 * @oh: struct omap_hwmod * 1739 * @name: name of the reset line to look up and read 1740 * 1741 * Return the state of the reset line. Returns -EINVAL if @oh is 1742 * null, -ENOSYS if we have no way of reading the hardreset line 1743 * status on the currently-booted SoC, or passes along the return 1744 * value from _lookup_hardreset() or the SoC's is_hardreset_asserted 1745 * code. 1746 */ 1747 static int _read_hardreset(struct omap_hwmod *oh, const char *name) 1748 { 1749 struct omap_hwmod_rst_info ohri; 1750 int ret = -EINVAL; 1751 1752 if (!oh) 1753 return -EINVAL; 1754 1755 if (!soc_ops.is_hardreset_asserted) 1756 return -ENOSYS; 1757 1758 ret = _lookup_hardreset(oh, name, &ohri); 1759 if (ret < 0) 1760 return ret; 1761 1762 return soc_ops.is_hardreset_asserted(oh, &ohri); 1763 } 1764 1765 /** 1766 * _are_all_hardreset_lines_asserted - return true if the @oh is hard-reset 1767 * @oh: struct omap_hwmod * 1768 * 1769 * If all hardreset lines associated with @oh are asserted, then return true. 1770 * Otherwise, if part of @oh is out hardreset or if no hardreset lines 1771 * associated with @oh are asserted, then return false. 1772 * This function is used to avoid executing some parts of the IP block 1773 * enable/disable sequence if its hardreset line is set. 1774 */ 1775 static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh) 1776 { 1777 int i, rst_cnt = 0; 1778 1779 if (oh->rst_lines_cnt == 0) 1780 return false; 1781 1782 for (i = 0; i < oh->rst_lines_cnt; i++) 1783 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0) 1784 rst_cnt++; 1785 1786 if (oh->rst_lines_cnt == rst_cnt) 1787 return true; 1788 1789 return false; 1790 } 1791 1792 /** 1793 * _are_any_hardreset_lines_asserted - return true if any part of @oh is 1794 * hard-reset 1795 * @oh: struct omap_hwmod * 1796 * 1797 * If any hardreset lines associated with @oh are asserted, then 1798 * return true. Otherwise, if no hardreset lines associated with @oh 1799 * are asserted, or if @oh has no hardreset lines, then return false. 1800 * This function is used to avoid executing some parts of the IP block 1801 * enable/disable sequence if any hardreset line is set. 1802 */ 1803 static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh) 1804 { 1805 int rst_cnt = 0; 1806 int i; 1807 1808 for (i = 0; i < oh->rst_lines_cnt && rst_cnt == 0; i++) 1809 if (_read_hardreset(oh, oh->rst_lines[i].name) > 0) 1810 rst_cnt++; 1811 1812 return (rst_cnt) ? true : false; 1813 } 1814 1815 /** 1816 * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4 1817 * @oh: struct omap_hwmod * 1818 * 1819 * Disable the PRCM module mode related to the hwmod @oh. 1820 * Return EINVAL if the modulemode is not supported and 0 in case of success. 1821 */ 1822 static int _omap4_disable_module(struct omap_hwmod *oh) 1823 { 1824 int v; 1825 1826 if (!oh->clkdm || !oh->prcm.omap4.modulemode) 1827 return -EINVAL; 1828 1829 /* 1830 * Since integration code might still be doing something, only 1831 * disable if all lines are under hardreset. 1832 */ 1833 if (_are_any_hardreset_lines_asserted(oh)) 1834 return 0; 1835 1836 pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__); 1837 1838 omap_cm_module_disable(oh->clkdm->prcm_partition, oh->clkdm->cm_inst, 1839 oh->prcm.omap4.clkctrl_offs); 1840 1841 v = _omap4_wait_target_disable(oh); 1842 if (v) 1843 pr_warn("omap_hwmod: %s: _wait_target_disable failed\n", 1844 oh->name); 1845 1846 return 0; 1847 } 1848 1849 /** 1850 * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit 1851 * @oh: struct omap_hwmod * 1852 * 1853 * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be 1854 * enabled for this to work. Returns -ENOENT if the hwmod cannot be 1855 * reset this way, -EINVAL if the hwmod is in the wrong state, 1856 * -ETIMEDOUT if the module did not reset in time, or 0 upon success. 1857 * 1858 * In OMAP3 a specific SYSSTATUS register is used to get the reset status. 1859 * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead 1860 * use the SYSCONFIG softreset bit to provide the status. 1861 * 1862 * Note that some IP like McBSP do have reset control but don't have 1863 * reset status. 1864 */ 1865 static int _ocp_softreset(struct omap_hwmod *oh) 1866 { 1867 u32 v; 1868 int c = 0; 1869 int ret = 0; 1870 1871 if (!oh->class->sysc || 1872 !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET)) 1873 return -ENOENT; 1874 1875 /* clocks must be on for this operation */ 1876 if (oh->_state != _HWMOD_STATE_ENABLED) { 1877 pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n", 1878 oh->name); 1879 return -EINVAL; 1880 } 1881 1882 /* For some modules, all optionnal clocks need to be enabled as well */ 1883 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET) 1884 _enable_optional_clocks(oh); 1885 1886 pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name); 1887 1888 v = oh->_sysc_cache; 1889 ret = _set_softreset(oh, &v); 1890 if (ret) 1891 goto dis_opt_clks; 1892 1893 _write_sysconfig(v, oh); 1894 1895 if (oh->class->sysc->srst_udelay) 1896 udelay(oh->class->sysc->srst_udelay); 1897 1898 c = _wait_softreset_complete(oh); 1899 if (c == MAX_MODULE_SOFTRESET_WAIT) { 1900 pr_warn("omap_hwmod: %s: softreset failed (waited %d usec)\n", 1901 oh->name, MAX_MODULE_SOFTRESET_WAIT); 1902 ret = -ETIMEDOUT; 1903 goto dis_opt_clks; 1904 } else { 1905 pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c); 1906 } 1907 1908 ret = _clear_softreset(oh, &v); 1909 if (ret) 1910 goto dis_opt_clks; 1911 1912 _write_sysconfig(v, oh); 1913 1914 /* 1915 * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from 1916 * _wait_target_ready() or _reset() 1917 */ 1918 1919 dis_opt_clks: 1920 if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET) 1921 _disable_optional_clocks(oh); 1922 1923 return ret; 1924 } 1925 1926 /** 1927 * _reset - reset an omap_hwmod 1928 * @oh: struct omap_hwmod * 1929 * 1930 * Resets an omap_hwmod @oh. If the module has a custom reset 1931 * function pointer defined, then call it to reset the IP block, and 1932 * pass along its return value to the caller. Otherwise, if the IP 1933 * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield 1934 * associated with it, call a function to reset the IP block via that 1935 * method, and pass along the return value to the caller. Finally, if 1936 * the IP block has some hardreset lines associated with it, assert 1937 * all of those, but do _not_ deassert them. (This is because driver 1938 * authors have expressed an apparent requirement to control the 1939 * deassertion of the hardreset lines themselves.) 1940 * 1941 * The default software reset mechanism for most OMAP IP blocks is 1942 * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some 1943 * hwmods cannot be reset via this method. Some are not targets and 1944 * therefore have no OCP header registers to access. Others (like the 1945 * IVA) have idiosyncratic reset sequences. So for these relatively 1946 * rare cases, custom reset code can be supplied in the struct 1947 * omap_hwmod_class .reset function pointer. 1948 * 1949 * _set_dmadisable() is called to set the DMADISABLE bit so that it 1950 * does not prevent idling of the system. This is necessary for cases 1951 * where ROMCODE/BOOTLOADER uses dma and transfers control to the 1952 * kernel without disabling dma. 1953 * 1954 * Passes along the return value from either _ocp_softreset() or the 1955 * custom reset function - these must return -EINVAL if the hwmod 1956 * cannot be reset this way or if the hwmod is in the wrong state, 1957 * -ETIMEDOUT if the module did not reset in time, or 0 upon success. 1958 */ 1959 static int _reset(struct omap_hwmod *oh) 1960 { 1961 int i, r; 1962 1963 pr_debug("omap_hwmod: %s: resetting\n", oh->name); 1964 1965 if (oh->class->reset) { 1966 r = oh->class->reset(oh); 1967 } else { 1968 if (oh->rst_lines_cnt > 0) { 1969 for (i = 0; i < oh->rst_lines_cnt; i++) 1970 _assert_hardreset(oh, oh->rst_lines[i].name); 1971 return 0; 1972 } else { 1973 r = _ocp_softreset(oh); 1974 if (r == -ENOENT) 1975 r = 0; 1976 } 1977 } 1978 1979 _set_dmadisable(oh); 1980 1981 /* 1982 * OCP_SYSCONFIG bits need to be reprogrammed after a 1983 * softreset. The _enable() function should be split to avoid 1984 * the rewrite of the OCP_SYSCONFIG register. 1985 */ 1986 if (oh->class->sysc) { 1987 _update_sysc_cache(oh); 1988 _enable_sysc(oh); 1989 } 1990 1991 return r; 1992 } 1993 1994 /** 1995 * _reconfigure_io_chain - clear any I/O chain wakeups and reconfigure chain 1996 * 1997 * Call the appropriate PRM function to clear any logged I/O chain 1998 * wakeups and to reconfigure the chain. This apparently needs to be 1999 * done upon every mux change. Since hwmods can be concurrently 2000 * enabled and idled, hold a spinlock around the I/O chain 2001 * reconfiguration sequence. No return value. 2002 * 2003 * XXX When the PRM code is moved to drivers, this function can be removed, 2004 * as the PRM infrastructure should abstract this. 2005 */ 2006 static void _reconfigure_io_chain(void) 2007 { 2008 unsigned long flags; 2009 2010 spin_lock_irqsave(&io_chain_lock, flags); 2011 2012 omap_prm_reconfigure_io_chain(); 2013 2014 spin_unlock_irqrestore(&io_chain_lock, flags); 2015 } 2016 2017 /** 2018 * _omap4_update_context_lost - increment hwmod context loss counter if 2019 * hwmod context was lost, and clear hardware context loss reg 2020 * @oh: hwmod to check for context loss 2021 * 2022 * If the PRCM indicates that the hwmod @oh lost context, increment 2023 * our in-memory context loss counter, and clear the RM_*_CONTEXT 2024 * bits. No return value. 2025 */ 2026 static void _omap4_update_context_lost(struct omap_hwmod *oh) 2027 { 2028 if (oh->prcm.omap4.flags & HWMOD_OMAP4_NO_CONTEXT_LOSS_BIT) 2029 return; 2030 2031 if (!prm_was_any_context_lost_old(oh->clkdm->pwrdm.ptr->prcm_partition, 2032 oh->clkdm->pwrdm.ptr->prcm_offs, 2033 oh->prcm.omap4.context_offs)) 2034 return; 2035 2036 oh->prcm.omap4.context_lost_counter++; 2037 prm_clear_context_loss_flags_old(oh->clkdm->pwrdm.ptr->prcm_partition, 2038 oh->clkdm->pwrdm.ptr->prcm_offs, 2039 oh->prcm.omap4.context_offs); 2040 } 2041 2042 /** 2043 * _omap4_get_context_lost - get context loss counter for a hwmod 2044 * @oh: hwmod to get context loss counter for 2045 * 2046 * Returns the in-memory context loss counter for a hwmod. 2047 */ 2048 static int _omap4_get_context_lost(struct omap_hwmod *oh) 2049 { 2050 return oh->prcm.omap4.context_lost_counter; 2051 } 2052 2053 /** 2054 * _enable_preprogram - Pre-program an IP block during the _enable() process 2055 * @oh: struct omap_hwmod * 2056 * 2057 * Some IP blocks (such as AESS) require some additional programming 2058 * after enable before they can enter idle. If a function pointer to 2059 * do so is present in the hwmod data, then call it and pass along the 2060 * return value; otherwise, return 0. 2061 */ 2062 static int _enable_preprogram(struct omap_hwmod *oh) 2063 { 2064 if (!oh->class->enable_preprogram) 2065 return 0; 2066 2067 return oh->class->enable_preprogram(oh); 2068 } 2069 2070 /** 2071 * _enable - enable an omap_hwmod 2072 * @oh: struct omap_hwmod * 2073 * 2074 * Enables an omap_hwmod @oh such that the MPU can access the hwmod's 2075 * register target. Returns -EINVAL if the hwmod is in the wrong 2076 * state or passes along the return value of _wait_target_ready(). 2077 */ 2078 static int _enable(struct omap_hwmod *oh) 2079 { 2080 int r; 2081 int hwsup = 0; 2082 2083 pr_debug("omap_hwmod: %s: enabling\n", oh->name); 2084 2085 /* 2086 * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled 2087 * state at init. Now that someone is really trying to enable 2088 * them, just ensure that the hwmod mux is set. 2089 */ 2090 if (oh->_int_flags & _HWMOD_SKIP_ENABLE) { 2091 /* 2092 * If the caller has mux data populated, do the mux'ing 2093 * which wouldn't have been done as part of the _enable() 2094 * done during setup. 2095 */ 2096 if (oh->mux) 2097 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED); 2098 2099 oh->_int_flags &= ~_HWMOD_SKIP_ENABLE; 2100 return 0; 2101 } 2102 2103 if (oh->_state != _HWMOD_STATE_INITIALIZED && 2104 oh->_state != _HWMOD_STATE_IDLE && 2105 oh->_state != _HWMOD_STATE_DISABLED) { 2106 WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n", 2107 oh->name); 2108 return -EINVAL; 2109 } 2110 2111 /* 2112 * If an IP block contains HW reset lines and all of them are 2113 * asserted, we let integration code associated with that 2114 * block handle the enable. We've received very little 2115 * information on what those driver authors need, and until 2116 * detailed information is provided and the driver code is 2117 * posted to the public lists, this is probably the best we 2118 * can do. 2119 */ 2120 if (_are_all_hardreset_lines_asserted(oh)) 2121 return 0; 2122 2123 /* Mux pins for device runtime if populated */ 2124 if (oh->mux && (!oh->mux->enabled || 2125 ((oh->_state == _HWMOD_STATE_IDLE) && 2126 oh->mux->pads_dynamic))) { 2127 omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED); 2128 _reconfigure_io_chain(); 2129 } else if (oh->flags & HWMOD_RECONFIG_IO_CHAIN) { 2130 _reconfigure_io_chain(); 2131 } 2132 2133 _add_initiator_dep(oh, mpu_oh); 2134 2135 if (oh->clkdm) { 2136 /* 2137 * A clockdomain must be in SW_SUP before enabling 2138 * completely the module. The clockdomain can be set 2139 * in HW_AUTO only when the module become ready. 2140 */ 2141 hwsup = clkdm_in_hwsup(oh->clkdm) && 2142 !clkdm_missing_idle_reporting(oh->clkdm); 2143 r = clkdm_hwmod_enable(oh->clkdm, oh); 2144 if (r) { 2145 WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n", 2146 oh->name, oh->clkdm->name, r); 2147 return r; 2148 } 2149 } 2150 2151 _enable_clocks(oh); 2152 if (soc_ops.enable_module) 2153 soc_ops.enable_module(oh); 2154 if (oh->flags & HWMOD_BLOCK_WFI) 2155 cpu_idle_poll_ctrl(true); 2156 2157 if (soc_ops.update_context_lost) 2158 soc_ops.update_context_lost(oh); 2159 2160 r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) : 2161 -EINVAL; 2162 if (!r) { 2163 /* 2164 * Set the clockdomain to HW_AUTO only if the target is ready, 2165 * assuming that the previous state was HW_AUTO 2166 */ 2167 if (oh->clkdm && hwsup) 2168 clkdm_allow_idle(oh->clkdm); 2169 2170 oh->_state = _HWMOD_STATE_ENABLED; 2171 2172 /* Access the sysconfig only if the target is ready */ 2173 if (oh->class->sysc) { 2174 if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED)) 2175 _update_sysc_cache(oh); 2176 _enable_sysc(oh); 2177 } 2178 r = _enable_preprogram(oh); 2179 } else { 2180 if (soc_ops.disable_module) 2181 soc_ops.disable_module(oh); 2182 _disable_clocks(oh); 2183 pr_err("omap_hwmod: %s: _wait_target_ready failed: %d\n", 2184 oh->name, r); 2185 2186 if (oh->clkdm) 2187 clkdm_hwmod_disable(oh->clkdm, oh); 2188 } 2189 2190 return r; 2191 } 2192 2193 /** 2194 * _idle - idle an omap_hwmod 2195 * @oh: struct omap_hwmod * 2196 * 2197 * Idles an omap_hwmod @oh. This should be called once the hwmod has 2198 * no further work. Returns -EINVAL if the hwmod is in the wrong 2199 * state or returns 0. 2200 */ 2201 static int _idle(struct omap_hwmod *oh) 2202 { 2203 pr_debug("omap_hwmod: %s: idling\n", oh->name); 2204 2205 if (oh->_state != _HWMOD_STATE_ENABLED) { 2206 WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n", 2207 oh->name); 2208 return -EINVAL; 2209 } 2210 2211 if (_are_all_hardreset_lines_asserted(oh)) 2212 return 0; 2213 2214 if (oh->class->sysc) 2215 _idle_sysc(oh); 2216 _del_initiator_dep(oh, mpu_oh); 2217 2218 if (oh->flags & HWMOD_BLOCK_WFI) 2219 cpu_idle_poll_ctrl(false); 2220 if (soc_ops.disable_module) 2221 soc_ops.disable_module(oh); 2222 2223 /* 2224 * The module must be in idle mode before disabling any parents 2225 * clocks. Otherwise, the parent clock might be disabled before 2226 * the module transition is done, and thus will prevent the 2227 * transition to complete properly. 2228 */ 2229 _disable_clocks(oh); 2230 if (oh->clkdm) 2231 clkdm_hwmod_disable(oh->clkdm, oh); 2232 2233 /* Mux pins for device idle if populated */ 2234 if (oh->mux && oh->mux->pads_dynamic) { 2235 omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE); 2236 _reconfigure_io_chain(); 2237 } else if (oh->flags & HWMOD_RECONFIG_IO_CHAIN) { 2238 _reconfigure_io_chain(); 2239 } 2240 2241 oh->_state = _HWMOD_STATE_IDLE; 2242 2243 return 0; 2244 } 2245 2246 /** 2247 * _shutdown - shutdown an omap_hwmod 2248 * @oh: struct omap_hwmod * 2249 * 2250 * Shut down an omap_hwmod @oh. This should be called when the driver 2251 * used for the hwmod is removed or unloaded or if the driver is not 2252 * used by the system. Returns -EINVAL if the hwmod is in the wrong 2253 * state or returns 0. 2254 */ 2255 static int _shutdown(struct omap_hwmod *oh) 2256 { 2257 int ret, i; 2258 u8 prev_state; 2259 2260 if (oh->_state != _HWMOD_STATE_IDLE && 2261 oh->_state != _HWMOD_STATE_ENABLED) { 2262 WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n", 2263 oh->name); 2264 return -EINVAL; 2265 } 2266 2267 if (_are_all_hardreset_lines_asserted(oh)) 2268 return 0; 2269 2270 pr_debug("omap_hwmod: %s: disabling\n", oh->name); 2271 2272 if (oh->class->pre_shutdown) { 2273 prev_state = oh->_state; 2274 if (oh->_state == _HWMOD_STATE_IDLE) 2275 _enable(oh); 2276 ret = oh->class->pre_shutdown(oh); 2277 if (ret) { 2278 if (prev_state == _HWMOD_STATE_IDLE) 2279 _idle(oh); 2280 return ret; 2281 } 2282 } 2283 2284 if (oh->class->sysc) { 2285 if (oh->_state == _HWMOD_STATE_IDLE) 2286 _enable(oh); 2287 _shutdown_sysc(oh); 2288 } 2289 2290 /* clocks and deps are already disabled in idle */ 2291 if (oh->_state == _HWMOD_STATE_ENABLED) { 2292 _del_initiator_dep(oh, mpu_oh); 2293 /* XXX what about the other system initiators here? dma, dsp */ 2294 if (oh->flags & HWMOD_BLOCK_WFI) 2295 cpu_idle_poll_ctrl(false); 2296 if (soc_ops.disable_module) 2297 soc_ops.disable_module(oh); 2298 _disable_clocks(oh); 2299 if (oh->clkdm) 2300 clkdm_hwmod_disable(oh->clkdm, oh); 2301 } 2302 /* XXX Should this code also force-disable the optional clocks? */ 2303 2304 for (i = 0; i < oh->rst_lines_cnt; i++) 2305 _assert_hardreset(oh, oh->rst_lines[i].name); 2306 2307 /* Mux pins to safe mode or use populated off mode values */ 2308 if (oh->mux) 2309 omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED); 2310 2311 oh->_state = _HWMOD_STATE_DISABLED; 2312 2313 return 0; 2314 } 2315 2316 static int of_dev_find_hwmod(struct device_node *np, 2317 struct omap_hwmod *oh) 2318 { 2319 int count, i, res; 2320 const char *p; 2321 2322 count = of_property_count_strings(np, "ti,hwmods"); 2323 if (count < 1) 2324 return -ENODEV; 2325 2326 for (i = 0; i < count; i++) { 2327 res = of_property_read_string_index(np, "ti,hwmods", 2328 i, &p); 2329 if (res) 2330 continue; 2331 if (!strcmp(p, oh->name)) { 2332 pr_debug("omap_hwmod: dt %s[%i] uses hwmod %s\n", 2333 np->name, i, oh->name); 2334 return i; 2335 } 2336 } 2337 2338 return -ENODEV; 2339 } 2340 2341 /** 2342 * of_dev_hwmod_lookup - look up needed hwmod from dt blob 2343 * @np: struct device_node * 2344 * @oh: struct omap_hwmod * 2345 * @index: index of the entry found 2346 * @found: struct device_node * found or NULL 2347 * 2348 * Parse the dt blob and find out needed hwmod. Recursive function is 2349 * implemented to take care hierarchical dt blob parsing. 2350 * Return: Returns 0 on success, -ENODEV when not found. 2351 */ 2352 static int of_dev_hwmod_lookup(struct device_node *np, 2353 struct omap_hwmod *oh, 2354 int *index, 2355 struct device_node **found) 2356 { 2357 struct device_node *np0 = NULL; 2358 int res; 2359 2360 res = of_dev_find_hwmod(np, oh); 2361 if (res >= 0) { 2362 *found = np; 2363 *index = res; 2364 return 0; 2365 } 2366 2367 for_each_child_of_node(np, np0) { 2368 struct device_node *fc; 2369 int i; 2370 2371 res = of_dev_hwmod_lookup(np0, oh, &i, &fc); 2372 if (res == 0) { 2373 *found = fc; 2374 *index = i; 2375 return 0; 2376 } 2377 } 2378 2379 *found = NULL; 2380 *index = 0; 2381 2382 return -ENODEV; 2383 } 2384 2385 /** 2386 * _init_mpu_rt_base - populate the virtual address for a hwmod 2387 * @oh: struct omap_hwmod * to locate the virtual address 2388 * @data: (unused, caller should pass NULL) 2389 * @index: index of the reg entry iospace in device tree 2390 * @np: struct device_node * of the IP block's device node in the DT data 2391 * 2392 * Cache the virtual address used by the MPU to access this IP block's 2393 * registers. This address is needed early so the OCP registers that 2394 * are part of the device's address space can be ioremapped properly. 2395 * 2396 * If SYSC access is not needed, the registers will not be remapped 2397 * and non-availability of MPU access is not treated as an error. 2398 * 2399 * Returns 0 on success, -EINVAL if an invalid hwmod is passed, and 2400 * -ENXIO on absent or invalid register target address space. 2401 */ 2402 static int __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data, 2403 int index, struct device_node *np) 2404 { 2405 struct omap_hwmod_addr_space *mem; 2406 void __iomem *va_start = NULL; 2407 2408 if (!oh) 2409 return -EINVAL; 2410 2411 _save_mpu_port_index(oh); 2412 2413 /* if we don't need sysc access we don't need to ioremap */ 2414 if (!oh->class->sysc) 2415 return 0; 2416 2417 /* we can't continue without MPU PORT if we need sysc access */ 2418 if (oh->_int_flags & _HWMOD_NO_MPU_PORT) 2419 return -ENXIO; 2420 2421 mem = _find_mpu_rt_addr_space(oh); 2422 if (!mem) { 2423 pr_debug("omap_hwmod: %s: no MPU register target found\n", 2424 oh->name); 2425 2426 /* Extract the IO space from device tree blob */ 2427 if (!np) { 2428 pr_err("omap_hwmod: %s: no dt node\n", oh->name); 2429 return -ENXIO; 2430 } 2431 2432 va_start = of_iomap(np, index + oh->mpu_rt_idx); 2433 } else { 2434 va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start); 2435 } 2436 2437 if (!va_start) { 2438 if (mem) 2439 pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name); 2440 else 2441 pr_err("omap_hwmod: %s: Missing dt reg%i for %s\n", 2442 oh->name, index, np->full_name); 2443 return -ENXIO; 2444 } 2445 2446 pr_debug("omap_hwmod: %s: MPU register target at va %p\n", 2447 oh->name, va_start); 2448 2449 oh->_mpu_rt_va = va_start; 2450 return 0; 2451 } 2452 2453 /** 2454 * _init - initialize internal data for the hwmod @oh 2455 * @oh: struct omap_hwmod * 2456 * @n: (unused) 2457 * 2458 * Look up the clocks and the address space used by the MPU to access 2459 * registers belonging to the hwmod @oh. @oh must already be 2460 * registered at this point. This is the first of two phases for 2461 * hwmod initialization. Code called here does not touch any hardware 2462 * registers, it simply prepares internal data structures. Returns 0 2463 * upon success or if the hwmod isn't registered or if the hwmod's 2464 * address space is not defined, or -EINVAL upon failure. 2465 */ 2466 static int __init _init(struct omap_hwmod *oh, void *data) 2467 { 2468 int r, index; 2469 struct device_node *np = NULL; 2470 2471 if (oh->_state != _HWMOD_STATE_REGISTERED) 2472 return 0; 2473 2474 if (of_have_populated_dt()) { 2475 struct device_node *bus; 2476 2477 bus = of_find_node_by_name(NULL, "ocp"); 2478 if (!bus) 2479 return -ENODEV; 2480 2481 r = of_dev_hwmod_lookup(bus, oh, &index, &np); 2482 if (r) 2483 pr_debug("omap_hwmod: %s missing dt data\n", oh->name); 2484 else if (np && index) 2485 pr_warn("omap_hwmod: %s using broken dt data from %s\n", 2486 oh->name, np->name); 2487 } 2488 2489 r = _init_mpu_rt_base(oh, NULL, index, np); 2490 if (r < 0) { 2491 WARN(1, "omap_hwmod: %s: doesn't have mpu register target base\n", 2492 oh->name); 2493 return 0; 2494 } 2495 2496 r = _init_clocks(oh, NULL); 2497 if (r < 0) { 2498 WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name); 2499 return -EINVAL; 2500 } 2501 2502 if (np) { 2503 if (of_find_property(np, "ti,no-reset-on-init", NULL)) 2504 oh->flags |= HWMOD_INIT_NO_RESET; 2505 if (of_find_property(np, "ti,no-idle-on-init", NULL)) 2506 oh->flags |= HWMOD_INIT_NO_IDLE; 2507 } 2508 2509 oh->_state = _HWMOD_STATE_INITIALIZED; 2510 2511 return 0; 2512 } 2513 2514 /** 2515 * _setup_iclk_autoidle - configure an IP block's interface clocks 2516 * @oh: struct omap_hwmod * 2517 * 2518 * Set up the module's interface clocks. XXX This function is still mostly 2519 * a stub; implementing this properly requires iclk autoidle usecounting in 2520 * the clock code. No return value. 2521 */ 2522 static void __init _setup_iclk_autoidle(struct omap_hwmod *oh) 2523 { 2524 struct omap_hwmod_ocp_if *os; 2525 struct list_head *p; 2526 int i = 0; 2527 if (oh->_state != _HWMOD_STATE_INITIALIZED) 2528 return; 2529 2530 p = oh->slave_ports.next; 2531 2532 while (i < oh->slaves_cnt) { 2533 os = _fetch_next_ocp_if(&p, &i); 2534 if (!os->_clk) 2535 continue; 2536 2537 if (os->flags & OCPIF_SWSUP_IDLE) { 2538 /* XXX omap_iclk_deny_idle(c); */ 2539 } else { 2540 /* XXX omap_iclk_allow_idle(c); */ 2541 clk_enable(os->_clk); 2542 } 2543 } 2544 2545 return; 2546 } 2547 2548 /** 2549 * _setup_reset - reset an IP block during the setup process 2550 * @oh: struct omap_hwmod * 2551 * 2552 * Reset the IP block corresponding to the hwmod @oh during the setup 2553 * process. The IP block is first enabled so it can be successfully 2554 * reset. Returns 0 upon success or a negative error code upon 2555 * failure. 2556 */ 2557 static int __init _setup_reset(struct omap_hwmod *oh) 2558 { 2559 int r; 2560 2561 if (oh->_state != _HWMOD_STATE_INITIALIZED) 2562 return -EINVAL; 2563 2564 if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK) 2565 return -EPERM; 2566 2567 if (oh->rst_lines_cnt == 0) { 2568 r = _enable(oh); 2569 if (r) { 2570 pr_warn("omap_hwmod: %s: cannot be enabled for reset (%d)\n", 2571 oh->name, oh->_state); 2572 return -EINVAL; 2573 } 2574 } 2575 2576 if (!(oh->flags & HWMOD_INIT_NO_RESET)) 2577 r = _reset(oh); 2578 2579 return r; 2580 } 2581 2582 /** 2583 * _setup_postsetup - transition to the appropriate state after _setup 2584 * @oh: struct omap_hwmod * 2585 * 2586 * Place an IP block represented by @oh into a "post-setup" state -- 2587 * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that 2588 * this function is called at the end of _setup().) The postsetup 2589 * state for an IP block can be changed by calling 2590 * omap_hwmod_enter_postsetup_state() early in the boot process, 2591 * before one of the omap_hwmod_setup*() functions are called for the 2592 * IP block. 2593 * 2594 * The IP block stays in this state until a PM runtime-based driver is 2595 * loaded for that IP block. A post-setup state of IDLE is 2596 * appropriate for almost all IP blocks with runtime PM-enabled 2597 * drivers, since those drivers are able to enable the IP block. A 2598 * post-setup state of ENABLED is appropriate for kernels with PM 2599 * runtime disabled. The DISABLED state is appropriate for unusual IP 2600 * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers 2601 * included, since the WDTIMER starts running on reset and will reset 2602 * the MPU if left active. 2603 * 2604 * This post-setup mechanism is deprecated. Once all of the OMAP 2605 * drivers have been converted to use PM runtime, and all of the IP 2606 * block data and interconnect data is available to the hwmod code, it 2607 * should be possible to replace this mechanism with a "lazy reset" 2608 * arrangement. In a "lazy reset" setup, each IP block is enabled 2609 * when the driver first probes, then all remaining IP blocks without 2610 * drivers are either shut down or enabled after the drivers have 2611 * loaded. However, this cannot take place until the above 2612 * preconditions have been met, since otherwise the late reset code 2613 * has no way of knowing which IP blocks are in use by drivers, and 2614 * which ones are unused. 2615 * 2616 * No return value. 2617 */ 2618 static void __init _setup_postsetup(struct omap_hwmod *oh) 2619 { 2620 u8 postsetup_state; 2621 2622 if (oh->rst_lines_cnt > 0) 2623 return; 2624 2625 postsetup_state = oh->_postsetup_state; 2626 if (postsetup_state == _HWMOD_STATE_UNKNOWN) 2627 postsetup_state = _HWMOD_STATE_ENABLED; 2628 2629 /* 2630 * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data - 2631 * it should be set by the core code as a runtime flag during startup 2632 */ 2633 if ((oh->flags & HWMOD_INIT_NO_IDLE) && 2634 (postsetup_state == _HWMOD_STATE_IDLE)) { 2635 oh->_int_flags |= _HWMOD_SKIP_ENABLE; 2636 postsetup_state = _HWMOD_STATE_ENABLED; 2637 } 2638 2639 if (postsetup_state == _HWMOD_STATE_IDLE) 2640 _idle(oh); 2641 else if (postsetup_state == _HWMOD_STATE_DISABLED) 2642 _shutdown(oh); 2643 else if (postsetup_state != _HWMOD_STATE_ENABLED) 2644 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n", 2645 oh->name, postsetup_state); 2646 2647 return; 2648 } 2649 2650 /** 2651 * _setup - prepare IP block hardware for use 2652 * @oh: struct omap_hwmod * 2653 * @n: (unused, pass NULL) 2654 * 2655 * Configure the IP block represented by @oh. This may include 2656 * enabling the IP block, resetting it, and placing it into a 2657 * post-setup state, depending on the type of IP block and applicable 2658 * flags. IP blocks are reset to prevent any previous configuration 2659 * by the bootloader or previous operating system from interfering 2660 * with power management or other parts of the system. The reset can 2661 * be avoided; see omap_hwmod_no_setup_reset(). This is the second of 2662 * two phases for hwmod initialization. Code called here generally 2663 * affects the IP block hardware, or system integration hardware 2664 * associated with the IP block. Returns 0. 2665 */ 2666 static int __init _setup(struct omap_hwmod *oh, void *data) 2667 { 2668 if (oh->_state != _HWMOD_STATE_INITIALIZED) 2669 return 0; 2670 2671 if (oh->parent_hwmod) { 2672 int r; 2673 2674 r = _enable(oh->parent_hwmod); 2675 WARN(r, "hwmod: %s: setup: failed to enable parent hwmod %s\n", 2676 oh->name, oh->parent_hwmod->name); 2677 } 2678 2679 _setup_iclk_autoidle(oh); 2680 2681 if (!_setup_reset(oh)) 2682 _setup_postsetup(oh); 2683 2684 if (oh->parent_hwmod) { 2685 u8 postsetup_state; 2686 2687 postsetup_state = oh->parent_hwmod->_postsetup_state; 2688 2689 if (postsetup_state == _HWMOD_STATE_IDLE) 2690 _idle(oh->parent_hwmod); 2691 else if (postsetup_state == _HWMOD_STATE_DISABLED) 2692 _shutdown(oh->parent_hwmod); 2693 else if (postsetup_state != _HWMOD_STATE_ENABLED) 2694 WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n", 2695 oh->parent_hwmod->name, postsetup_state); 2696 } 2697 2698 return 0; 2699 } 2700 2701 /** 2702 * _register - register a struct omap_hwmod 2703 * @oh: struct omap_hwmod * 2704 * 2705 * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod 2706 * already has been registered by the same name; -EINVAL if the 2707 * omap_hwmod is in the wrong state, if @oh is NULL, if the 2708 * omap_hwmod's class field is NULL; if the omap_hwmod is missing a 2709 * name, or if the omap_hwmod's class is missing a name; or 0 upon 2710 * success. 2711 * 2712 * XXX The data should be copied into bootmem, so the original data 2713 * should be marked __initdata and freed after init. This would allow 2714 * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note 2715 * that the copy process would be relatively complex due to the large number 2716 * of substructures. 2717 */ 2718 static int __init _register(struct omap_hwmod *oh) 2719 { 2720 if (!oh || !oh->name || !oh->class || !oh->class->name || 2721 (oh->_state != _HWMOD_STATE_UNKNOWN)) 2722 return -EINVAL; 2723 2724 pr_debug("omap_hwmod: %s: registering\n", oh->name); 2725 2726 if (_lookup(oh->name)) 2727 return -EEXIST; 2728 2729 list_add_tail(&oh->node, &omap_hwmod_list); 2730 2731 INIT_LIST_HEAD(&oh->master_ports); 2732 INIT_LIST_HEAD(&oh->slave_ports); 2733 spin_lock_init(&oh->_lock); 2734 lockdep_set_class(&oh->_lock, &oh->hwmod_key); 2735 2736 oh->_state = _HWMOD_STATE_REGISTERED; 2737 2738 /* 2739 * XXX Rather than doing a strcmp(), this should test a flag 2740 * set in the hwmod data, inserted by the autogenerator code. 2741 */ 2742 if (!strcmp(oh->name, MPU_INITIATOR_NAME)) 2743 mpu_oh = oh; 2744 2745 return 0; 2746 } 2747 2748 /** 2749 * _alloc_links - return allocated memory for hwmod links 2750 * @ml: pointer to a struct omap_hwmod_link * for the master link 2751 * @sl: pointer to a struct omap_hwmod_link * for the slave link 2752 * 2753 * Return pointers to two struct omap_hwmod_link records, via the 2754 * addresses pointed to by @ml and @sl. Will first attempt to return 2755 * memory allocated as part of a large initial block, but if that has 2756 * been exhausted, will allocate memory itself. Since ideally this 2757 * second allocation path will never occur, the number of these 2758 * 'supplemental' allocations will be logged when debugging is 2759 * enabled. Returns 0. 2760 */ 2761 static int __init _alloc_links(struct omap_hwmod_link **ml, 2762 struct omap_hwmod_link **sl) 2763 { 2764 unsigned int sz; 2765 2766 if ((free_ls + LINKS_PER_OCP_IF) <= max_ls) { 2767 *ml = &linkspace[free_ls++]; 2768 *sl = &linkspace[free_ls++]; 2769 return 0; 2770 } 2771 2772 sz = sizeof(struct omap_hwmod_link) * LINKS_PER_OCP_IF; 2773 2774 *sl = NULL; 2775 *ml = memblock_virt_alloc(sz, 0); 2776 2777 *sl = (void *)(*ml) + sizeof(struct omap_hwmod_link); 2778 2779 ls_supp++; 2780 pr_debug("omap_hwmod: supplemental link allocations needed: %d\n", 2781 ls_supp * LINKS_PER_OCP_IF); 2782 2783 return 0; 2784 }; 2785 2786 /** 2787 * _add_link - add an interconnect between two IP blocks 2788 * @oi: pointer to a struct omap_hwmod_ocp_if record 2789 * 2790 * Add struct omap_hwmod_link records connecting the master IP block 2791 * specified in @oi->master to @oi, and connecting the slave IP block 2792 * specified in @oi->slave to @oi. This code is assumed to run before 2793 * preemption or SMP has been enabled, thus avoiding the need for 2794 * locking in this code. Changes to this assumption will require 2795 * additional locking. Returns 0. 2796 */ 2797 static int __init _add_link(struct omap_hwmod_ocp_if *oi) 2798 { 2799 struct omap_hwmod_link *ml, *sl; 2800 2801 pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name, 2802 oi->slave->name); 2803 2804 _alloc_links(&ml, &sl); 2805 2806 ml->ocp_if = oi; 2807 list_add(&ml->node, &oi->master->master_ports); 2808 oi->master->masters_cnt++; 2809 2810 sl->ocp_if = oi; 2811 list_add(&sl->node, &oi->slave->slave_ports); 2812 oi->slave->slaves_cnt++; 2813 2814 return 0; 2815 } 2816 2817 /** 2818 * _register_link - register a struct omap_hwmod_ocp_if 2819 * @oi: struct omap_hwmod_ocp_if * 2820 * 2821 * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it 2822 * has already been registered; -EINVAL if @oi is NULL or if the 2823 * record pointed to by @oi is missing required fields; or 0 upon 2824 * success. 2825 * 2826 * XXX The data should be copied into bootmem, so the original data 2827 * should be marked __initdata and freed after init. This would allow 2828 * unneeded omap_hwmods to be freed on multi-OMAP configurations. 2829 */ 2830 static int __init _register_link(struct omap_hwmod_ocp_if *oi) 2831 { 2832 if (!oi || !oi->master || !oi->slave || !oi->user) 2833 return -EINVAL; 2834 2835 if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED) 2836 return -EEXIST; 2837 2838 pr_debug("omap_hwmod: registering link from %s to %s\n", 2839 oi->master->name, oi->slave->name); 2840 2841 /* 2842 * Register the connected hwmods, if they haven't been 2843 * registered already 2844 */ 2845 if (oi->master->_state != _HWMOD_STATE_REGISTERED) 2846 _register(oi->master); 2847 2848 if (oi->slave->_state != _HWMOD_STATE_REGISTERED) 2849 _register(oi->slave); 2850 2851 _add_link(oi); 2852 2853 oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED; 2854 2855 return 0; 2856 } 2857 2858 /** 2859 * _alloc_linkspace - allocate large block of hwmod links 2860 * @ois: pointer to an array of struct omap_hwmod_ocp_if records to count 2861 * 2862 * Allocate a large block of struct omap_hwmod_link records. This 2863 * improves boot time significantly by avoiding the need to allocate 2864 * individual records one by one. If the number of records to 2865 * allocate in the block hasn't been manually specified, this function 2866 * will count the number of struct omap_hwmod_ocp_if records in @ois 2867 * and use that to determine the allocation size. For SoC families 2868 * that require multiple list registrations, such as OMAP3xxx, this 2869 * estimation process isn't optimal, so manual estimation is advised 2870 * in those cases. Returns -EEXIST if the allocation has already occurred 2871 * or 0 upon success. 2872 */ 2873 static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois) 2874 { 2875 unsigned int i = 0; 2876 unsigned int sz; 2877 2878 if (linkspace) { 2879 WARN(1, "linkspace already allocated\n"); 2880 return -EEXIST; 2881 } 2882 2883 if (max_ls == 0) 2884 while (ois[i++]) 2885 max_ls += LINKS_PER_OCP_IF; 2886 2887 sz = sizeof(struct omap_hwmod_link) * max_ls; 2888 2889 pr_debug("omap_hwmod: %s: allocating %d byte linkspace (%d links)\n", 2890 __func__, sz, max_ls); 2891 2892 linkspace = memblock_virt_alloc(sz, 0); 2893 2894 return 0; 2895 } 2896 2897 /* Static functions intended only for use in soc_ops field function pointers */ 2898 2899 /** 2900 * _omap2xxx_3xxx_wait_target_ready - wait for a module to leave slave idle 2901 * @oh: struct omap_hwmod * 2902 * 2903 * Wait for a module @oh to leave slave idle. Returns 0 if the module 2904 * does not have an IDLEST bit or if the module successfully leaves 2905 * slave idle; otherwise, pass along the return value of the 2906 * appropriate *_cm*_wait_module_ready() function. 2907 */ 2908 static int _omap2xxx_3xxx_wait_target_ready(struct omap_hwmod *oh) 2909 { 2910 if (!oh) 2911 return -EINVAL; 2912 2913 if (oh->flags & HWMOD_NO_IDLEST) 2914 return 0; 2915 2916 if (!_find_mpu_rt_port(oh)) 2917 return 0; 2918 2919 /* XXX check module SIDLEMODE, hardreset status, enabled clocks */ 2920 2921 return omap_cm_wait_module_ready(0, oh->prcm.omap2.module_offs, 2922 oh->prcm.omap2.idlest_reg_id, 2923 oh->prcm.omap2.idlest_idle_bit); 2924 } 2925 2926 /** 2927 * _omap4_wait_target_ready - wait for a module to leave slave idle 2928 * @oh: struct omap_hwmod * 2929 * 2930 * Wait for a module @oh to leave slave idle. Returns 0 if the module 2931 * does not have an IDLEST bit or if the module successfully leaves 2932 * slave idle; otherwise, pass along the return value of the 2933 * appropriate *_cm*_wait_module_ready() function. 2934 */ 2935 static int _omap4_wait_target_ready(struct omap_hwmod *oh) 2936 { 2937 if (!oh) 2938 return -EINVAL; 2939 2940 if (oh->flags & HWMOD_NO_IDLEST || !oh->clkdm) 2941 return 0; 2942 2943 if (!_find_mpu_rt_port(oh)) 2944 return 0; 2945 2946 /* XXX check module SIDLEMODE, hardreset status */ 2947 2948 return omap_cm_wait_module_ready(oh->clkdm->prcm_partition, 2949 oh->clkdm->cm_inst, 2950 oh->prcm.omap4.clkctrl_offs, 0); 2951 } 2952 2953 /** 2954 * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args 2955 * @oh: struct omap_hwmod * to assert hardreset 2956 * @ohri: hardreset line data 2957 * 2958 * Call omap2_prm_assert_hardreset() with parameters extracted from 2959 * the hwmod @oh and the hardreset line data @ohri. Only intended for 2960 * use as an soc_ops function pointer. Passes along the return value 2961 * from omap2_prm_assert_hardreset(). XXX This function is scheduled 2962 * for removal when the PRM code is moved into drivers/. 2963 */ 2964 static int _omap2_assert_hardreset(struct omap_hwmod *oh, 2965 struct omap_hwmod_rst_info *ohri) 2966 { 2967 return omap_prm_assert_hardreset(ohri->rst_shift, 0, 2968 oh->prcm.omap2.module_offs, 0); 2969 } 2970 2971 /** 2972 * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args 2973 * @oh: struct omap_hwmod * to deassert hardreset 2974 * @ohri: hardreset line data 2975 * 2976 * Call omap2_prm_deassert_hardreset() with parameters extracted from 2977 * the hwmod @oh and the hardreset line data @ohri. Only intended for 2978 * use as an soc_ops function pointer. Passes along the return value 2979 * from omap2_prm_deassert_hardreset(). XXX This function is 2980 * scheduled for removal when the PRM code is moved into drivers/. 2981 */ 2982 static int _omap2_deassert_hardreset(struct omap_hwmod *oh, 2983 struct omap_hwmod_rst_info *ohri) 2984 { 2985 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift, 0, 2986 oh->prcm.omap2.module_offs, 0, 0); 2987 } 2988 2989 /** 2990 * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args 2991 * @oh: struct omap_hwmod * to test hardreset 2992 * @ohri: hardreset line data 2993 * 2994 * Call omap2_prm_is_hardreset_asserted() with parameters extracted 2995 * from the hwmod @oh and the hardreset line data @ohri. Only 2996 * intended for use as an soc_ops function pointer. Passes along the 2997 * return value from omap2_prm_is_hardreset_asserted(). XXX This 2998 * function is scheduled for removal when the PRM code is moved into 2999 * drivers/. 3000 */ 3001 static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh, 3002 struct omap_hwmod_rst_info *ohri) 3003 { 3004 return omap_prm_is_hardreset_asserted(ohri->st_shift, 0, 3005 oh->prcm.omap2.module_offs, 0); 3006 } 3007 3008 /** 3009 * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args 3010 * @oh: struct omap_hwmod * to assert hardreset 3011 * @ohri: hardreset line data 3012 * 3013 * Call omap4_prminst_assert_hardreset() with parameters extracted 3014 * from the hwmod @oh and the hardreset line data @ohri. Only 3015 * intended for use as an soc_ops function pointer. Passes along the 3016 * return value from omap4_prminst_assert_hardreset(). XXX This 3017 * function is scheduled for removal when the PRM code is moved into 3018 * drivers/. 3019 */ 3020 static int _omap4_assert_hardreset(struct omap_hwmod *oh, 3021 struct omap_hwmod_rst_info *ohri) 3022 { 3023 if (!oh->clkdm) 3024 return -EINVAL; 3025 3026 return omap_prm_assert_hardreset(ohri->rst_shift, 3027 oh->clkdm->pwrdm.ptr->prcm_partition, 3028 oh->clkdm->pwrdm.ptr->prcm_offs, 3029 oh->prcm.omap4.rstctrl_offs); 3030 } 3031 3032 /** 3033 * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args 3034 * @oh: struct omap_hwmod * to deassert hardreset 3035 * @ohri: hardreset line data 3036 * 3037 * Call omap4_prminst_deassert_hardreset() with parameters extracted 3038 * from the hwmod @oh and the hardreset line data @ohri. Only 3039 * intended for use as an soc_ops function pointer. Passes along the 3040 * return value from omap4_prminst_deassert_hardreset(). XXX This 3041 * function is scheduled for removal when the PRM code is moved into 3042 * drivers/. 3043 */ 3044 static int _omap4_deassert_hardreset(struct omap_hwmod *oh, 3045 struct omap_hwmod_rst_info *ohri) 3046 { 3047 if (!oh->clkdm) 3048 return -EINVAL; 3049 3050 if (ohri->st_shift) 3051 pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n", 3052 oh->name, ohri->name); 3053 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->rst_shift, 3054 oh->clkdm->pwrdm.ptr->prcm_partition, 3055 oh->clkdm->pwrdm.ptr->prcm_offs, 3056 oh->prcm.omap4.rstctrl_offs, 3057 oh->prcm.omap4.rstctrl_offs + 3058 OMAP4_RST_CTRL_ST_OFFSET); 3059 } 3060 3061 /** 3062 * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args 3063 * @oh: struct omap_hwmod * to test hardreset 3064 * @ohri: hardreset line data 3065 * 3066 * Call omap4_prminst_is_hardreset_asserted() with parameters 3067 * extracted from the hwmod @oh and the hardreset line data @ohri. 3068 * Only intended for use as an soc_ops function pointer. Passes along 3069 * the return value from omap4_prminst_is_hardreset_asserted(). XXX 3070 * This function is scheduled for removal when the PRM code is moved 3071 * into drivers/. 3072 */ 3073 static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh, 3074 struct omap_hwmod_rst_info *ohri) 3075 { 3076 if (!oh->clkdm) 3077 return -EINVAL; 3078 3079 return omap_prm_is_hardreset_asserted(ohri->rst_shift, 3080 oh->clkdm->pwrdm.ptr-> 3081 prcm_partition, 3082 oh->clkdm->pwrdm.ptr->prcm_offs, 3083 oh->prcm.omap4.rstctrl_offs); 3084 } 3085 3086 /** 3087 * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args 3088 * @oh: struct omap_hwmod * to deassert hardreset 3089 * @ohri: hardreset line data 3090 * 3091 * Call am33xx_prminst_deassert_hardreset() with parameters extracted 3092 * from the hwmod @oh and the hardreset line data @ohri. Only 3093 * intended for use as an soc_ops function pointer. Passes along the 3094 * return value from am33xx_prminst_deassert_hardreset(). XXX This 3095 * function is scheduled for removal when the PRM code is moved into 3096 * drivers/. 3097 */ 3098 static int _am33xx_deassert_hardreset(struct omap_hwmod *oh, 3099 struct omap_hwmod_rst_info *ohri) 3100 { 3101 return omap_prm_deassert_hardreset(ohri->rst_shift, ohri->st_shift, 3102 oh->clkdm->pwrdm.ptr->prcm_partition, 3103 oh->clkdm->pwrdm.ptr->prcm_offs, 3104 oh->prcm.omap4.rstctrl_offs, 3105 oh->prcm.omap4.rstst_offs); 3106 } 3107 3108 /* Public functions */ 3109 3110 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs) 3111 { 3112 if (oh->flags & HWMOD_16BIT_REG) 3113 return readw_relaxed(oh->_mpu_rt_va + reg_offs); 3114 else 3115 return readl_relaxed(oh->_mpu_rt_va + reg_offs); 3116 } 3117 3118 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs) 3119 { 3120 if (oh->flags & HWMOD_16BIT_REG) 3121 writew_relaxed(v, oh->_mpu_rt_va + reg_offs); 3122 else 3123 writel_relaxed(v, oh->_mpu_rt_va + reg_offs); 3124 } 3125 3126 /** 3127 * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit 3128 * @oh: struct omap_hwmod * 3129 * 3130 * This is a public function exposed to drivers. Some drivers may need to do 3131 * some settings before and after resetting the device. Those drivers after 3132 * doing the necessary settings could use this function to start a reset by 3133 * setting the SYSCONFIG.SOFTRESET bit. 3134 */ 3135 int omap_hwmod_softreset(struct omap_hwmod *oh) 3136 { 3137 u32 v; 3138 int ret; 3139 3140 if (!oh || !(oh->_sysc_cache)) 3141 return -EINVAL; 3142 3143 v = oh->_sysc_cache; 3144 ret = _set_softreset(oh, &v); 3145 if (ret) 3146 goto error; 3147 _write_sysconfig(v, oh); 3148 3149 ret = _clear_softreset(oh, &v); 3150 if (ret) 3151 goto error; 3152 _write_sysconfig(v, oh); 3153 3154 error: 3155 return ret; 3156 } 3157 3158 /** 3159 * omap_hwmod_lookup - look up a registered omap_hwmod by name 3160 * @name: name of the omap_hwmod to look up 3161 * 3162 * Given a @name of an omap_hwmod, return a pointer to the registered 3163 * struct omap_hwmod *, or NULL upon error. 3164 */ 3165 struct omap_hwmod *omap_hwmod_lookup(const char *name) 3166 { 3167 struct omap_hwmod *oh; 3168 3169 if (!name) 3170 return NULL; 3171 3172 oh = _lookup(name); 3173 3174 return oh; 3175 } 3176 3177 /** 3178 * omap_hwmod_for_each - call function for each registered omap_hwmod 3179 * @fn: pointer to a callback function 3180 * @data: void * data to pass to callback function 3181 * 3182 * Call @fn for each registered omap_hwmod, passing @data to each 3183 * function. @fn must return 0 for success or any other value for 3184 * failure. If @fn returns non-zero, the iteration across omap_hwmods 3185 * will stop and the non-zero return value will be passed to the 3186 * caller of omap_hwmod_for_each(). @fn is called with 3187 * omap_hwmod_for_each() held. 3188 */ 3189 int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data), 3190 void *data) 3191 { 3192 struct omap_hwmod *temp_oh; 3193 int ret = 0; 3194 3195 if (!fn) 3196 return -EINVAL; 3197 3198 list_for_each_entry(temp_oh, &omap_hwmod_list, node) { 3199 ret = (*fn)(temp_oh, data); 3200 if (ret) 3201 break; 3202 } 3203 3204 return ret; 3205 } 3206 3207 /** 3208 * omap_hwmod_register_links - register an array of hwmod links 3209 * @ois: pointer to an array of omap_hwmod_ocp_if to register 3210 * 3211 * Intended to be called early in boot before the clock framework is 3212 * initialized. If @ois is not null, will register all omap_hwmods 3213 * listed in @ois that are valid for this chip. Returns -EINVAL if 3214 * omap_hwmod_init() hasn't been called before calling this function, 3215 * -ENOMEM if the link memory area can't be allocated, or 0 upon 3216 * success. 3217 */ 3218 int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois) 3219 { 3220 int r, i; 3221 3222 if (!inited) 3223 return -EINVAL; 3224 3225 if (!ois) 3226 return 0; 3227 3228 if (ois[0] == NULL) /* Empty list */ 3229 return 0; 3230 3231 if (!linkspace) { 3232 if (_alloc_linkspace(ois)) { 3233 pr_err("omap_hwmod: could not allocate link space\n"); 3234 return -ENOMEM; 3235 } 3236 } 3237 3238 i = 0; 3239 do { 3240 r = _register_link(ois[i]); 3241 WARN(r && r != -EEXIST, 3242 "omap_hwmod: _register_link(%s -> %s) returned %d\n", 3243 ois[i]->master->name, ois[i]->slave->name, r); 3244 } while (ois[++i]); 3245 3246 return 0; 3247 } 3248 3249 /** 3250 * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up 3251 * @oh: pointer to the hwmod currently being set up (usually not the MPU) 3252 * 3253 * If the hwmod data corresponding to the MPU subsystem IP block 3254 * hasn't been initialized and set up yet, do so now. This must be 3255 * done first since sleep dependencies may be added from other hwmods 3256 * to the MPU. Intended to be called only by omap_hwmod_setup*(). No 3257 * return value. 3258 */ 3259 static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh) 3260 { 3261 if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN) 3262 pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n", 3263 __func__, MPU_INITIATOR_NAME); 3264 else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh) 3265 omap_hwmod_setup_one(MPU_INITIATOR_NAME); 3266 } 3267 3268 /** 3269 * omap_hwmod_setup_one - set up a single hwmod 3270 * @oh_name: const char * name of the already-registered hwmod to set up 3271 * 3272 * Initialize and set up a single hwmod. Intended to be used for a 3273 * small number of early devices, such as the timer IP blocks used for 3274 * the scheduler clock. Must be called after omap2_clk_init(). 3275 * Resolves the struct clk names to struct clk pointers for each 3276 * registered omap_hwmod. Also calls _setup() on each hwmod. Returns 3277 * -EINVAL upon error or 0 upon success. 3278 */ 3279 int __init omap_hwmod_setup_one(const char *oh_name) 3280 { 3281 struct omap_hwmod *oh; 3282 3283 pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__); 3284 3285 oh = _lookup(oh_name); 3286 if (!oh) { 3287 WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name); 3288 return -EINVAL; 3289 } 3290 3291 _ensure_mpu_hwmod_is_setup(oh); 3292 3293 _init(oh, NULL); 3294 _setup(oh, NULL); 3295 3296 return 0; 3297 } 3298 3299 /** 3300 * omap_hwmod_setup_all - set up all registered IP blocks 3301 * 3302 * Initialize and set up all IP blocks registered with the hwmod code. 3303 * Must be called after omap2_clk_init(). Resolves the struct clk 3304 * names to struct clk pointers for each registered omap_hwmod. Also 3305 * calls _setup() on each hwmod. Returns 0 upon success. 3306 */ 3307 static int __init omap_hwmod_setup_all(void) 3308 { 3309 _ensure_mpu_hwmod_is_setup(NULL); 3310 3311 omap_hwmod_for_each(_init, NULL); 3312 omap_hwmod_for_each(_setup, NULL); 3313 3314 return 0; 3315 } 3316 omap_postcore_initcall(omap_hwmod_setup_all); 3317 3318 /** 3319 * omap_hwmod_enable - enable an omap_hwmod 3320 * @oh: struct omap_hwmod * 3321 * 3322 * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable(). 3323 * Returns -EINVAL on error or passes along the return value from _enable(). 3324 */ 3325 int omap_hwmod_enable(struct omap_hwmod *oh) 3326 { 3327 int r; 3328 unsigned long flags; 3329 3330 if (!oh) 3331 return -EINVAL; 3332 3333 spin_lock_irqsave(&oh->_lock, flags); 3334 r = _enable(oh); 3335 spin_unlock_irqrestore(&oh->_lock, flags); 3336 3337 return r; 3338 } 3339 3340 /** 3341 * omap_hwmod_idle - idle an omap_hwmod 3342 * @oh: struct omap_hwmod * 3343 * 3344 * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle(). 3345 * Returns -EINVAL on error or passes along the return value from _idle(). 3346 */ 3347 int omap_hwmod_idle(struct omap_hwmod *oh) 3348 { 3349 int r; 3350 unsigned long flags; 3351 3352 if (!oh) 3353 return -EINVAL; 3354 3355 spin_lock_irqsave(&oh->_lock, flags); 3356 r = _idle(oh); 3357 spin_unlock_irqrestore(&oh->_lock, flags); 3358 3359 return r; 3360 } 3361 3362 /** 3363 * omap_hwmod_shutdown - shutdown an omap_hwmod 3364 * @oh: struct omap_hwmod * 3365 * 3366 * Shutdown an omap_hwmod @oh. Intended to be called by 3367 * omap_device_shutdown(). Returns -EINVAL on error or passes along 3368 * the return value from _shutdown(). 3369 */ 3370 int omap_hwmod_shutdown(struct omap_hwmod *oh) 3371 { 3372 int r; 3373 unsigned long flags; 3374 3375 if (!oh) 3376 return -EINVAL; 3377 3378 spin_lock_irqsave(&oh->_lock, flags); 3379 r = _shutdown(oh); 3380 spin_unlock_irqrestore(&oh->_lock, flags); 3381 3382 return r; 3383 } 3384 3385 /* 3386 * IP block data retrieval functions 3387 */ 3388 3389 /** 3390 * omap_hwmod_count_resources - count number of struct resources needed by hwmod 3391 * @oh: struct omap_hwmod * 3392 * @flags: Type of resources to include when counting (IRQ/DMA/MEM) 3393 * 3394 * Count the number of struct resource array elements necessary to 3395 * contain omap_hwmod @oh resources. Intended to be called by code 3396 * that registers omap_devices. Intended to be used to determine the 3397 * size of a dynamically-allocated struct resource array, before 3398 * calling omap_hwmod_fill_resources(). Returns the number of struct 3399 * resource array elements needed. 3400 * 3401 * XXX This code is not optimized. It could attempt to merge adjacent 3402 * resource IDs. 3403 * 3404 */ 3405 int omap_hwmod_count_resources(struct omap_hwmod *oh, unsigned long flags) 3406 { 3407 int ret = 0; 3408 3409 if (flags & IORESOURCE_IRQ) 3410 ret += _count_mpu_irqs(oh); 3411 3412 if (flags & IORESOURCE_DMA) 3413 ret += _count_sdma_reqs(oh); 3414 3415 if (flags & IORESOURCE_MEM) { 3416 int i = 0; 3417 struct omap_hwmod_ocp_if *os; 3418 struct list_head *p = oh->slave_ports.next; 3419 3420 while (i < oh->slaves_cnt) { 3421 os = _fetch_next_ocp_if(&p, &i); 3422 ret += _count_ocp_if_addr_spaces(os); 3423 } 3424 } 3425 3426 return ret; 3427 } 3428 3429 /** 3430 * omap_hwmod_fill_resources - fill struct resource array with hwmod data 3431 * @oh: struct omap_hwmod * 3432 * @res: pointer to the first element of an array of struct resource to fill 3433 * 3434 * Fill the struct resource array @res with resource data from the 3435 * omap_hwmod @oh. Intended to be called by code that registers 3436 * omap_devices. See also omap_hwmod_count_resources(). Returns the 3437 * number of array elements filled. 3438 */ 3439 int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res) 3440 { 3441 struct omap_hwmod_ocp_if *os; 3442 struct list_head *p; 3443 int i, j, mpu_irqs_cnt, sdma_reqs_cnt, addr_cnt; 3444 int r = 0; 3445 3446 /* For each IRQ, DMA, memory area, fill in array.*/ 3447 3448 mpu_irqs_cnt = _count_mpu_irqs(oh); 3449 for (i = 0; i < mpu_irqs_cnt; i++) { 3450 unsigned int irq; 3451 3452 if (oh->xlate_irq) 3453 irq = oh->xlate_irq((oh->mpu_irqs + i)->irq); 3454 else 3455 irq = (oh->mpu_irqs + i)->irq; 3456 (res + r)->name = (oh->mpu_irqs + i)->name; 3457 (res + r)->start = irq; 3458 (res + r)->end = irq; 3459 (res + r)->flags = IORESOURCE_IRQ; 3460 r++; 3461 } 3462 3463 sdma_reqs_cnt = _count_sdma_reqs(oh); 3464 for (i = 0; i < sdma_reqs_cnt; i++) { 3465 (res + r)->name = (oh->sdma_reqs + i)->name; 3466 (res + r)->start = (oh->sdma_reqs + i)->dma_req; 3467 (res + r)->end = (oh->sdma_reqs + i)->dma_req; 3468 (res + r)->flags = IORESOURCE_DMA; 3469 r++; 3470 } 3471 3472 p = oh->slave_ports.next; 3473 3474 i = 0; 3475 while (i < oh->slaves_cnt) { 3476 os = _fetch_next_ocp_if(&p, &i); 3477 addr_cnt = _count_ocp_if_addr_spaces(os); 3478 3479 for (j = 0; j < addr_cnt; j++) { 3480 (res + r)->name = (os->addr + j)->name; 3481 (res + r)->start = (os->addr + j)->pa_start; 3482 (res + r)->end = (os->addr + j)->pa_end; 3483 (res + r)->flags = IORESOURCE_MEM; 3484 r++; 3485 } 3486 } 3487 3488 return r; 3489 } 3490 3491 /** 3492 * omap_hwmod_fill_dma_resources - fill struct resource array with dma data 3493 * @oh: struct omap_hwmod * 3494 * @res: pointer to the array of struct resource to fill 3495 * 3496 * Fill the struct resource array @res with dma resource data from the 3497 * omap_hwmod @oh. Intended to be called by code that registers 3498 * omap_devices. See also omap_hwmod_count_resources(). Returns the 3499 * number of array elements filled. 3500 */ 3501 int omap_hwmod_fill_dma_resources(struct omap_hwmod *oh, struct resource *res) 3502 { 3503 int i, sdma_reqs_cnt; 3504 int r = 0; 3505 3506 sdma_reqs_cnt = _count_sdma_reqs(oh); 3507 for (i = 0; i < sdma_reqs_cnt; i++) { 3508 (res + r)->name = (oh->sdma_reqs + i)->name; 3509 (res + r)->start = (oh->sdma_reqs + i)->dma_req; 3510 (res + r)->end = (oh->sdma_reqs + i)->dma_req; 3511 (res + r)->flags = IORESOURCE_DMA; 3512 r++; 3513 } 3514 3515 return r; 3516 } 3517 3518 /** 3519 * omap_hwmod_get_resource_byname - fetch IP block integration data by name 3520 * @oh: struct omap_hwmod * to operate on 3521 * @type: one of the IORESOURCE_* constants from include/linux/ioport.h 3522 * @name: pointer to the name of the data to fetch (optional) 3523 * @rsrc: pointer to a struct resource, allocated by the caller 3524 * 3525 * Retrieve MPU IRQ, SDMA request line, or address space start/end 3526 * data for the IP block pointed to by @oh. The data will be filled 3527 * into a struct resource record pointed to by @rsrc. The struct 3528 * resource must be allocated by the caller. When @name is non-null, 3529 * the data associated with the matching entry in the IRQ/SDMA/address 3530 * space hwmod data arrays will be returned. If @name is null, the 3531 * first array entry will be returned. Data order is not meaningful 3532 * in hwmod data, so callers are strongly encouraged to use a non-null 3533 * @name whenever possible to avoid unpredictable effects if hwmod 3534 * data is later added that causes data ordering to change. This 3535 * function is only intended for use by OMAP core code. Device 3536 * drivers should not call this function - the appropriate bus-related 3537 * data accessor functions should be used instead. Returns 0 upon 3538 * success or a negative error code upon error. 3539 */ 3540 int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type, 3541 const char *name, struct resource *rsrc) 3542 { 3543 int r; 3544 unsigned int irq, dma; 3545 u32 pa_start, pa_end; 3546 3547 if (!oh || !rsrc) 3548 return -EINVAL; 3549 3550 if (type == IORESOURCE_IRQ) { 3551 r = _get_mpu_irq_by_name(oh, name, &irq); 3552 if (r) 3553 return r; 3554 3555 rsrc->start = irq; 3556 rsrc->end = irq; 3557 } else if (type == IORESOURCE_DMA) { 3558 r = _get_sdma_req_by_name(oh, name, &dma); 3559 if (r) 3560 return r; 3561 3562 rsrc->start = dma; 3563 rsrc->end = dma; 3564 } else if (type == IORESOURCE_MEM) { 3565 r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end); 3566 if (r) 3567 return r; 3568 3569 rsrc->start = pa_start; 3570 rsrc->end = pa_end; 3571 } else { 3572 return -EINVAL; 3573 } 3574 3575 rsrc->flags = type; 3576 rsrc->name = name; 3577 3578 return 0; 3579 } 3580 3581 /** 3582 * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain 3583 * @oh: struct omap_hwmod * 3584 * 3585 * Return the powerdomain pointer associated with the OMAP module 3586 * @oh's main clock. If @oh does not have a main clk, return the 3587 * powerdomain associated with the interface clock associated with the 3588 * module's MPU port. (XXX Perhaps this should use the SDMA port 3589 * instead?) Returns NULL on error, or a struct powerdomain * on 3590 * success. 3591 */ 3592 struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh) 3593 { 3594 struct clk *c; 3595 struct omap_hwmod_ocp_if *oi; 3596 struct clockdomain *clkdm; 3597 struct clk_hw_omap *clk; 3598 3599 if (!oh) 3600 return NULL; 3601 3602 if (oh->clkdm) 3603 return oh->clkdm->pwrdm.ptr; 3604 3605 if (oh->_clk) { 3606 c = oh->_clk; 3607 } else { 3608 oi = _find_mpu_rt_port(oh); 3609 if (!oi) 3610 return NULL; 3611 c = oi->_clk; 3612 } 3613 3614 clk = to_clk_hw_omap(__clk_get_hw(c)); 3615 clkdm = clk->clkdm; 3616 if (!clkdm) 3617 return NULL; 3618 3619 return clkdm->pwrdm.ptr; 3620 } 3621 3622 /** 3623 * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU) 3624 * @oh: struct omap_hwmod * 3625 * 3626 * Returns the virtual address corresponding to the beginning of the 3627 * module's register target, in the address range that is intended to 3628 * be used by the MPU. Returns the virtual address upon success or NULL 3629 * upon error. 3630 */ 3631 void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh) 3632 { 3633 if (!oh) 3634 return NULL; 3635 3636 if (oh->_int_flags & _HWMOD_NO_MPU_PORT) 3637 return NULL; 3638 3639 if (oh->_state == _HWMOD_STATE_UNKNOWN) 3640 return NULL; 3641 3642 return oh->_mpu_rt_va; 3643 } 3644 3645 /* 3646 * XXX what about functions for drivers to save/restore ocp_sysconfig 3647 * for context save/restore operations? 3648 */ 3649 3650 /** 3651 * omap_hwmod_enable_wakeup - allow device to wake up the system 3652 * @oh: struct omap_hwmod * 3653 * 3654 * Sets the module OCP socket ENAWAKEUP bit to allow the module to 3655 * send wakeups to the PRCM, and enable I/O ring wakeup events for 3656 * this IP block if it has dynamic mux entries. Eventually this 3657 * should set PRCM wakeup registers to cause the PRCM to receive 3658 * wakeup events from the module. Does not set any wakeup routing 3659 * registers beyond this point - if the module is to wake up any other 3660 * module or subsystem, that must be set separately. Called by 3661 * omap_device code. Returns -EINVAL on error or 0 upon success. 3662 */ 3663 int omap_hwmod_enable_wakeup(struct omap_hwmod *oh) 3664 { 3665 unsigned long flags; 3666 u32 v; 3667 3668 spin_lock_irqsave(&oh->_lock, flags); 3669 3670 if (oh->class->sysc && 3671 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) { 3672 v = oh->_sysc_cache; 3673 _enable_wakeup(oh, &v); 3674 _write_sysconfig(v, oh); 3675 } 3676 3677 _set_idle_ioring_wakeup(oh, true); 3678 spin_unlock_irqrestore(&oh->_lock, flags); 3679 3680 return 0; 3681 } 3682 3683 /** 3684 * omap_hwmod_disable_wakeup - prevent device from waking the system 3685 * @oh: struct omap_hwmod * 3686 * 3687 * Clears the module OCP socket ENAWAKEUP bit to prevent the module 3688 * from sending wakeups to the PRCM, and disable I/O ring wakeup 3689 * events for this IP block if it has dynamic mux entries. Eventually 3690 * this should clear PRCM wakeup registers to cause the PRCM to ignore 3691 * wakeup events from the module. Does not set any wakeup routing 3692 * registers beyond this point - if the module is to wake up any other 3693 * module or subsystem, that must be set separately. Called by 3694 * omap_device code. Returns -EINVAL on error or 0 upon success. 3695 */ 3696 int omap_hwmod_disable_wakeup(struct omap_hwmod *oh) 3697 { 3698 unsigned long flags; 3699 u32 v; 3700 3701 spin_lock_irqsave(&oh->_lock, flags); 3702 3703 if (oh->class->sysc && 3704 (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) { 3705 v = oh->_sysc_cache; 3706 _disable_wakeup(oh, &v); 3707 _write_sysconfig(v, oh); 3708 } 3709 3710 _set_idle_ioring_wakeup(oh, false); 3711 spin_unlock_irqrestore(&oh->_lock, flags); 3712 3713 return 0; 3714 } 3715 3716 /** 3717 * omap_hwmod_assert_hardreset - assert the HW reset line of submodules 3718 * contained in the hwmod module. 3719 * @oh: struct omap_hwmod * 3720 * @name: name of the reset line to lookup and assert 3721 * 3722 * Some IP like dsp, ipu or iva contain processor that require 3723 * an HW reset line to be assert / deassert in order to enable fully 3724 * the IP. Returns -EINVAL if @oh is null or if the operation is not 3725 * yet supported on this OMAP; otherwise, passes along the return value 3726 * from _assert_hardreset(). 3727 */ 3728 int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name) 3729 { 3730 int ret; 3731 unsigned long flags; 3732 3733 if (!oh) 3734 return -EINVAL; 3735 3736 spin_lock_irqsave(&oh->_lock, flags); 3737 ret = _assert_hardreset(oh, name); 3738 spin_unlock_irqrestore(&oh->_lock, flags); 3739 3740 return ret; 3741 } 3742 3743 /** 3744 * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules 3745 * contained in the hwmod module. 3746 * @oh: struct omap_hwmod * 3747 * @name: name of the reset line to look up and deassert 3748 * 3749 * Some IP like dsp, ipu or iva contain processor that require 3750 * an HW reset line to be assert / deassert in order to enable fully 3751 * the IP. Returns -EINVAL if @oh is null or if the operation is not 3752 * yet supported on this OMAP; otherwise, passes along the return value 3753 * from _deassert_hardreset(). 3754 */ 3755 int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name) 3756 { 3757 int ret; 3758 unsigned long flags; 3759 3760 if (!oh) 3761 return -EINVAL; 3762 3763 spin_lock_irqsave(&oh->_lock, flags); 3764 ret = _deassert_hardreset(oh, name); 3765 spin_unlock_irqrestore(&oh->_lock, flags); 3766 3767 return ret; 3768 } 3769 3770 /** 3771 * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname 3772 * @classname: struct omap_hwmod_class name to search for 3773 * @fn: callback function pointer to call for each hwmod in class @classname 3774 * @user: arbitrary context data to pass to the callback function 3775 * 3776 * For each omap_hwmod of class @classname, call @fn. 3777 * If the callback function returns something other than 3778 * zero, the iterator is terminated, and the callback function's return 3779 * value is passed back to the caller. Returns 0 upon success, -EINVAL 3780 * if @classname or @fn are NULL, or passes back the error code from @fn. 3781 */ 3782 int omap_hwmod_for_each_by_class(const char *classname, 3783 int (*fn)(struct omap_hwmod *oh, 3784 void *user), 3785 void *user) 3786 { 3787 struct omap_hwmod *temp_oh; 3788 int ret = 0; 3789 3790 if (!classname || !fn) 3791 return -EINVAL; 3792 3793 pr_debug("omap_hwmod: %s: looking for modules of class %s\n", 3794 __func__, classname); 3795 3796 list_for_each_entry(temp_oh, &omap_hwmod_list, node) { 3797 if (!strcmp(temp_oh->class->name, classname)) { 3798 pr_debug("omap_hwmod: %s: %s: calling callback fn\n", 3799 __func__, temp_oh->name); 3800 ret = (*fn)(temp_oh, user); 3801 if (ret) 3802 break; 3803 } 3804 } 3805 3806 if (ret) 3807 pr_debug("omap_hwmod: %s: iterator terminated early: %d\n", 3808 __func__, ret); 3809 3810 return ret; 3811 } 3812 3813 /** 3814 * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod 3815 * @oh: struct omap_hwmod * 3816 * @state: state that _setup() should leave the hwmod in 3817 * 3818 * Sets the hwmod state that @oh will enter at the end of _setup() 3819 * (called by omap_hwmod_setup_*()). See also the documentation 3820 * for _setup_postsetup(), above. Returns 0 upon success or 3821 * -EINVAL if there is a problem with the arguments or if the hwmod is 3822 * in the wrong state. 3823 */ 3824 int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state) 3825 { 3826 int ret; 3827 unsigned long flags; 3828 3829 if (!oh) 3830 return -EINVAL; 3831 3832 if (state != _HWMOD_STATE_DISABLED && 3833 state != _HWMOD_STATE_ENABLED && 3834 state != _HWMOD_STATE_IDLE) 3835 return -EINVAL; 3836 3837 spin_lock_irqsave(&oh->_lock, flags); 3838 3839 if (oh->_state != _HWMOD_STATE_REGISTERED) { 3840 ret = -EINVAL; 3841 goto ohsps_unlock; 3842 } 3843 3844 oh->_postsetup_state = state; 3845 ret = 0; 3846 3847 ohsps_unlock: 3848 spin_unlock_irqrestore(&oh->_lock, flags); 3849 3850 return ret; 3851 } 3852 3853 /** 3854 * omap_hwmod_get_context_loss_count - get lost context count 3855 * @oh: struct omap_hwmod * 3856 * 3857 * Returns the context loss count of associated @oh 3858 * upon success, or zero if no context loss data is available. 3859 * 3860 * On OMAP4, this queries the per-hwmod context loss register, 3861 * assuming one exists. If not, or on OMAP2/3, this queries the 3862 * enclosing powerdomain context loss count. 3863 */ 3864 int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh) 3865 { 3866 struct powerdomain *pwrdm; 3867 int ret = 0; 3868 3869 if (soc_ops.get_context_lost) 3870 return soc_ops.get_context_lost(oh); 3871 3872 pwrdm = omap_hwmod_get_pwrdm(oh); 3873 if (pwrdm) 3874 ret = pwrdm_get_context_loss_count(pwrdm); 3875 3876 return ret; 3877 } 3878 3879 /** 3880 * omap_hwmod_init - initialize the hwmod code 3881 * 3882 * Sets up some function pointers needed by the hwmod code to operate on the 3883 * currently-booted SoC. Intended to be called once during kernel init 3884 * before any hwmods are registered. No return value. 3885 */ 3886 void __init omap_hwmod_init(void) 3887 { 3888 if (cpu_is_omap24xx()) { 3889 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready; 3890 soc_ops.assert_hardreset = _omap2_assert_hardreset; 3891 soc_ops.deassert_hardreset = _omap2_deassert_hardreset; 3892 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted; 3893 } else if (cpu_is_omap34xx()) { 3894 soc_ops.wait_target_ready = _omap2xxx_3xxx_wait_target_ready; 3895 soc_ops.assert_hardreset = _omap2_assert_hardreset; 3896 soc_ops.deassert_hardreset = _omap2_deassert_hardreset; 3897 soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted; 3898 soc_ops.init_clkdm = _init_clkdm; 3899 } else if (cpu_is_omap44xx() || soc_is_omap54xx() || soc_is_dra7xx()) { 3900 soc_ops.enable_module = _omap4_enable_module; 3901 soc_ops.disable_module = _omap4_disable_module; 3902 soc_ops.wait_target_ready = _omap4_wait_target_ready; 3903 soc_ops.assert_hardreset = _omap4_assert_hardreset; 3904 soc_ops.deassert_hardreset = _omap4_deassert_hardreset; 3905 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted; 3906 soc_ops.init_clkdm = _init_clkdm; 3907 soc_ops.update_context_lost = _omap4_update_context_lost; 3908 soc_ops.get_context_lost = _omap4_get_context_lost; 3909 } else if (cpu_is_ti814x() || cpu_is_ti816x() || soc_is_am33xx() || 3910 soc_is_am43xx()) { 3911 soc_ops.enable_module = _omap4_enable_module; 3912 soc_ops.disable_module = _omap4_disable_module; 3913 soc_ops.wait_target_ready = _omap4_wait_target_ready; 3914 soc_ops.assert_hardreset = _omap4_assert_hardreset; 3915 soc_ops.deassert_hardreset = _am33xx_deassert_hardreset; 3916 soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted; 3917 soc_ops.init_clkdm = _init_clkdm; 3918 } else { 3919 WARN(1, "omap_hwmod: unknown SoC type\n"); 3920 } 3921 3922 inited = true; 3923 } 3924 3925 /** 3926 * omap_hwmod_get_main_clk - get pointer to main clock name 3927 * @oh: struct omap_hwmod * 3928 * 3929 * Returns the main clock name assocated with @oh upon success, 3930 * or NULL if @oh is NULL. 3931 */ 3932 const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh) 3933 { 3934 if (!oh) 3935 return NULL; 3936 3937 return oh->main_clk; 3938 } 3939