xref: /openbmc/linux/arch/arm/mach-omap2/omap4-common.c (revision df2634f43f5106947f3735a0b61a6527a4b278cd)
1 /*
2  * OMAP4 specific common source file.
3  *
4  * Copyright (C) 2010 Texas Instruments, Inc.
5  * Author:
6  *	Santosh Shilimkar <santosh.shilimkar@ti.com>
7  *
8  *
9  * This program is free software,you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2 as
11  * published by the Free Software Foundation.
12  */
13 
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/io.h>
17 #include <linux/platform_device.h>
18 
19 #include <asm/hardware/gic.h>
20 #include <asm/hardware/cache-l2x0.h>
21 
22 #include <mach/hardware.h>
23 #include <mach/omap4-common.h>
24 
25 #ifdef CONFIG_CACHE_L2X0
26 void __iomem *l2cache_base;
27 #endif
28 
29 void __iomem *gic_dist_base_addr;
30 
31 
32 void __init gic_init_irq(void)
33 {
34 	void __iomem *gic_cpu_base;
35 
36 	/* Static mapping, never released */
37 	gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K);
38 	BUG_ON(!gic_dist_base_addr);
39 
40 	/* Static mapping, never released */
41 	gic_cpu_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512);
42 	BUG_ON(!gic_cpu_base);
43 
44 	gic_init(0, 29, gic_dist_base_addr, gic_cpu_base);
45 }
46 
47 #ifdef CONFIG_CACHE_L2X0
48 
49 static void omap4_l2x0_disable(void)
50 {
51 	/* Disable PL310 L2 Cache controller */
52 	omap_smc1(0x102, 0x0);
53 }
54 
55 static int __init omap_l2_cache_init(void)
56 {
57 	u32 aux_ctrl = 0;
58 
59 	/*
60 	 * To avoid code running on other OMAPs in
61 	 * multi-omap builds
62 	 */
63 	if (!cpu_is_omap44xx())
64 		return -ENODEV;
65 
66 	/* Static mapping, never released */
67 	l2cache_base = ioremap(OMAP44XX_L2CACHE_BASE, SZ_4K);
68 	BUG_ON(!l2cache_base);
69 
70 	/*
71 	 * 16-way associativity, parity disabled
72 	 * Way size - 32KB (es1.0)
73 	 * Way size - 64KB (es2.0 +)
74 	 */
75 	aux_ctrl = ((1 << L2X0_AUX_CTRL_ASSOCIATIVITY_SHIFT) |
76 			(0x1 << 25) |
77 			(0x1 << L2X0_AUX_CTRL_NS_LOCKDOWN_SHIFT) |
78 			(0x1 << L2X0_AUX_CTRL_NS_INT_CTRL_SHIFT));
79 
80 	if (omap_rev() == OMAP4430_REV_ES1_0) {
81 		aux_ctrl |= 0x2 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT;
82 	} else {
83 		aux_ctrl |= ((0x3 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT) |
84 			(1 << L2X0_AUX_CTRL_SHARE_OVERRIDE_SHIFT) |
85 			(1 << L2X0_AUX_CTRL_DATA_PREFETCH_SHIFT) |
86 			(1 << L2X0_AUX_CTRL_INSTR_PREFETCH_SHIFT) |
87 			(1 << L2X0_AUX_CTRL_EARLY_BRESP_SHIFT));
88 	}
89 	if (omap_rev() != OMAP4430_REV_ES1_0)
90 		omap_smc1(0x109, aux_ctrl);
91 
92 	/* Enable PL310 L2 Cache controller */
93 	omap_smc1(0x102, 0x1);
94 
95 	l2x0_init(l2cache_base, aux_ctrl, L2X0_AUX_CTRL_MASK);
96 
97 	/*
98 	 * Override default outer_cache.disable with a OMAP4
99 	 * specific one
100 	*/
101 	outer_cache.disable = omap4_l2x0_disable;
102 
103 	return 0;
104 }
105 early_initcall(omap_l2_cache_init);
106 #endif
107