1 /* 2 * OMAP4 specific common source file. 3 * 4 * Copyright (C) 2010 Texas Instruments, Inc. 5 * Author: 6 * Santosh Shilimkar <santosh.shilimkar@ti.com> 7 * 8 * 9 * This program is free software,you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 */ 13 14 #include <linux/kernel.h> 15 #include <linux/init.h> 16 #include <linux/io.h> 17 #include <linux/platform_device.h> 18 19 #include <asm/hardware/gic.h> 20 #include <asm/hardware/cache-l2x0.h> 21 22 #include <plat/irqs.h> 23 24 #include <mach/hardware.h> 25 #include <mach/omap4-common.h> 26 27 #ifdef CONFIG_CACHE_L2X0 28 void __iomem *l2cache_base; 29 #endif 30 31 void __iomem *gic_dist_base_addr; 32 33 34 void __init gic_init_irq(void) 35 { 36 /* Static mapping, never released */ 37 gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K); 38 BUG_ON(!gic_dist_base_addr); 39 40 /* Static mapping, never released */ 41 omap_irq_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512); 42 BUG_ON(!omap_irq_base); 43 44 gic_init(0, 29, gic_dist_base_addr, omap_irq_base); 45 } 46 47 #ifdef CONFIG_CACHE_L2X0 48 49 static void omap4_l2x0_disable(void) 50 { 51 /* Disable PL310 L2 Cache controller */ 52 omap_smc1(0x102, 0x0); 53 } 54 55 static void omap4_l2x0_set_debug(unsigned long val) 56 { 57 /* Program PL310 L2 Cache controller debug register */ 58 omap_smc1(0x100, val); 59 } 60 61 static int __init omap_l2_cache_init(void) 62 { 63 u32 aux_ctrl = 0; 64 65 /* 66 * To avoid code running on other OMAPs in 67 * multi-omap builds 68 */ 69 if (!cpu_is_omap44xx()) 70 return -ENODEV; 71 72 /* Static mapping, never released */ 73 l2cache_base = ioremap(OMAP44XX_L2CACHE_BASE, SZ_4K); 74 BUG_ON(!l2cache_base); 75 76 /* 77 * 16-way associativity, parity disabled 78 * Way size - 32KB (es1.0) 79 * Way size - 64KB (es2.0 +) 80 */ 81 aux_ctrl = ((1 << L2X0_AUX_CTRL_ASSOCIATIVITY_SHIFT) | 82 (0x1 << 25) | 83 (0x1 << L2X0_AUX_CTRL_NS_LOCKDOWN_SHIFT) | 84 (0x1 << L2X0_AUX_CTRL_NS_INT_CTRL_SHIFT)); 85 86 if (omap_rev() == OMAP4430_REV_ES1_0) { 87 aux_ctrl |= 0x2 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT; 88 } else { 89 aux_ctrl |= ((0x3 << L2X0_AUX_CTRL_WAY_SIZE_SHIFT) | 90 (1 << L2X0_AUX_CTRL_SHARE_OVERRIDE_SHIFT) | 91 (1 << L2X0_AUX_CTRL_DATA_PREFETCH_SHIFT) | 92 (1 << L2X0_AUX_CTRL_INSTR_PREFETCH_SHIFT) | 93 (1 << L2X0_AUX_CTRL_EARLY_BRESP_SHIFT)); 94 } 95 if (omap_rev() != OMAP4430_REV_ES1_0) 96 omap_smc1(0x109, aux_ctrl); 97 98 /* Enable PL310 L2 Cache controller */ 99 omap_smc1(0x102, 0x1); 100 101 l2x0_init(l2cache_base, aux_ctrl, L2X0_AUX_CTRL_MASK); 102 103 /* 104 * Override default outer_cache.disable with a OMAP4 105 * specific one 106 */ 107 outer_cache.disable = omap4_l2x0_disable; 108 outer_cache.set_debug = omap4_l2x0_set_debug; 109 110 return 0; 111 } 112 early_initcall(omap_l2_cache_init); 113 #endif 114