1/* SPDX-License-Identifier: GPL-2.0-only */ 2/* 3 * OMAP34xx and OMAP44xx secure APIs file. 4 * 5 * Copyright (C) 2010 Texas Instruments, Inc. 6 * Written by Santosh Shilimkar <santosh.shilimkar@ti.com> 7 * 8 * Copyright (C) 2012 Ivaylo Dimitrov <freemangordon@abv.bg> 9 * Copyright (C) 2013 Pali Rohár <pali.rohar@gmail.com> 10 */ 11 12#include <linux/linkage.h> 13 14/* 15 * This is common routine to manage secure monitor API 16 * used to modify the PL310 secure registers. 17 * 'r0' contains the value to be modified and 'r12' contains 18 * the monitor API number. It uses few CPU registers 19 * internally and hence they need be backed up including 20 * link register "lr". 21 * Function signature : void omap_smc1(u32 fn, u32 arg) 22 */ 23 24ENTRY(omap_smc1) 25 stmfd sp!, {r2-r12, lr} 26 mov r12, r0 27 mov r0, r1 28 dsb 29 smc #0 30 ldmfd sp!, {r2-r12, pc} 31ENDPROC(omap_smc1) 32 33/** 34 * u32 omap_smc2(u32 id, u32 falg, u32 pargs) 35 * Low level common routine for secure HAL and PPA APIs. 36 * @id: Application ID of HAL APIs 37 * @flag: Flag to indicate the criticality of operation 38 * @pargs: Physical address of parameter list starting 39 * with number of parametrs 40 */ 41ENTRY(omap_smc2) 42 stmfd sp!, {r4-r12, lr} 43 mov r3, r2 44 mov r2, r1 45 mov r1, #0x0 @ Process ID 46 mov r6, #0xff 47 mov r12, #0x00 @ Secure Service ID 48 mov r7, #0 49 mcr p15, 0, r7, c7, c5, 6 50 dsb 51 dmb 52 smc #0 53 ldmfd sp!, {r4-r12, pc} 54ENDPROC(omap_smc2) 55 56/** 57 * u32 omap_smc3(u32 service_id, u32 process_id, u32 flag, u32 pargs) 58 * Low level common routine for secure HAL and PPA APIs via smc #1 59 * r0 - @service_id: Secure Service ID 60 * r1 - @process_id: Process ID 61 * r2 - @flag: Flag to indicate the criticality of operation 62 * r3 - @pargs: Physical address of parameter list 63 */ 64ENTRY(omap_smc3) 65 stmfd sp!, {r4-r11, lr} 66 mov r12, r0 @ Copy the secure service ID 67 mov r6, #0xff @ Indicate new Task call 68 dsb @ Memory Barrier (not sure if needed, copied from omap_smc2) 69 smc #1 @ Call PPA service 70 ldmfd sp!, {r4-r11, pc} 71ENDPROC(omap_smc3) 72 73ENTRY(omap_modify_auxcoreboot0) 74 stmfd sp!, {r1-r12, lr} 75 ldr r12, =0x104 76 dsb 77 smc #0 78 ldmfd sp!, {r1-r12, pc} 79ENDPROC(omap_modify_auxcoreboot0) 80 81ENTRY(omap_auxcoreboot_addr) 82 stmfd sp!, {r2-r12, lr} 83 ldr r12, =0x105 84 dsb 85 smc #0 86 ldmfd sp!, {r2-r12, pc} 87ENDPROC(omap_auxcoreboot_addr) 88 89ENTRY(omap_read_auxcoreboot0) 90 stmfd sp!, {r2-r12, lr} 91 ldr r12, =0x103 92 dsb 93 smc #0 94 ldmfd sp!, {r2-r12, pc} 95ENDPROC(omap_read_auxcoreboot0) 96