1 /* 2 * linux/arch/arm/mach-omap2/mcbsp.c 3 * 4 * Copyright (C) 2008 Instituto Nokia de Tecnologia 5 * Contact: Eduardo Valentin <eduardo.valentin@indt.org.br> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 * 11 * Multichannel mode not supported. 12 */ 13 #include <linux/module.h> 14 #include <linux/init.h> 15 #include <linux/clk.h> 16 #include <linux/err.h> 17 #include <linux/io.h> 18 #include <linux/platform_device.h> 19 20 #include <mach/irqs.h> 21 #include <mach/dma.h> 22 #include <mach/irqs.h> 23 #include <mach/mux.h> 24 #include <mach/cpu.h> 25 #include <mach/mcbsp.h> 26 27 static void omap2_mcbsp2_mux_setup(void) 28 { 29 omap_cfg_reg(Y15_24XX_MCBSP2_CLKX); 30 omap_cfg_reg(R14_24XX_MCBSP2_FSX); 31 omap_cfg_reg(W15_24XX_MCBSP2_DR); 32 omap_cfg_reg(V15_24XX_MCBSP2_DX); 33 omap_cfg_reg(V14_24XX_GPIO117); 34 /* 35 * TODO: Need to add MUX settings for OMAP 2430 SDP 36 */ 37 } 38 39 static void omap2_mcbsp_request(unsigned int id) 40 { 41 if (cpu_is_omap2420() && (id == OMAP_MCBSP2)) 42 omap2_mcbsp2_mux_setup(); 43 } 44 45 static struct omap_mcbsp_ops omap2_mcbsp_ops = { 46 .request = omap2_mcbsp_request, 47 }; 48 49 #ifdef CONFIG_ARCH_OMAP2420 50 static struct omap_mcbsp_platform_data omap2420_mcbsp_pdata[] = { 51 { 52 .phys_base = OMAP24XX_MCBSP1_BASE, 53 .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX, 54 .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX, 55 .rx_irq = INT_24XX_MCBSP1_IRQ_RX, 56 .tx_irq = INT_24XX_MCBSP1_IRQ_TX, 57 .ops = &omap2_mcbsp_ops, 58 }, 59 { 60 .phys_base = OMAP24XX_MCBSP2_BASE, 61 .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX, 62 .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX, 63 .rx_irq = INT_24XX_MCBSP2_IRQ_RX, 64 .tx_irq = INT_24XX_MCBSP2_IRQ_TX, 65 .ops = &omap2_mcbsp_ops, 66 }, 67 }; 68 #define OMAP2420_MCBSP_PDATA_SZ ARRAY_SIZE(omap2420_mcbsp_pdata) 69 #else 70 #define omap2420_mcbsp_pdata NULL 71 #define OMAP2420_MCBSP_PDATA_SZ 0 72 #endif 73 74 #ifdef CONFIG_ARCH_OMAP2430 75 static struct omap_mcbsp_platform_data omap2430_mcbsp_pdata[] = { 76 { 77 .phys_base = OMAP24XX_MCBSP1_BASE, 78 .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX, 79 .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX, 80 .rx_irq = INT_24XX_MCBSP1_IRQ_RX, 81 .tx_irq = INT_24XX_MCBSP1_IRQ_TX, 82 .ops = &omap2_mcbsp_ops, 83 }, 84 { 85 .phys_base = OMAP24XX_MCBSP2_BASE, 86 .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX, 87 .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX, 88 .rx_irq = INT_24XX_MCBSP2_IRQ_RX, 89 .tx_irq = INT_24XX_MCBSP2_IRQ_TX, 90 .ops = &omap2_mcbsp_ops, 91 }, 92 { 93 .phys_base = OMAP2430_MCBSP3_BASE, 94 .dma_rx_sync = OMAP24XX_DMA_MCBSP3_RX, 95 .dma_tx_sync = OMAP24XX_DMA_MCBSP3_TX, 96 .rx_irq = INT_24XX_MCBSP3_IRQ_RX, 97 .tx_irq = INT_24XX_MCBSP3_IRQ_TX, 98 .ops = &omap2_mcbsp_ops, 99 }, 100 { 101 .phys_base = OMAP2430_MCBSP4_BASE, 102 .dma_rx_sync = OMAP24XX_DMA_MCBSP4_RX, 103 .dma_tx_sync = OMAP24XX_DMA_MCBSP4_TX, 104 .rx_irq = INT_24XX_MCBSP4_IRQ_RX, 105 .tx_irq = INT_24XX_MCBSP4_IRQ_TX, 106 .ops = &omap2_mcbsp_ops, 107 }, 108 { 109 .phys_base = OMAP2430_MCBSP5_BASE, 110 .dma_rx_sync = OMAP24XX_DMA_MCBSP5_RX, 111 .dma_tx_sync = OMAP24XX_DMA_MCBSP5_TX, 112 .rx_irq = INT_24XX_MCBSP5_IRQ_RX, 113 .tx_irq = INT_24XX_MCBSP5_IRQ_TX, 114 .ops = &omap2_mcbsp_ops, 115 }, 116 }; 117 #define OMAP2430_MCBSP_PDATA_SZ ARRAY_SIZE(omap2430_mcbsp_pdata) 118 #else 119 #define omap2430_mcbsp_pdata NULL 120 #define OMAP2430_MCBSP_PDATA_SZ 0 121 #endif 122 123 #ifdef CONFIG_ARCH_OMAP34XX 124 static struct omap_mcbsp_platform_data omap34xx_mcbsp_pdata[] = { 125 { 126 .phys_base = OMAP34XX_MCBSP1_BASE, 127 .dma_rx_sync = OMAP24XX_DMA_MCBSP1_RX, 128 .dma_tx_sync = OMAP24XX_DMA_MCBSP1_TX, 129 .rx_irq = INT_24XX_MCBSP1_IRQ_RX, 130 .tx_irq = INT_24XX_MCBSP1_IRQ_TX, 131 .ops = &omap2_mcbsp_ops, 132 }, 133 { 134 .phys_base = OMAP34XX_MCBSP2_BASE, 135 .dma_rx_sync = OMAP24XX_DMA_MCBSP2_RX, 136 .dma_tx_sync = OMAP24XX_DMA_MCBSP2_TX, 137 .rx_irq = INT_24XX_MCBSP2_IRQ_RX, 138 .tx_irq = INT_24XX_MCBSP2_IRQ_TX, 139 .ops = &omap2_mcbsp_ops, 140 }, 141 { 142 .phys_base = OMAP34XX_MCBSP3_BASE, 143 .dma_rx_sync = OMAP24XX_DMA_MCBSP3_RX, 144 .dma_tx_sync = OMAP24XX_DMA_MCBSP3_TX, 145 .rx_irq = INT_24XX_MCBSP3_IRQ_RX, 146 .tx_irq = INT_24XX_MCBSP3_IRQ_TX, 147 .ops = &omap2_mcbsp_ops, 148 }, 149 { 150 .phys_base = OMAP34XX_MCBSP4_BASE, 151 .dma_rx_sync = OMAP24XX_DMA_MCBSP4_RX, 152 .dma_tx_sync = OMAP24XX_DMA_MCBSP4_TX, 153 .rx_irq = INT_24XX_MCBSP4_IRQ_RX, 154 .tx_irq = INT_24XX_MCBSP4_IRQ_TX, 155 .ops = &omap2_mcbsp_ops, 156 }, 157 { 158 .phys_base = OMAP34XX_MCBSP5_BASE, 159 .dma_rx_sync = OMAP24XX_DMA_MCBSP5_RX, 160 .dma_tx_sync = OMAP24XX_DMA_MCBSP5_TX, 161 .rx_irq = INT_24XX_MCBSP5_IRQ_RX, 162 .tx_irq = INT_24XX_MCBSP5_IRQ_TX, 163 .ops = &omap2_mcbsp_ops, 164 }, 165 }; 166 #define OMAP34XX_MCBSP_PDATA_SZ ARRAY_SIZE(omap34xx_mcbsp_pdata) 167 #else 168 #define omap34xx_mcbsp_pdata NULL 169 #define OMAP34XX_MCBSP_PDATA_SZ 0 170 #endif 171 172 static int __init omap2_mcbsp_init(void) 173 { 174 if (cpu_is_omap2420()) 175 omap_mcbsp_count = OMAP2420_MCBSP_PDATA_SZ; 176 if (cpu_is_omap2430()) 177 omap_mcbsp_count = OMAP2430_MCBSP_PDATA_SZ; 178 if (cpu_is_omap34xx()) 179 omap_mcbsp_count = OMAP34XX_MCBSP_PDATA_SZ; 180 181 mcbsp_ptr = kzalloc(omap_mcbsp_count * sizeof(struct omap_mcbsp *), 182 GFP_KERNEL); 183 if (!mcbsp_ptr) 184 return -ENOMEM; 185 186 if (cpu_is_omap2420()) 187 omap_mcbsp_register_board_cfg(omap2420_mcbsp_pdata, 188 OMAP2420_MCBSP_PDATA_SZ); 189 if (cpu_is_omap2430()) 190 omap_mcbsp_register_board_cfg(omap2430_mcbsp_pdata, 191 OMAP2430_MCBSP_PDATA_SZ); 192 if (cpu_is_omap34xx()) 193 omap_mcbsp_register_board_cfg(omap34xx_mcbsp_pdata, 194 OMAP34XX_MCBSP_PDATA_SZ); 195 196 return omap_mcbsp_init(); 197 } 198 arch_initcall(omap2_mcbsp_init); 199